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authorNick Withers <nick.withers@anu.edu.au>2014-11-27 17:39:36 +1100
committerGedare Bloom <gedare@rtems.org>2014-12-23 22:40:32 -0500
commit2d5c48691453a05ffb3a264f75e71490166f819a (patch)
tree349fff13e895c9c30ca9d0ec5b51270681beba0b /c/src/lib/libbsp/powerpc/shared
parentpc386: scan all functions of multi-function PCI devices (diff)
downloadrtems-2d5c48691453a05ffb3a264f75e71490166f819a.tar.bz2
Use fixed-width C99 types for PowerPC in_be16() and co.
Also use the const qualifier on the address pointer's target in in_*() Closes #2128
Diffstat (limited to 'c/src/lib/libbsp/powerpc/shared')
-rw-r--r--c/src/lib/libbsp/powerpc/shared/bootloader/pci.c16
-rw-r--r--c/src/lib/libbsp/powerpc/shared/console/console.inl5
-rw-r--r--c/src/lib/libbsp/powerpc/shared/console/uart.c5
-rw-r--r--c/src/lib/libbsp/powerpc/shared/openpic/openpic.c12
-rw-r--r--c/src/lib/libbsp/powerpc/shared/pci/pci.c18
-rw-r--r--c/src/lib/libbsp/powerpc/shared/startup/bspstart.c4
6 files changed, 31 insertions, 29 deletions
diff --git a/c/src/lib/libbsp/powerpc/shared/bootloader/pci.c b/c/src/lib/libbsp/powerpc/shared/bootloader/pci.c
index 4d51b35d5a..59bf8620fa 100644
--- a/c/src/lib/libbsp/powerpc/shared/bootloader/pci.c
+++ b/c/src/lib/libbsp/powerpc/shared/bootloader/pci.c
@@ -571,7 +571,7 @@ indirect_pci_read_config_word(unsigned char bus, unsigned char dev_fn,
if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER;
out_be32(pci->config_addr,
0x80|(bus<<8)|(dev_fn<<16)|((offset&~3)<<24));
- *val=in_le16((volatile u_short *)(pci->config_data + (offset&3)));
+ *val=in_le16((volatile uint16_t *)(pci->config_data + (offset&3)));
return PCIBIOS_SUCCESSFUL;
}
@@ -582,7 +582,7 @@ indirect_pci_read_config_dword(unsigned char bus, unsigned char dev_fn,
if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER;
out_be32(pci->config_addr,
0x80|(bus<<8)|(dev_fn<<16)|(offset<<24));
- *val=in_le32((volatile u_int *)pci->config_data);
+ *val=in_le32((volatile uint32_t *)pci->config_data);
return PCIBIOS_SUCCESSFUL;
}
@@ -601,7 +601,7 @@ indirect_pci_write_config_word(unsigned char bus, unsigned char dev_fn,
if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER;
out_be32(pci->config_addr,
0x80|(bus<<8)|(dev_fn<<16)|((offset&~3)<<24));
- out_le16((volatile u_short *)(pci->config_data + (offset&3)), val);
+ out_le16((volatile uint16_t *)(pci->config_data + (offset&3)), val);
return PCIBIOS_SUCCESSFUL;
}
@@ -611,7 +611,7 @@ indirect_pci_write_config_dword(unsigned char bus, unsigned char dev_fn,
if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER;
out_be32(pci->config_addr,
0x80|(bus<<8)|(dev_fn<<16)|(offset<<24));
- out_le32((volatile u_int *)pci->config_data, val);
+ out_le32((volatile uint32_t *)pci->config_data, val);
return PCIBIOS_SUCCESSFUL;
}
@@ -644,7 +644,7 @@ direct_pci_read_config_word(unsigned char bus, unsigned char dev_fn,
if (bus != 0 || (1<<PCI_SLOT(dev_fn) & 0xff8007fe)) {
return PCIBIOS_DEVICE_NOT_FOUND;
}
- *val=in_le16((volatile u_short *)
+ *val=in_le16((volatile uint16_t *)
(pci->config_data + ((1<<PCI_SLOT(dev_fn))&~1)
+ (PCI_FUNC(dev_fn)<<8) + offset));
return PCIBIOS_SUCCESSFUL;
@@ -658,7 +658,7 @@ direct_pci_read_config_dword(unsigned char bus, unsigned char dev_fn,
if (bus != 0 || (1<<PCI_SLOT(dev_fn) & 0xff8007fe)) {
return PCIBIOS_DEVICE_NOT_FOUND;
}
- *val=in_le32((volatile u_int *)
+ *val=in_le32((volatile uint32_t *)
(pci->config_data + ((1<<PCI_SLOT(dev_fn))&~1)
+ (PCI_FUNC(dev_fn)<<8) + offset));
return PCIBIOS_SUCCESSFUL;
@@ -683,7 +683,7 @@ direct_pci_write_config_word(unsigned char bus, unsigned char dev_fn,
if (bus != 0 || (1<<PCI_SLOT(dev_fn) & 0xff8007fe)) {
return PCIBIOS_DEVICE_NOT_FOUND;
}
- out_le16((volatile u_short *)
+ out_le16((volatile uint16_t *)
(pci->config_data + ((1<<PCI_SLOT(dev_fn))&~1)
+ (PCI_FUNC(dev_fn)<<8) + offset),
val);
@@ -697,7 +697,7 @@ direct_pci_write_config_dword(unsigned char bus, unsigned char dev_fn,
if (bus != 0 || (1<<PCI_SLOT(dev_fn) & 0xff8007fe)) {
return PCIBIOS_DEVICE_NOT_FOUND;
}
- out_le32((volatile u_int *)
+ out_le32((volatile uint32_t *)
(pci->config_data + ((1<<PCI_SLOT(dev_fn))&~1)
+ (PCI_FUNC(dev_fn)<<8) + offset),
val);
diff --git a/c/src/lib/libbsp/powerpc/shared/console/console.inl b/c/src/lib/libbsp/powerpc/shared/console/console.inl
index 1e300ef01a..177444e870 100644
--- a/c/src/lib/libbsp/powerpc/shared/console/console.inl
+++ b/c/src/lib/libbsp/powerpc/shared/console/console.inl
@@ -6,17 +6,18 @@
*/
#include <bsp.h>
+#include <stdint.h>
#define INL_IN_DECL(name,base) \
static inline unsigned char name(int off) \
{ \
- return in_8((unsigned char*)(((unsigned long)base) + off)); \
+ return in_8((uint8_t*)(((unsigned long)base) + off)); \
}
#define INL_OUT_DECL(name,base) \
static inline void name(int off, unsigned int val) \
{ \
- out_8((unsigned char*)(((unsigned long)base) + off), val); \
+ out_8((uint8_t*)(((unsigned long)base) + off), val); \
}
#ifdef BSP_UART_IOBASE_COM1
diff --git a/c/src/lib/libbsp/powerpc/shared/console/uart.c b/c/src/lib/libbsp/powerpc/shared/console/uart.c
index 917fd5bf7c..cd8657cfda 100644
--- a/c/src/lib/libbsp/powerpc/shared/console/uart.c
+++ b/c/src/lib/libbsp/powerpc/shared/console/uart.c
@@ -5,6 +5,7 @@
* an endorsement by T.sqware of the product in which it is included.
*/
+#include <stdint.h>
#include <stdio.h>
#include <bsp.h>
#include <bsp/irq.h>
@@ -72,13 +73,13 @@ static struct uart_data uart_data[2] = {
static inline unsigned char
uread(int uart, unsigned int reg)
{
- return in_8((unsigned char*)(uart_data[uart].ioBase + reg));
+ return in_8((uint8_t*)(uart_data[uart].ioBase + reg));
}
static inline void
uwrite(int uart, int reg, unsigned int val)
{
- out_8((unsigned char*)(uart_data[uart].ioBase + reg), val);
+ out_8((uint8_t*)(uart_data[uart].ioBase + reg), val);
}
diff --git a/c/src/lib/libbsp/powerpc/shared/openpic/openpic.c b/c/src/lib/libbsp/powerpc/shared/openpic/openpic.c
index 87090d87a7..fa37079f77 100644
--- a/c/src/lib/libbsp/powerpc/shared/openpic/openpic.c
+++ b/c/src/lib/libbsp/powerpc/shared/openpic/openpic.c
@@ -92,9 +92,9 @@ static inline unsigned int openpic_read(volatile unsigned int *addr)
unsigned int val;
#ifdef BSP_OPEN_PIC_BIG_ENDIAN
- val = in_be32(addr);
+ val = in_be32((volatile uint32_t *)addr);
#else
- val = in_le32(addr);
+ val = in_le32((volatile uint32_t *)addr);
#endif
#ifdef REGISTER_DEBUG
printk("openpic_read(0x%08x) = 0x%08x\n", (unsigned int)addr, val);
@@ -108,9 +108,9 @@ static inline void openpic_write(volatile unsigned int *addr, unsigned int val)
printk("openpic_write(0x%08x, 0x%08x)\n", (unsigned int)addr, val);
#endif
#ifdef BSP_OPEN_PIC_BIG_ENDIAN
- out_be32(addr, val);
+ out_be32((volatile uint32_t *)addr, val);
#else
- out_le32(addr, val);
+ out_le32((volatile uint32_t *)addr, val);
#endif
}
@@ -307,7 +307,7 @@ void openpic_init(int main_pic, unsigned char *polarities, unsigned char *senses
*/
uint32_t eicr_val, ratio;
/* On the 8240 this is the EICR register */
- eicr_val = in_le32( &OpenPIC->Global.Global_Configuration1 ) & ~(7<<28);
+ eicr_val = in_le32( (volatile uint32_t *)&OpenPIC->Global.Global_Configuration1 ) & ~(7<<28);
if ( (1<<27) & eicr_val ) {
/* serial interface mode enabled */
@@ -318,7 +318,7 @@ void openpic_init(int main_pic, unsigned char *polarities, unsigned char *senses
ratio >>= 2; /* EICR value is half actual divisor */
if ( 0==ratio )
ratio = 1;
- out_le32(&OpenPIC->Global.Global_Configuration1, eicr_val | ((ratio &7) << 28));
+ out_le32((volatile uint32_t *)&OpenPIC->Global.Global_Configuration1, eicr_val | ((ratio &7) << 28));
/* Delay in TB cycles (assuming TB runs at 1/4 of the bus frequency) */
openpic_set_eoi_delay( 16 * (2*ratio) / 4 );
}
diff --git a/c/src/lib/libbsp/powerpc/shared/pci/pci.c b/c/src/lib/libbsp/powerpc/shared/pci/pci.c
index 6cdc4be3b7..f75151ad46 100644
--- a/c/src/lib/libbsp/powerpc/shared/pci/pci.c
+++ b/c/src/lib/libbsp/powerpc/shared/pci/pci.c
@@ -43,7 +43,7 @@
#endif
#ifndef PCI_CONFIG_WR_ADDR
-#define PCI_CONFIG_WR_ADDR( addr, val ) out_le32((unsigned int*)(addr), (val))
+#define PCI_CONFIG_WR_ADDR( addr, val ) out_le32((volatile uint32_t*)(addr), (val))
#endif
#define PCI_CONFIG_SET_ADDR(addr, bus, slot,function,offset) \
@@ -83,7 +83,7 @@ indirect_pci_read_config_word(
return PCIBIOS_BAD_REGISTER_NUMBER;
PCI_CONFIG_SET_ADDR(pci.pci_config_addr, bus, slot, function, offset);
- *val = in_le16((volatile unsigned short *)(pci.pci_config_data + (offset&3)));
+ *val = in_le16((volatile uint16_t *)(pci.pci_config_data + (offset&3)));
return PCIBIOS_SUCCESSFUL;
}
@@ -100,7 +100,7 @@ indirect_pci_read_config_dword(
return PCIBIOS_BAD_REGISTER_NUMBER;
PCI_CONFIG_SET_ADDR(pci.pci_config_addr, bus, slot, function, offset);
- *val = in_le32((volatile unsigned int *)pci.pci_config_data);
+ *val = in_le32((volatile uint32_t *)pci.pci_config_data);
return PCIBIOS_SUCCESSFUL;
}
@@ -129,7 +129,7 @@ indirect_pci_write_config_word(
return PCIBIOS_BAD_REGISTER_NUMBER;
PCI_CONFIG_SET_ADDR(pci.pci_config_addr, bus, slot, function, offset);
- out_le16((volatile unsigned short *)(pci.pci_config_data + (offset&3)), val);
+ out_le16((volatile uint16_t *)(pci.pci_config_data + (offset&3)), val);
return PCIBIOS_SUCCESSFUL;
}
@@ -144,7 +144,7 @@ indirect_pci_write_config_dword(
if (offset&3)
return PCIBIOS_BAD_REGISTER_NUMBER;
PCI_CONFIG_SET_ADDR(pci.pci_config_addr, bus, slot, function, offset);
- out_le32((volatile unsigned int *)pci.pci_config_data, val);
+ out_le32((volatile uint32_t *)pci.pci_config_data, val);
return PCIBIOS_SUCCESSFUL;
}
@@ -194,7 +194,7 @@ direct_pci_read_config_word(
if (bus != 0 || (1<<slot & 0xff8007fe))
return PCIBIOS_DEVICE_NOT_FOUND;
- *val=in_le16((volatile unsigned short *)
+ *val=in_le16((volatile uint16_t *)
(pci.pci_config_data + ((1<<slot)&~1)
+ (function<<8) + offset));
return PCIBIOS_SUCCESSFUL;
@@ -214,7 +214,7 @@ direct_pci_read_config_dword(
if (bus != 0 || (1<<slot & 0xff8007fe))
return PCIBIOS_DEVICE_NOT_FOUND;
- *val=in_le32((volatile unsigned int *)
+ *val=in_le32((volatile uint32_t *)
(pci.pci_config_data + ((1<<slot)&~1)
+ (function<<8) + offset));
return PCIBIOS_SUCCESSFUL;
@@ -250,7 +250,7 @@ direct_pci_write_config_word(
if (bus != 0 || (1<<slot & 0xff8007fe))
return PCIBIOS_DEVICE_NOT_FOUND;
- out_le16((volatile unsigned short *)
+ out_le16((volatile uint16_t *)
(pci.pci_config_data + ((1<<slot)&~1)
+ (function<<8) + offset),
val);
@@ -270,7 +270,7 @@ direct_pci_write_config_dword(
if (bus != 0 || (1<<slot & 0xff8007fe))
return PCIBIOS_DEVICE_NOT_FOUND;
- out_le32((volatile unsigned int *)
+ out_le32((volatile uint32_t *)
(pci.pci_config_data + ((1<<slot)&~1)
+ (function<<8) + offset),
val);
diff --git a/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c b/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c
index 08dc12b225..0f450fcaac 100644
--- a/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c
@@ -124,8 +124,8 @@ unsigned int EUMBBAR;
* Processor Address Map B (CHRP).
*/
static unsigned int get_eumbbar(void) {
- out_le32( (volatile unsigned *)0xfec00000, 0x80000078 );
- return in_le32( (volatile unsigned *)0xfee00000 );
+ out_le32( (volatile uint32_t *)0xfec00000, 0x80000078 );
+ return in_le32( (volatile uint32_t *)0xfee00000 );
}
#endif