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author | Ralf Corsepius <ralf.corsepius@rtems.org> | 2004-04-21 10:43:04 +0000 |
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committer | Ralf Corsepius <ralf.corsepius@rtems.org> | 2004-04-21 10:43:04 +0000 |
commit | 6128a4aa5e791ed4e0a655bfd346a52d92da7883 (patch) | |
tree | af53ca3f67ce405b6fbc6c98399c8e0c87e01a9e /c/src/lib/libbsp/powerpc/shared/bootloader/head.S | |
parent | 2004-04-20 Ralf Corsepius <ralf_corsepius@rtems.org> (diff) | |
download | rtems-6128a4aa5e791ed4e0a655bfd346a52d92da7883.tar.bz2 |
Remove stray white spaces.
Diffstat (limited to '')
-rw-r--r-- | c/src/lib/libbsp/powerpc/shared/bootloader/head.S | 126 |
1 files changed, 63 insertions, 63 deletions
diff --git a/c/src/lib/libbsp/powerpc/shared/bootloader/head.S b/c/src/lib/libbsp/powerpc/shared/bootloader/head.S index b0eeb0e550..cb6d9134fc 100644 --- a/c/src/lib/libbsp/powerpc/shared/bootloader/head.S +++ b/c/src/lib/libbsp/powerpc/shared/bootloader/head.S @@ -19,16 +19,16 @@ #include <rtems/score/cpu.h> #include "bootldr.h" -#define TEST_PPCBUG_CALLS +#define TEST_PPCBUG_CALLS #undef TEST_PPCBUG_CALLS - + #define FRAME_SIZE 32 #define LOCK_CACHES (HID0_DLOCK | HID0_ILOCK) #define INVL_CACHES (HID0_DCI | HID0_ICFI) #define ENBL_CACHES (HID0_DCE | HID0_ICE) #define USE_PPCBUG - + #define PRINT_CHAR(c) \ addi r20,r3,0 ; \ li r3,c ; \ @@ -37,10 +37,10 @@ addi r3,r20,0 ; \ li r10,0x26 ; \ sc - - - - + + + + #define MONITOR_ENTER \ mfmsr r10 ; \ ori r10,r10,MSR_IP ; \ @@ -48,8 +48,8 @@ li r10,0x63 ; \ sc - - + + START_GOT GOT_ENTRY(_GOT2_TABLE_) GOT_ENTRY(_FIXUP_TABLE_) @@ -61,21 +61,21 @@ GOT_ENTRY(_binary_rtems_gz_start) GOT_ENTRY(_binary_initrd_gz_start) GOT_ENTRY(_binary_initrd_gz_end) -#ifdef TEST_PPCBUG_CALLS +#ifdef TEST_PPCBUG_CALLS GOT_ENTRY(banner_start) GOT_ENTRY(banner_end) -#endif +#endif #ifdef USE_PPCBUG GOT_ENTRY(nioc_reset_packet) #endif END_GOT .globl start .type start,@function - + /* Point the stack into the PreP partition header in the x86 reserved - * code area, so that simple C routines can be called. + * code area, so that simple C routines can be called. */ -start: +start: #if defined(USE_PPCBUG) && defined(DEBUG) && defined(REENTER_MONITOR) MONITOR_ENTER #endif @@ -89,9 +89,9 @@ start: ori r0,r28,MSR_EE xori r0,r0,MSR_EE mtmsr r0 - + /* Enable the caches, from now on cr2.eq set means processor is 601 */ - + mfpvr r0 mfspr r29,HID0 srwi r0,r0,16 @@ -103,7 +103,7 @@ start: * commented out, 11/7/2002, gregm. This instruction sequence seems to * be pathological on the 603e. * - + #ifndef USE_PPCBUG ori r0,r29,ENBL_CACHES|INVL_CACHES|LOCK_CACHES xori r0,r0,INVL_CACHES|LOCK_CACHES @@ -112,10 +112,10 @@ start: mtspr HID0,r0 #endif */ - - + + 2: bl reloc - + /* save all the parameters and the orginal msr/hid0/r31 */ lwz bd,GOT(__bd) stw r3,0(bd) @@ -135,21 +135,21 @@ start: * corrupted by the IF DMAing data into its old buffers or * by writing descriptors... */ - lwz r3,GOT(nioc_reset_packet) + lwz r3,GOT(nioc_reset_packet) li r10, 0x1d /* .NETCTRL */ sc #endif -/* Call the routine to fill boot_data structure from residual data. - * And to find where the code has to be moved. +/* Call the routine to fill boot_data structure from residual data. + * And to find where the code has to be moved. */ lis r3,__size@sectoff@ha addi r3,r3,__size@sectoff@l bl early_setup -/* Now we need to relocate ourselves, where we are told to. First put a +/* Now we need to relocate ourselves, where we are told to. First put a * copy of the codemove routine to some place in memory. - * (which may be where the 0x41 partition was loaded, so size is critical). + * (which may be where the 0x41 partition was loaded, so size is critical). */ lwz r4,GOT(codemove) li r5,_size_codemove @@ -175,14 +175,14 @@ start: mtlr r8 # for the return address bctr # returns to the moved instruction - + /* Establish the new top stack frame. */ moved: lwz r1,stack(bd) li r0,0 stwu r0,-16(r1) /* relocate again */ - bl reloc + bl reloc /* Clear all of BSS */ lwz r10,GOT(.bss) li r0,__bss_words@sectoff@l @@ -213,7 +213,7 @@ moved: lwz r1,stack(bd) /* Some firmware versions leave stale values in the BATs, it's time * to invalidate them to avoid interferences with our own mappings. * But the 601 valid bit is in the BATL (IBAT only) and others are in - * the [ID]BATU. Bloat, bloat.. fortunately thrown away later. + * the [ID]BATU. Bloat, bloat.. fortunately thrown away later. */ #if defined(USE_PPCBUG) && defined(DEBUG) PRINT_CHAR('T') @@ -239,22 +239,22 @@ moved: lwz r1,stack(bd) PRINT_CHAR('i') #endif bl mm_init - + #if defined(USE_PPCBUG) && defined(DEBUG) PRINT_CHAR('M') #endif bl MMUon - + /* Now we are mapped and can perform I/O if we want */ -#ifdef TEST_PPCBUG_CALLS +#ifdef TEST_PPCBUG_CALLS /* Experience seems to show that PPCBug can only be called with the * data cache disabled and with MMU disabled. Bummer. - */ + */ li r10,0x22 # .OUTLN lwz r3,GOT(banner_start) lwz r4,GOT(banner_end) sc -#endif +#endif #if defined(USE_PPCBUG) && defined(DEBUG) PRINT_CHAR('H') #endif @@ -294,9 +294,9 @@ moved: lwz r1,stack(bd) li r30,0 */ dcbst 0,r30 /* Make sure it's in memory ! */ - -/* We just flash invalidate and disable the dcache, unless it's a 601, - * critical areas have been flushed and we don't care about the stack + +/* We just flash invalidate and disable the dcache, unless it's a 601, + * critical areas have been flushed and we don't care about the stack * and other scratch areas. */ beq cr2,1f @@ -306,20 +306,20 @@ moved: lwz r1,stack(bd) mtspr HID0,r0 xori r0,r0,HID0_DCI|HID0_DCE mtspr HID0,r0 - + /* Provisional return to FW, works for PPCBug */ #if 0 && defined(REENTER_MONITOR) MONITOR_ENTER #else 1: bctr #endif - - + + /* relocation function, r30 must point to got2+0x8000 */ -reloc: +reloc: /* Adjust got2 pointers, no need to check for 0, this code already puts - * a few entries in the table. + * a few entries in the table. */ li r0,__got2_entries@sectoff@l la r12,GOT(_GOT2_TABLE_) @@ -331,10 +331,10 @@ reloc: add r0,r0,r11 stw r0,0(r12) bdnz 1b - + /* Now adjust the fixups and the pointers to the fixups in case we need - * to move ourselves again. - */ + * to move ourselves again. + */ 2: li r0,__fixup_entries@sectoff@l lwz r12,GOT(_FIXUP_TABLE_) cmpwi r0,0 @@ -347,18 +347,18 @@ reloc: stw r10,0(r12) stw r0,0(r10) bdnz 3b - blr + blr /* Set the MMU on and off: code is always mapped 1:1 and does not need MMU, * but it does not cost so much to map it also and it catches calls through - * NULL function pointers. + * NULL function pointers. */ .globl MMUon .type MMUon,@function MMUon: blr nop -/* +/* mfmsr r0 ori r0,r0,MSR_IR|MSR_DR|MSR_IP mflr r11 @@ -371,7 +371,7 @@ MMUon: blr .type MMUoff,@function MMUoff: blr nop - + /* mfmsr r0 ori r0,r0,MSR_IR|MSR_DR|MSR_IP @@ -383,9 +383,9 @@ MMUoff: blr */ /* Due to the PPC architecture (and according to the specifications), a - * series of tlbie which goes through a whole 256 MB segment always flushes - * the whole TLB. This is obviously overkill and slow, but who cares ? - * It takes about 1 ms on a 200 MHz 603e and works even if residual data + * series of tlbie which goes through a whole 256 MB segment always flushes + * the whole TLB. This is obviously overkill and slow, but who cares ? + * It takes about 1 ms on a 200 MHz 603e and works even if residual data * get the number of TLB entries wrong. */ flush_tlb: @@ -396,8 +396,8 @@ flush_tlb: /* tlbsync is not implemented on 601, so use sync which seems to be a superset * of tlbsync in all cases and do not bother with CPU dependant code */ - sync - blr + sync + blr .globl codemove codemove: @@ -410,11 +410,11 @@ codemove: beq 7f /* Protect against 0 count */ mtctr r0 bge cr1,2f - + la r8,-4(r4) la r7,-4(r3) 1: lwzu r0,4(r8) - stwu r0,4(r7) + stwu r0,4(r7) bdnz 1b b 4f @@ -424,23 +424,23 @@ codemove: 3: lwzu r0,-4(r8) stwu r0,-4(r7) bdnz 3b - + /* Now flush the cache: note that we must start from a cache aligned - * address. Otherwise we might miss one cache line. + * address. Otherwise we might miss one cache line. */ 4: cmpwi r6,0 add r5,r3,r5 - beq 7f /* Always flush prefetch queue in any case */ + beq 7f /* Always flush prefetch queue in any case */ subi r0,r6,1 andc r3,r3,r0 mr r4,r3 -5: cmplw r4,r5 +5: cmplw r4,r5 dcbst 0,r4 add r4,r4,r6 blt 5b sync /* Wait for all dcbst to complete on bus */ mr r4,r3 -6: cmplw r4,r5 +6: cmplw r4,r5 icbi 0,r4 add r4,r4,r6 blt 6b @@ -467,8 +467,8 @@ nioc_reset_packet: .long 0 /* Number of bytes */ .long 0 /* Status/Control Flags (unused for reset) */ #endif -#ifdef TEST_PPCBUG_CALLS -banner_start: +#ifdef TEST_PPCBUG_CALLS +banner_start: .ascii "This message was printed by PPCBug with MMU enabled" -banner_end: +banner_end: #endif |