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author | Joel Sherrill <joel.sherrill@OARcorp.com> | 1999-09-02 18:12:57 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 1999-09-02 18:12:57 +0000 |
commit | 9396d1e43b16ede864da7c695fffada794844bde (patch) | |
tree | bb210f48e7b1c6050f48dd94c5fb8029e65efca5 /c/src/lib/libbsp/powerpc/score603e/startup/Makefile.in | |
parent | Added BSP chapter to FAQ. (diff) | |
download | rtems-9396d1e43b16ede864da7c695fffada794844bde.tar.bz2 |
Cleaned up to move conditional to C files -- not Makefile.
Diffstat (limited to '')
-rw-r--r-- | c/src/lib/libbsp/powerpc/score603e/startup/Makefile.in | 14 |
1 files changed, 6 insertions, 8 deletions
diff --git a/c/src/lib/libbsp/powerpc/score603e/startup/Makefile.in b/c/src/lib/libbsp/powerpc/score603e/startup/Makefile.in index cfea59e73d..94664ede79 100644 --- a/c/src/lib/libbsp/powerpc/score603e/startup/Makefile.in +++ b/c/src/lib/libbsp/powerpc/score603e/startup/Makefile.in @@ -16,6 +16,12 @@ VPATH = @srcdir@:@srcdir@/../../../shared PGM = ${ARCH}/startup.rel # C source names, if any, go here -- minus the .c +# +# First and second generation use different Bridge chips :( +# Generation 1 --> 82378zb +# Generation 2 --> FPGA +STARTUP_C_PIECES = 82378zb FPGA + C_PIECES = bspclean bsplibc bsppost bspstart bootcard main sbrk setvec \ Hwr_init spurious genpvec $(STARTUP_C_PIECES) gnatinstallhandler C_FILES = $(C_PIECES:%=%.c) @@ -42,14 +48,6 @@ INSTALLDIRS = $(PROJECT_RELEASE)/lib $(INSTALLDIRS): @$(mkinstalldirs) $(INSTALLDIRS) -# First and second generation use different Bridge chips :( -# C source names, if any, go here -- minus the .c -# generation 1 -STARTUP_C_PIECES_1_V = 82378zb -# generation 2 -STARTUP_C_PIECES_2_V = FPGA -STARTUP_C_PIECES_ = $(STARTUP_C_PIECES_$(SCORE603E_GENERATION)_V) - # # (OPTIONAL) Add local stuff here using += # |