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authorJennifer Averett <Jennifer.Averett@OARcorp.com>2009-05-05 16:24:04 +0000
committerJennifer Averett <Jennifer.Averett@OARcorp.com>2009-05-05 16:24:04 +0000
commit42b6dd2a53ce85e13ab00611fb5a3fdb2c40ee92 (patch)
tree4a043f0b2ef77473753131fed17c4dc95bc18807 /c/src/lib/libbsp/powerpc/score603e/console/85c30.c
parent2009-05-05 Joel Sherrill <joel.sherrill@oarcorp.com> (diff)
downloadrtems-42b6dd2a53ce85e13ab00611fb5a3fdb2c40ee92.tar.bz2
2009-05-05 Jennifer Averett <jennifer.averett@OARcorp.com>
* Makefile.am, configure.ac, preinstall.am, PCI_bus/PCI.c, PCI_bus/PCI.h, PCI_bus/flash.c, PCI_bus/universe.c, console/85c30.c, console/85c30.h, console/console.c, console/consolebsp.h, console/tbl85c30.c, include/bsp.h, include/gen2.h, include/irq-config.h, include/tm27.h, irq/FPGA.c, irq/irq.h, irq/irq_init.c, start/start.S, startup/Hwr_init.c, startup/bspstart.c, startup/linkcmds, timer/timer.c, tod/tod.c, vme/VMEConfig.h: Updated and tested with latest interrupt source. Modified with latest memory allocation, but this needs testing. * irq/no_pic.c: New file.
Diffstat (limited to '')
-rw-r--r--c/src/lib/libbsp/powerpc/score603e/console/85c30.c25
1 files changed, 2 insertions, 23 deletions
diff --git a/c/src/lib/libbsp/powerpc/score603e/console/85c30.c b/c/src/lib/libbsp/powerpc/score603e/console/85c30.c
index 59d815c385..c73a4fc0d2 100644
--- a/c/src/lib/libbsp/powerpc/score603e/console/85c30.c
+++ b/c/src/lib/libbsp/powerpc/score603e/console/85c30.c
@@ -4,13 +4,13 @@
*
* Currently only polled mode is supported.
*
- * COPYRIGHT (c) 1989-2008.
+ * COPYRIGHT (c) 1989-2009.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
- *
+ *
* $Id$
*/
@@ -129,8 +129,6 @@ void initialize_85c30_port(
Console_Protocol *Setup;
uint16_t baud_constant;
-printk("initialize_85c30_port start\n");
-
Setup = Port->Protocol;
ctrl = Port->ctrl;
@@ -155,20 +153,17 @@ printk("initialize_85c30_port start\n");
/*
* Set Write Register 2 to contain the interrupt vector
*/
-printk("initialize_85c30_port 2, %d\n", Port->Chip->vector );
Write_85c30_register( ctrl, 2, Port->Chip->vector );
#endif
/*
* Set Write Register 3 to disable the Receiver
*/
-printk("initialize_85c30_port 0x03, 0x00\n");
Write_85c30_register( ctrl, 0x03, 0x00 );
/*
* Set Write Register 5 to disable the Transmitter
*/
-printk("initialize_85c30_port 5, 0x00\n");
Write_85c30_register( ctrl, 5, 0x00 );
/* WR 6 -- unneeded in asynchronous mode */
@@ -178,13 +173,11 @@ printk("initialize_85c30_port 5, 0x00\n");
/*
* Set Write Register 9 to disable all interrupt sources
*/
-printk("initialize_85c30_port 9, 0x00\n");
Write_85c30_register( ctrl, 9, 0x00 );
/*
* Set Write Register 10 for simple Asynchronous operation
*/
-printk("initialize_85c30_port 0x0a, 0x00\n");
Write_85c30_register( ctrl, 0x0a, 0x00 );
/*
@@ -192,7 +185,6 @@ printk("initialize_85c30_port 0x0a, 0x00\n");
* clock as BRG output and the transmit clock
* as the output source for TRxC pin via register 11
*/
-printk("initialize_85c30_port 0x0b, 0x56\n");
Write_85c30_register( ctrl, 0x0b, 0x56 );
value = baud_constant;
@@ -202,14 +194,12 @@ printk("initialize_85c30_port 0x0b, 0x56\n");
* If the time constans = 1E, then the desire
* baud rate will be equilvalent to 9600, via register 12.
*/
-printk("initialize_85c30_port 0x0c, 0x%x\n", value & 0xff);
Write_85c30_register( ctrl, 0x0c, value & 0xff );
/*
* using register 13
* Setup the upper 8 bits time constants = 0
*/
-printk("initialize_85c30_port 0x0d, 0x%x\n", value>>8);
Write_85c30_register( ctrl, 0x0d, value>>8 );
/*
@@ -218,7 +208,6 @@ printk("initialize_85c30_port 0x0d, 0x%x\n", value>>8);
* rate generator enable with clock from the
* SCC's PCLK input via register 14.
*/
-printk("initialize_85c30_port 0x0e, 0x07\n");
Write_85c30_register( ctrl, 0x0e, 0x07 );
/*
@@ -234,7 +223,6 @@ printk("initialize_85c30_port 0x0e, 0x07\n");
value = 0x01;
value = value | Char_size_85c30[ Setup->read_char_bits ].read_setup;
-printk("initialize_85c30_port 0x03, 0x%x\n", value);
Write_85c30_register( ctrl, 0x03, value );
/*
@@ -249,21 +237,18 @@ printk("initialize_85c30_port 0x03, 0x%x\n", value);
*/
value = 0x8a;
value = value | Char_size_85c30[ Setup->write_char_bits ].write_setup;
-printk("initialize_85c30_port 0x05, 0x%x\n", value);
Write_85c30_register( ctrl, 0x05, value );
/*
* Reset Tx UNDERRUN/EOM LATCH and ERROR
* via register 0
*/
-printk("initialize_85c30_port 0x00, 0xf0\n");
Write_85c30_register( ctrl, 0x00, 0xf0 );
#if CONSOLE_USE_INTERRUPTS
/*
* Set Write Register 1 to interrupt on Rx characters or special condition.
*/
-printk("initialize_85c30_port 1, 0x10\n");
Write_85c30_register( ctrl, 1, 0x10 );
#endif
@@ -271,13 +256,11 @@ printk("initialize_85c30_port 1, 0x10\n");
* Set Write Register 15 to disable extended functions.
*/
-printk("initialize_85c30_port 15, 0x00\n");
Write_85c30_register( ctrl, 15, 0x00 );
/*
* Set the Command Register to Reset Ext/STATUS.
*/
-printk("initialize_85c30_port 0x00, 0x10\n");
Write_85c30_register( ctrl, 0x00, 0x10 );
#if CONSOLE_USE_INTERRUPTS
@@ -288,14 +271,12 @@ printk("initialize_85c30_port 0x00, 0x10\n");
* Enables parity as a special condition.
* Enables Tx interrupt.
*/
-printk("initialize_85c30_port 1, 0x16\n");
Write_85c30_register( ctrl, 1, 0x16 );
/*
* Set Write Register 9 to enable all interrupt sources
* Changed from 0 to a
*/
-printk("initialize_85c30_port 9, 0x0A\n");
Write_85c30_register( ctrl, 9, 0x0A );
/* XXX */
@@ -303,12 +284,10 @@ printk("initialize_85c30_port 9, 0x0A\n");
/*
* Issue reset highest Interrupt Under Service (IUS) command.
*/
-printk("initialize_85c30_port STATUS_REGISTER, 0X38\n");
Write_85c30_register( Port->ctrl, STATUS_REGISTER, 0x38 );
#endif
-printk("initialize_85c30_port end of method\n");
}
/* PAGE