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author | Jennifer Averett <Jennifer.Averett@OARcorp.com> | 2004-11-22 22:13:35 +0000 |
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committer | Jennifer Averett <Jennifer.Averett@OARcorp.com> | 2004-11-22 22:13:35 +0000 |
commit | 270ce1ff6802a56f5daf8329da252489e2c9286e (patch) | |
tree | aac0abc18a1af1a8c1caf24cc1819b27f97c8165 /c/src/lib/libbsp/powerpc/psim/startup/bspstart.c | |
parent | 2004-11-22 Jennifer Averett <jennifer@OARcorp.com> (diff) | |
download | rtems-270ce1ff6802a56f5daf8329da252489e2c9286e.tar.bz2 |
2004-11-22 Jennifer Averett <jennifer@OARcorp.com>
PR 581/bsps
* Makefile.am, bsp_specs, configure.ac, include/bsp.h, include/tm27.h,
start/start.S, startup/bspstart.c, startup/linkcmds,
tools/Makefile.am, tools/psim, vectors/vectors.S, wrapup/Makefile.am:
Convert PSIM to new exception model.
* irq/irq.c, irq/irq.h, irq/irq_asm.S, irq/irq_init.c: New files.
* startup/setvec.c, timer/timer.c: Removed.
Diffstat (limited to '')
-rw-r--r-- | c/src/lib/libbsp/powerpc/psim/startup/bspstart.c | 105 |
1 files changed, 93 insertions, 12 deletions
diff --git a/c/src/lib/libbsp/powerpc/psim/startup/bspstart.c b/c/src/lib/libbsp/powerpc/psim/startup/bspstart.c index 87403907e4..582b116ca9 100644 --- a/c/src/lib/libbsp/powerpc/psim/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/psim/startup/bspstart.c @@ -16,11 +16,31 @@ #include <string.h> #include <fcntl.h> - #include <bsp.h> +#include <bsp/irq.h> #include <rtems/libio.h> #include <rtems/libcsupport.h> #include <rtems/bspIo.h> +#include <libcpu/cpuIdent.h> +#include <libcpu/spr.h> + +SPR_RW(SPRG0) +SPR_RW(SPRG1) + + +extern unsigned long __rtems_end[]; + +void initialize_exceptions(void); + +/* On psim, each click of the decrementer register corresponds + * to 1 instruction. By setting this to 100, we are indicating + * that we are assuming it can execute 100 instructions per + * microsecond. This corresponds to sustaining 1 instruction + * per cycle at 100 Mhz. Whether this is a good guess or not + * is anyone's guess. + */ + +extern int PSIM_INSTRUCTIONS_PER_MICROSECOND; /* * The original table from the application and our copy of it with @@ -29,9 +49,7 @@ extern rtems_configuration_table Configuration; rtems_configuration_table BSP_Configuration; - rtems_cpu_table Cpu_table; -uint32_t bsp_isr_level; /* * Tells us where to put the workspace in case remote debugger is present. @@ -42,6 +60,17 @@ extern uint32_t rdb_start; #endif /* + * PCI Bus Frequency + */ + unsigned int BSP_bus_frequency; + /* + * * Time base divisior (how many tick for 1 second). + * */ + unsigned int BSP_time_base_divisor; + + + +/* * Use the shared implementations of the following routines */ @@ -49,6 +78,25 @@ void bsp_postdriver_hook(void); void bsp_libc_init( void *, uint32_t, int ); /* + * system init stack and soft ir stack size + */ +#define INIT_STACK_SIZE 0x1000 +#define INTR_STACK_SIZE CONFIGURE_INTERRUPT_STACK_MEMORY + + +void BSP_panic(char *s) +{ + printk("%s PANIC %s\n",_RTEMS_version, s); + __asm__ __volatile ("sc"); +} + +void _BSP_Fatal_error(unsigned int v) +{ + printk("%s PANIC ERROR %x\n",_RTEMS_version, v); + __asm__ __volatile ("sc"); +} + +/* * bsp_pretasking_hook * * BSP pretasking hook. Called just before drivers are initialized. @@ -84,16 +132,14 @@ void bsp_pretasking_hook(void) void bsp_start( void ) { - unsigned char *work_space_start; + unsigned char *work_space_start; + register uint32_t intrStack; + register uint32_t *intrStackPtr; -#if 0 /* - * Set MSR to show vectors at 0 XXX + * Note we can not get CPU identification dynamically, so force current_ppc_cpu. */ - _CPU_MSR_Value( msr_value ); - msr_value &= ~PPC_MSR_EP; - _CPU_MSR_SET( msr_value ); -#endif + current_ppc_cpu = PPC_PSIM; /* * Set up our hooks @@ -118,11 +164,14 @@ void bsp_start( void ) Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY; + BSP_bus_frequency = (unsigned int)&PSIM_INSTRUCTIONS_PER_MICROSECOND; + BSP_time_base_divisor = 1; + /* - * The monitor likes the exception table to be at 0x0. + * The simulator likes the exception table to be at 0xfff00000. */ - Cpu_table.exceptions_in_RAM = TRUE; + Cpu_table.exceptions_in_RAM = FALSE; BSP_Configuration.work_space_size += 1024; @@ -136,4 +185,36 @@ void bsp_start( void ) BSP_Configuration.work_space_start = work_space_start; + /* + * Initialize the interrupt related settings + * SPRG1 = software managed IRQ stack + * + * This could be done latter (e.g in IRQ_INIT) but it helps to understand + * some settings below... + */ + intrStack = ((uint32_t) __rtems_end) + + INIT_STACK_SIZE + INTR_STACK_SIZE - CPU_MINIMUM_STACK_FRAME_SIZE; + + /* make sure it's properly aligned */ + intrStack &= ~(CPU_STACK_ALIGNMENT-1); + + /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */ + intrStackPtr = (uint32_t*) intrStack; + *intrStackPtr = 0; + + _write_SPRG1(intrStack); + + /* signal them that we have fixed PR288 - eventually, this should go away */ + _write_SPRG0(PPC_BSP_HAS_FIXED_PR288); + + /* + * Initialize default raw exception hanlders. See vectors/vectors_init.c + */ + initialize_exceptions(); + + /* + * Initalize RTEMS IRQ system + */ + BSP_rtems_irq_mng_init(0); + } |