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authorJoel Sherrill <joel.sherrill@OARcorp.com>1999-11-09 15:38:47 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>1999-11-09 15:38:47 +0000
commitd55af6dd1da85e8f79cf7e86a6f438e56bb458e4 (patch)
tree6e2904c0bef088994e72a924ced15009ff02003d /c/src/lib/libbsp/powerpc/ppcn_60x
parent53b184719a4b85abab08f4972fed2c95d3edbd82 (diff)
downloadrtems-d55af6dd1da85e8f79cf7e86a6f438e56bb458e4.tar.bz2
Now using libchip instead of local precursor to libchip. Untested.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/ppcn_60x')
-rw-r--r--c/src/lib/libbsp/powerpc/ppcn_60x/console/Makefile.in2
-rw-r--r--c/src/lib/libbsp/powerpc/ppcn_60x/console/config.c91
-rw-r--r--c/src/lib/libbsp/powerpc/ppcn_60x/console/console.h44
-rw-r--r--c/src/lib/libbsp/powerpc/ppcn_60x/console/i8042.c1
-rw-r--r--c/src/lib/libbsp/powerpc/ppcn_60x/console/ns16550.c632
-rw-r--r--c/src/lib/libbsp/powerpc/ppcn_60x/console/ns16550.h40
-rw-r--r--c/src/lib/libbsp/powerpc/ppcn_60x/console/ns16550_p.h196
-rw-r--r--c/src/lib/libbsp/powerpc/ppcn_60x/console/z85c30.c917
-rw-r--r--c/src/lib/libbsp/powerpc/ppcn_60x/console/z85c30.h52
-rw-r--r--c/src/lib/libbsp/powerpc/ppcn_60x/console/z85c30_p.h385
10 files changed, 86 insertions, 2274 deletions
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/console/Makefile.in b/c/src/lib/libbsp/powerpc/ppcn_60x/console/Makefile.in
index d3edf9cd55..58c5de814c 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/console/Makefile.in
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/console/Makefile.in
@@ -16,7 +16,7 @@ VPATH = @srcdir@
PGM = ${ARCH}/console.rel
# C source names, if any, go here -- minus the .c
-C_PIECES = console ns16550 z85c30 i8042vga i8042 vga
+C_PIECES = console i8042vga i8042 ns16550cfg z85c30cfg vga
C_FILES = $(C_PIECES:%=%.c)
C_O_FILES = $(C_PIECES:%=${ARCH}/%.o)
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/console/config.c b/c/src/lib/libbsp/powerpc/ppcn_60x/console/config.c
index f41cf486c4..5247ea11a9 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/console/config.c
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/console/config.c
@@ -17,9 +17,13 @@
* $Id$
*/
+#include <libchip/serial.h>
+#include <libchip/mc68681.h>
+#include <libchip/z85c30.h>
#include "i8042vga.h"
-#include "ns16550.h"
-#include "z85c30.h"
+
+#include "ns16550cfg.h"
+#include "z85c30cfg.h"
#include <pci.h>
@@ -27,6 +31,19 @@
#define PMX1553_SLOT 1
/*
+ * Based on BSP configuration information decide whether to do polling IO
+ * or interrupt driven IO.
+ */
+
+#if (CONSOLE_USE_INTERRUPTS)
+#define NS16550_FUNCTIONS &ns16550_fns
+#define Z85C30_FUNCTIONS &z85c30_fns
+#else
+#define NS16550_FUNCTIONS &ns16550_fns_polled
+#define Z85C30_FUNCTIONS &z85c30_fns_polled
+#endif
+
+/*
* Configuration specific probe routines
*/
static boolean config_PMX1553_probe(int minor);
@@ -73,6 +90,7 @@ static boolean config_z85c30_probe(int minor);
console_tbl Console_Port_Tbl[] = {
{
"/dev/vga", /* sDeviceName */
+ SERIAL_CUSTOM, /* deviceType */
&i8042vga_fns, /* pDeviceFns */
NULL, /* deviceProbe */
NULL, /* pDeviceFlow */
@@ -82,11 +100,17 @@ console_tbl Console_Port_Tbl[] = {
I8042_CS, /* ulCtrlPort1 */
0, /* ulCtrlPort2 */
I8042_DATA, /* ulDataPort */
+ Read_ns16550_register, /* getRegister */
+ Write_ns16550_register, /* setRegister */
+ NULL, /* getData */
+ NULL, /* setData */
+ 0, /* ulClock */
PPCN_60X_IRQ_KBD /* ulIntVector */
},
{
"/dev/com1", /* sDeviceName */
- &ns16550_fns, /* pDeviceFns */
+ SERIAL_NS16550, /* deviceType */
+ NS16550_FUNCTIONS, /* pDeviceFns */
NULL, /* deviceProbe */
&ns16550_flow_RTSCTS, /* pDeviceFlow */
16, /* ulMargin */
@@ -95,11 +119,17 @@ console_tbl Console_Port_Tbl[] = {
NS16550_PORT_A, /* ulCtrlPort1 */
0, /* ulCtrlPort2 */
NS16550_PORT_A, /* ulDataPort */
+ Read_ns16550_register, /* getRegister */
+ Write_ns16550_register, /* setRegister */
+ NULL, /* getData */
+ NULL, /* setData */
+ 0, /* ulClock */
PPCN_60X_IRQ_COM1 /* ulIntVector */
},
{
"/dev/ser1", /* sDeviceName */
- &ns16550_fns, /* pDeviceFns */
+ SERIAL_NS16550, /* deviceType */
+ NS16550_FUNCTIONS, /* pDeviceFns */
config_PMX1553_probe, /* deviceProbe */
&ns16550_flow_RTSCTS, /* pDeviceFlow */
80, /* ulMargin */
@@ -108,11 +138,17 @@ console_tbl Console_Port_Tbl[] = {
PMX1553_BUS, /* PCI bus */ /* ulCtrlPort1 */
PMX1553_SLOT, /* PCI slot */ /* ulCtrlPort2 */
1, /* Channel 1-4 */ /* ulDataPort */
+ NULL, /* getRegister */
+ NULL, /* setRegister */
+ NULL, /* getData */
+ NULL, /* setData */
+ 0, /* ulClock */
0 /* RS232 */ /* ulIntVector */
},
{
"/dev/ser2", /* sDeviceName */
- &ns16550_fns, /* pDeviceFns */
+ SERIAL_NS16550, /* deviceType */
+ NS16550_FUNCTIONS, /* pDeviceFns */
config_PMX1553_probe, /* deviceProbe */
&ns16550_flow_RTSCTS, /* pDeviceFlow */
80, /* ulMargin */
@@ -121,11 +157,17 @@ console_tbl Console_Port_Tbl[] = {
PMX1553_BUS, /* PCI bus */ /* ulCtrlPort1 */
PMX1553_SLOT, /* PCI slot */ /* ulCtrlPort2 */
2, /* Channel 1-4 */ /* ulDataPort */
+ Read_ns16550_register, /* getRegister */
+ Write_ns16550_register, /* setRegister */
+ NULL, /* getData */
+ NULL, /* setData */
+ 0, /* ulClock */
0 /* RS232 */ /* ulIntVector */
},
{
"/dev/ser3", /* sDeviceName */
- &ns16550_fns, /* pDeviceFns */
+ SERIAL_NS16550, /* deviceType */
+ NS16550_FUNCTIONS, /* pDeviceFns */
config_PMX1553_probe, /* deviceProbe */
&ns16550_flow_RTSCTS, /* pDeviceFlow */
96, /* ulMargin */
@@ -134,11 +176,17 @@ console_tbl Console_Port_Tbl[] = {
PMX1553_BUS, /* PCI bus */ /* ulCtrlPort1 */
PMX1553_SLOT, /* PCI slot */ /* ulCtrlPort2 */
3, /* Channel 1-4 */ /* ulDataPort */
+ Read_ns16550_register, /* getRegister */
+ Write_ns16550_register, /* setRegister */
+ NULL, /* getData */
+ NULL, /* setData */
+ 0, /* ulClock */
0 /* RS232 */ /* ulIntVector */
},
{
"/dev/ser4", /* sDeviceName */
- &ns16550_fns, /* pDeviceFns */
+ SERIAL_NS16550, /* deviceType */
+ NS16550_FUNCTIONS, /* pDeviceFns */
config_PMX1553_probe, /* deviceProbe */
&ns16550_flow_RTSCTS, /* pDeviceFlow */
96, /* ulMargin */
@@ -147,12 +195,18 @@ console_tbl Console_Port_Tbl[] = {
PMX1553_BUS, /* PCI bus */ /* ulCtrlPort1 */
PMX1553_SLOT, /* PCI slot */ /* ulCtrlPort2 */
4, /* Channel 1-4 */ /* ulDataPort */
+ Read_ns16550_register, /* getRegister */
+ Write_ns16550_register, /* setRegister */
+ NULL, /* getData */
+ NULL, /* setData */
+ 0, /* ulClock */
0 /* RS232 */ /* ulIntVector */
},
#if !PPCN_60X_USE_DINK
{
"/dev/com2", /* sDeviceName */
- &ns16550_fns, /* pDeviceFns */
+ SERIAL_NS16550, /* deviceType */
+ NS16550_FUNCTIONS, /* pDeviceFns */
NULL, /* deviceProbe */
&ns16550_flow_RTSCTS, /* pDeviceFlow */
16, /* ulMargin */
@@ -161,12 +215,18 @@ console_tbl Console_Port_Tbl[] = {
NS16550_PORT_B, /* ulCtrlPort1 */
0, /* ulCtrlPort2 */
NS16550_PORT_B, /* ulDataPort */
+ Read_ns16550_register, /* getRegister */
+ Write_ns16550_register, /* setRegister */
+ NULL, /* getData */
+ NULL, /* setData */
+ 0, /* ulClock */
PPCN_60X_IRQ_COM2 /* ulIntVector */
},
#endif
{
"/dev/com3", /* sDeviceName */
- &z85c30_fns, /* pDeviceFns */
+ SERIAL_Z85C30, /* deviceType */
+ Z85C30_FUNCTIONS, /* pDeviceFns */
config_z85c30_probe, /* deviceProbe */
&z85c30_flow_RTSCTS, /* pDeviceFlow */
16, /* ulMargin */
@@ -175,11 +235,17 @@ console_tbl Console_Port_Tbl[] = {
Z85C30_CTRL_A, /* ulCtrlPort1 */
Z85C30_CTRL_A, /* ulCtrlPort2 */
Z85C30_DATA_A, /* ulDataPort */
+ Read_85c30_register, /* getRegister */
+ Write_85c30_register, /* setRegister */
+ Read_85c30_data, /* getData */
+ Write_85c30_data, /* setData */
+ 0, /* ulClock */
PPCN_60X_IRQ_COM3_4 /* ulIntVector */
},
{
"/dev/com4", /* sDeviceName */
- &z85c30_fns, /* pDeviceFns */
+ SERIAL_Z85C30, /* deviceType */
+ Z85C30_FUNCTIONS, /* pDeviceFns */
config_z85c30_probe, /* deviceProbe */
&z85c30_flow_RTSCTS, /* pDeviceFlow */
16, /* ulMargin */
@@ -188,6 +254,11 @@ console_tbl Console_Port_Tbl[] = {
Z85C30_CTRL_B, /* ulCtrlPort1 */
Z85C30_CTRL_A, /* ulCtrlPort2 */
Z85C30_DATA_B, /* ulDataPort */
+ Read_85c30_register, /* getRegister */
+ Write_85c30_register, /* setRegister */
+ Read_85c30_data, /* getData */
+ Write_85c30_data, /* setData */
+ 0, /* ulClock */
PPCN_60X_IRQ_COM3_4 /* ulIntVector */
}
};
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/console/console.h b/c/src/lib/libbsp/powerpc/ppcn_60x/console/console.h
index 1d6b6fc2b1..38e126f46a 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/console/console.h
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/console/console.h
@@ -20,47 +20,9 @@
*/
#include <ringbuf.h>
-
-typedef struct _console_fns {
- boolean (*deviceProbe)(int minor);
- int (*deviceFirstOpen)(int major, int minor, void *arg);
- int (*deviceLastClose)(int major, int minor, void *arg);
- int (*deviceRead)(int minor);
- int (*deviceWrite)(int minor, const char *buf, int len);
- void (*deviceInitialize)(int minor);
- int (*deviceSetAttributes)(int minor, const struct termios *);
- void (*deviceWritePolled)(int minor, char cChar);
- int deviceOutputUsesInterrupts;
-} console_fns;
-
-typedef struct _console_flow {
- int (*deviceStopRemoteTx)(int minor);
- int (*deviceStartRemoteTx)(int minor);
-} console_flow;
-
-typedef struct _console_tbl {
- char *sDeviceName;
- console_fns *pDeviceFns;
- boolean (*deviceProbe)(int minor);
- console_flow *pDeviceFlow;
- unsigned32 ulMargin;
- unsigned32 ulHysteresis;
- void *pDeviceParams;
- unsigned32 ulCtrlPort1;
- unsigned32 ulCtrlPort2;
- unsigned32 ulDataPort;
- unsigned int ulIntVector;
-} console_tbl;
-
-typedef struct _console_data {
- void *termios_data;
- volatile boolean bActive;
- volatile Ring_buffer_t TxBuffer;
- /*
- * This field may be used for any purpose required by the driver
- */
- void *pDeviceContext;
-} console_data;
+#include <libchip/serial.h>
+#include <libchip/ns16550.h>
+#include <libchip/z85c30.h>
extern console_tbl Console_Port_Tbl[];
extern console_data Console_Port_Data[];
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/console/i8042.c b/c/src/lib/libbsp/powerpc/ppcn_60x/console/i8042.c
index dcfd68e72d..418303e036 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/console/i8042.c
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/console/i8042.c
@@ -24,6 +24,7 @@
#include <rtems.h>
#include <bsp.h>
#include <rtems/libio.h>
+#include <libchip/serial.h>
#include <ringbuf.h>
#include "console.h"
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/console/ns16550.c b/c/src/lib/libbsp/powerpc/ppcn_60x/console/ns16550.c
deleted file mode 100644
index 30c10f73b2..0000000000
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/console/ns16550.c
+++ /dev/null
@@ -1,632 +0,0 @@
-/*
- * This file contains the TTY driver for the NS16550
- *
- * COPYRIGHT (c) 1998 by Radstone Technology
- *
- *
- * THIS FILE IS PROVIDED TO YOU, THE USER, "AS IS", WITHOUT WARRANTY OF ANY
- * KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK
- * AS TO THE QUALITY AND PERFORMANCE OF ALL CODE IN THIS FILE IS WITH YOU.
- *
- * You are hereby granted permission to use, copy, modify, and distribute
- * this file, provided that this notice, plus the above copyright notice
- * and disclaimer, appears in all copies. Radstone Technology will provide
- * no support for this code.
- *
- * This driver uses the termios pseudo driver.
- */
-
-#include <rtems.h>
-#include <bsp.h>
-#include <rtems/libio.h>
-#include <stdlib.h>
-
-#include "console.h"
-#include "ns16550_p.h"
-
-/*
- * Flow control is only supported when using interrupts
- */
-console_flow ns16550_flow_RTSCTS =
-{
- ns16550_negate_RTS, /* deviceStopRemoteTx */
- ns16550_assert_RTS /* deviceStartRemoteTx */
-};
-
-console_flow ns16550_flow_DTRCTS =
-{
- ns16550_negate_DTR, /* deviceStopRemoteTx */
- ns16550_assert_DTR /* deviceStartRemoteTx */
-};
-
-console_fns ns16550_fns =
-{
- ns16550_probe, /* deviceProbe */
- ns16550_open, /* deviceFirstOpen */
- ns16550_flush, /* deviceLastClose */
- NULL, /* deviceRead */
- ns16550_write_support_int, /* deviceWrite */
- ns16550_initialize_interrupts, /* deviceInitialize */
- ns16550_write_polled, /* deviceWritePolled */
- FALSE, /* deviceOutputUsesInterrupts */
-};
-
-console_fns ns16550_fns_polled =
-{
- ns16550_probe, /* deviceProbe */
- ns16550_open, /* deviceFirstOpen */
- ns16550_close, /* deviceLastClose */
- ns16550_inbyte_nonblocking_polled, /* deviceRead */
- ns16550_write_support_polled, /* deviceWrite */
- ns16550_init, /* deviceInitialize */
- ns16550_write_polled, /* deviceWritePolled */
- FALSE, /* deviceOutputUsesInterrupts */
-};
-
-/*
- * Console Device Driver Entry Points
- */
-static boolean ns16550_probe(int minor)
-{
- /*
- * If the configuration dependant probe has located the device then
- * assume it is there
- */
- return(TRUE);
-}
-
-static void ns16550_init(int minor)
-{
- PSP_READ_REGISTERS pNS16550Read;
- PSP_WRITE_REGISTERS pNS16550Write;
- unsigned8 ucTrash;
- unsigned8 ucDataByte;
- unsigned32 ulBaudDivisor;
- ns16550_context *pns16550Context;
-
- pns16550Context=(ns16550_context *)malloc(sizeof(ns16550_context));
-
- Console_Port_Data[minor].pDeviceContext=(void *)pns16550Context;
- pns16550Context->ucModemCtrl=SP_MODEM_IRQ;
-
- pNS16550Read=(PSP_READ_REGISTERS)Console_Port_Tbl[minor].ulCtrlPort1;
- pNS16550Write=(PSP_WRITE_REGISTERS)pNS16550Read;
-
- /* Clear the divisor latch, clear all interrupt enables,
- * and reset and
- * disable the FIFO's.
- */
-
- outport_byte(&pNS16550Write->LineControl, 0x0);
- outport_byte(&pNS16550Write->InterruptEnable, 0x0);
-
- /* Set the divisor latch and set the baud rate. */
-
- ulBaudDivisor=NS16550_Baud(
- (unsigned32)Console_Port_Tbl[minor].pDeviceParams);
- ucDataByte = SP_LINE_DLAB;
- outport_byte(&pNS16550Write->LineControl, ucDataByte);
- outport_byte(&pNS16550Write->TransmitBuffer, ulBaudDivisor&0xff);
- outport_byte(&pNS16550Write->InterruptEnable, (ulBaudDivisor>>8)&0xff);
-
- /* Clear the divisor latch and set the character size to eight bits */
- /* with one stop bit and no parity checking. */
-
- ucDataByte = EIGHT_BITS;
- outport_byte(&pNS16550Write->LineControl, ucDataByte);
-
- /* Enable and reset transmit and receive FIFOs. TJA */
- ucDataByte = SP_FIFO_ENABLE;
- outport_byte(&pNS16550Write->FifoControl, ucDataByte);
-
- ucDataByte = SP_FIFO_ENABLE | SP_FIFO_RXRST | SP_FIFO_TXRST;
- outport_byte(&pNS16550Write->FifoControl, ucDataByte);
-
- /*
- * Disable interrupts
- */
- ucDataByte = 0;
- outport_byte(&pNS16550Write->InterruptEnable, ucDataByte);
-
- /* Set data terminal ready. */
- /* And open interrupt tristate line */
-
- outport_byte(&pNS16550Write->ModemControl,
- pns16550Context->ucModemCtrl);
-
- inport_byte(&pNS16550Read->LineStatus, ucTrash);
- inport_byte(&pNS16550Read->ReceiveBuffer, ucTrash);
-}
-
-static int ns16550_open(
- int major,
- int minor,
- void * arg
-)
-{
- PSP_WRITE_REGISTERS pNS16550Write;
-
- pNS16550Write=(PSP_WRITE_REGISTERS)Console_Port_Tbl[minor].ulCtrlPort1;
-
- /*
- * Assert DTR
- */
- if(Console_Port_Tbl[minor].pDeviceFlow
- !=&ns16550_flow_DTRCTS)
- {
- ns16550_assert_DTR(minor);
- }
-
- return(RTEMS_SUCCESSFUL);
-}
-
-static int ns16550_close(
- int major,
- int minor,
- void * arg
-)
-{
- PSP_WRITE_REGISTERS pNS16550Write;
-
- pNS16550Write=(PSP_WRITE_REGISTERS)Console_Port_Tbl[minor].ulCtrlPort1;
-
- /*
- * Negate DTR
- */
- if(Console_Port_Tbl[minor].pDeviceFlow
- !=&ns16550_flow_DTRCTS)
- {
- ns16550_negate_DTR(minor);
- }
-
- return(RTEMS_SUCCESSFUL);
-}
-
-/*
- * ns16550_write_polled
- */
-static void ns16550_write_polled(
- int minor,
- char cChar
-)
-{
- PSP_READ_REGISTERS pNS16550Read;
- PSP_WRITE_REGISTERS pNS16550Write;
- unsigned char ucLineStatus;
- int iTimeout;
-
- pNS16550Read=(PSP_READ_REGISTERS)Console_Port_Tbl[minor].ulCtrlPort1;
- pNS16550Write=(PSP_WRITE_REGISTERS)pNS16550Read;
-
- /*
- * wait for transmitter holding register to be empty
- */
- iTimeout=1000;
- inport_byte(&pNS16550Read->LineStatus, ucLineStatus);
- while ((ucLineStatus & SP_LSR_THOLD) == 0)
- {
- /*
- * Yield while we wait
- */
- if(_System_state_Is_up(_System_state_Get()))
- {
- rtems_task_wake_after(RTEMS_YIELD_PROCESSOR);
- }
- inport_byte(&pNS16550Read->LineStatus, ucLineStatus);
- if(!--iTimeout)
- {
- break;
- }
- }
-
- /*
- * transmit character
- */
- outport_byte(&pNS16550Write->TransmitBuffer, cChar);
-}
-
-/*
- * These routines provide control of the RTS and DTR lines
- */
-/*
- * ns16550_assert_RTS
- */
-static void ns16550_assert_RTS(int minor)
-{
- PSP_WRITE_REGISTERS pNS16550Write;
- unsigned32 Irql;
- ns16550_context *pns16550Context;
-
- pns16550Context=(ns16550_context *)
- Console_Port_Data[minor].pDeviceContext;
-
- pNS16550Write=(PSP_WRITE_REGISTERS)Console_Port_Tbl[minor].ulCtrlPort1;
-
- /*
- * Assert RTS
- */
- rtems_interrupt_disable(Irql);
- pns16550Context->ucModemCtrl|=SP_MODEM_RTS;
- outport_byte(&pNS16550Write->ModemControl,
- pns16550Context->ucModemCtrl);
- rtems_interrupt_enable(Irql);
-}
-
-/*
- * ns16550_negate_RTS
- */
-static void ns16550_negate_RTS(int minor)
-{
- PSP_WRITE_REGISTERS pNS16550Write;
- unsigned32 Irql;
- ns16550_context *pns16550Context;
-
- pns16550Context=(ns16550_context *)
- Console_Port_Data[minor].pDeviceContext;
-
- pNS16550Write=(PSP_WRITE_REGISTERS)Console_Port_Tbl[minor].ulCtrlPort1;
-
- /*
- * Negate RTS
- */
- rtems_interrupt_disable(Irql);
- pns16550Context->ucModemCtrl&=~SP_MODEM_RTS;
- outport_byte(&pNS16550Write->ModemControl,
- pns16550Context->ucModemCtrl);
- rtems_interrupt_enable(Irql);
-}
-
-/*
- * These flow control routines utilise a connection from the local DTR
- * line to the remote CTS line
- */
-/*
- * ns16550_assert_DTR
- */
-static void ns16550_assert_DTR(int minor)
-{
- PSP_WRITE_REGISTERS pNS16550Write;
- unsigned32 Irql;
- ns16550_context *pns16550Context;
-
- pns16550Context=(ns16550_context *)
- Console_Port_Data[minor].pDeviceContext;
-
- pNS16550Write=(PSP_WRITE_REGISTERS)Console_Port_Tbl[minor].ulCtrlPort1;
-
- /*
- * Assert DTR
- */
- rtems_interrupt_disable(Irql);
- pns16550Context->ucModemCtrl|=SP_MODEM_DTR;
- outport_byte(&pNS16550Write->ModemControl,
- pns16550Context->ucModemCtrl);
- rtems_interrupt_enable(Irql);
-}
-
-/*
- * ns16550_negate_DTR
- */
-static void ns16550_negate_DTR(int minor)
-{
- PSP_WRITE_REGISTERS pNS16550Write;
- unsigned32 Irql;
- ns16550_context *pns16550Context;
-
- pns16550Context=(ns16550_context *)
- Console_Port_Data[minor].pDeviceContext;
-
- pNS16550Write=(PSP_WRITE_REGISTERS)Console_Port_Tbl[minor].ulCtrlPort1;
-
- /*
- * Negate DTR
- */
- rtems_interrupt_disable(Irql);
- pns16550Context->ucModemCtrl&=~SP_MODEM_DTR;
- outport_byte(&pNS16550Write->ModemControl,
- pns16550Context->ucModemCtrl);
- rtems_interrupt_enable(Irql);
-}
-
-/*
- * ns16550_isr
- *
- * This routine is the console interrupt handler for COM1 and COM2
- *
- * Input parameters:
- * vector - vector number
- *
- * Output parameters: NONE
- *
- * Return values: NONE
- */
-
-static void ns16550_process(
- int minor
-)
-{
- PSP_READ_REGISTERS pNS16550Read;
- PSP_WRITE_REGISTERS pNS16550Write;
- volatile unsigned8 ucLineStatus, ucInterruptId;
- char cChar;
-
- pNS16550Read=(PSP_READ_REGISTERS)Console_Port_Tbl[minor].ulCtrlPort1;
- pNS16550Write=(PSP_WRITE_REGISTERS)pNS16550Read;
-
- do
- {
- /*
- * Deal with any received characters
- */
- while(TRUE)
- {
- inport_byte(&pNS16550Read->LineStatus, ucLineStatus);
- if(~ucLineStatus & SP_LSR_RDY)
- {
- break;
- }
- inport_byte(&pNS16550Read->ReceiveBuffer, cChar);
- rtems_termios_enqueue_raw_characters(
- Console_Port_Data[minor].termios_data,
- &cChar, 1 );
- }
-
- while(TRUE)
- {
- if(Ring_buffer_Is_empty(
- &Console_Port_Data[minor].TxBuffer))
- {
- Console_Port_Data[minor].bActive=FALSE;
- if(Console_Port_Tbl[minor].pDeviceFlow
- !=&ns16550_flow_RTSCTS)
- {
- ns16550_negate_RTS(minor);
- }
- /*
- * There is no data to transmit
- */
- break;
- }
-
- inport_byte(&pNS16550Read->LineStatus, ucLineStatus);
- if(~ucLineStatus & SP_LSR_THOLD)
- {
- /*
- * We'll get another interrupt when
- * the transmitter holding reg. becomes
- * free again
- */
- break;
- }
-
- Ring_buffer_Remove_character(
- &Console_Port_Data[minor].TxBuffer,
- cChar);
- /*
- * transmit character
- */
- outport_byte(&pNS16550Write->TransmitBuffer, cChar);
- }
-
- inport_byte(&pNS16550Read->InterruptId, ucInterruptId);
- }
- while((ucInterruptId&0xf)!=0x1);
-}
-
-static rtems_isr ns16550_isr(
- rtems_vector_number vector
-)
-{
- int minor;
-
- for(minor=0;minor<Console_Port_Count;minor++)
- {
- if(vector==Console_Port_Tbl[minor].ulIntVector)
- {
- ns16550_process(minor);
- }
- }
-}
-
-/*
- * ns16550_flush
- */
-static int ns16550_flush(int major, int minor, void *arg)
-{
- while(!Ring_buffer_Is_empty(&Console_Port_Data[minor].TxBuffer))
- {
- /*
- * Yield while we wait
- */
- if(_System_state_Is_up(_System_state_Get()))
- {
- rtems_task_wake_after(RTEMS_YIELD_PROCESSOR);
- }
- }
-
- ns16550_close(major, minor, arg);
-
- return(RTEMS_SUCCESSFUL);
-}
-
-/*
- * ns16550_initialize_interrupts
- *
- * This routine initializes the console's receive and transmit
- * ring buffers and loads the appropriate vectors to handle the interrupts.
- *
- * Input parameters: NONE
- *
- * Output parameters: NONE
- *
- * Return values: NONE
- */
-
-static void ns16550_enable_interrupts(
- int minor
-)
-{
- PSP_WRITE_REGISTERS pNS16550Write;
- unsigned8 ucDataByte;
-
- pNS16550Write=(PSP_WRITE_REGISTERS)Console_Port_Tbl[minor].ulCtrlPort1;
-
- /*
- * Enable interrupts
- */
- ucDataByte = SP_INT_RX_ENABLE | SP_INT_TX_ENABLE;
- outport_byte(&pNS16550Write->InterruptEnable, ucDataByte);
-
-}
-
-static void ns16550_initialize_interrupts(int minor)
-{
- ns16550_init(minor);
-
- Ring_buffer_Initialize(&Console_Port_Data[minor].TxBuffer);
-
- Console_Port_Data[minor].bActive = FALSE;
-
- set_vector(ns16550_isr,
- Console_Port_Tbl[minor].ulIntVector,
- 1);
-
- ns16550_enable_interrupts(minor);
-}
-
-/*
- * ns16550_write_support_int
- *
- * Console Termios output entry point.
- *
- */
-static int ns16550_write_support_int(
- int minor,
- const char *buf,
- int len)
-{
- int i;
- unsigned32 Irql;
-
- for(i=0; i<len;)
- {
- if(Ring_buffer_Is_full(&Console_Port_Data[minor].TxBuffer))
- {
- if(!Console_Port_Data[minor].bActive)
- {
- /*
- * Wake up the device
- */
- rtems_interrupt_disable(Irql);
- Console_Port_Data[minor].bActive = TRUE;
- if(Console_Port_Tbl[minor].pDeviceFlow
- !=&ns16550_flow_RTSCTS)
- {
- ns16550_assert_RTS(minor);
- }
- ns16550_process(minor);
- rtems_interrupt_enable(Irql);
- }
- else
- {
- /*
- * Yield
- */
- rtems_task_wake_after(RTEMS_YIELD_PROCESSOR);
- }
-
- /*
- * Wait for ring buffer to empty
- */
- continue;
- }
- else
- {
- Ring_buffer_Add_character(
- &Console_Port_Data[minor].TxBuffer,
- buf[i]);
- i++;
- }
- }
-
- /*
- * Ensure that characters are on the way
- */
- if(!Console_Port_Data[minor].bActive)
- {
- /*
- * Wake up the device
- */
- rtems_interrupt_disable(Irql);
- Console_Port_Data[minor].bActive = TRUE;
- if(Console_Port_Tbl[minor].pDeviceFlow
- !=&ns16550_flow_RTSCTS)
- {
- ns16550_assert_RTS(minor);
- }
- ns16550_process(minor);
- rtems_interrupt_enable(Irql);
- }
-
- return (len);
-}
-
-/*
- * ns16550_write_support_polled
- *
- * Console Termios output entry point.
- *
- */
-static int ns16550_write_support_polled(
- int minor,
- const char *buf,
- int len)
-{
- int nwrite = 0;
-
- /*
- * poll each byte in the string out of the port.
- */
- while (nwrite < len)
- {
- /*
- * transmit character
- */
- ns16550_write_polled(minor, *buf++);
- nwrite++;
- }
-
- /*
- * return the number of bytes written.
- */
- return nwrite;
-}
-
-/*
- * ns16550_inbyte_nonblocking_polled
- *
- * Console Termios polling input entry point.
- */
-
-static int ns16550_inbyte_nonblocking_polled(
- int minor
-)
-{
- PSP_READ_REGISTERS pNS16550Read;
- unsigned char ucLineStatus;
- char cChar;
-
- pNS16550Read=(PSP_READ_REGISTERS)Console_Port_Tbl[minor].ulCtrlPort1;
-
- inport_byte(&pNS16550Read->LineStatus, ucLineStatus);
- if(ucLineStatus & SP_LSR_RDY)
- {
- inport_byte(&pNS16550Read->ReceiveBuffer, cChar);
- return((int)cChar);
- }
- else
- {
- return(-1);
- }
-}
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/console/ns16550.h b/c/src/lib/libbsp/powerpc/ppcn_60x/console/ns16550.h
deleted file mode 100644
index e797ba2244..0000000000
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/console/ns16550.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * COPYRIGHT (c) 1998 by Radstone Technology
- *
- *
- * THIS FILE IS PROVIDED TO YOU, THE USER, "AS IS", WITHOUT WARRANTY OF ANY
- * KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK
- * AS TO THE QUALITY AND PERFORMANCE OF ALL CODE IN THIS FILE IS WITH YOU.
- *
- * You are hereby granted permission to use, copy, modify, and distribute
- * this file, provided that this notice, plus the above copyright notice
- * and disclaimer, appears in all copies. Radstone Technology will provide
- * no support for this code.
- *
- */
-
-#ifndef _NS16550_H_
-#define _NS16550_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*
- * Driver function table
- */
-extern console_fns ns16550_fns;
-extern console_fns ns16550_fns_polled;
-
-/*
- * Flow control function tables
- */
-extern console_flow ns16550_flow_RTSCTS;
-extern console_flow ns16550_flow_DTRCTS;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _NS16550_H_ */
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/console/ns16550_p.h b/c/src/lib/libbsp/powerpc/ppcn_60x/console/ns16550_p.h
deleted file mode 100644
index 7f7f51afa9..0000000000
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/console/ns16550_p.h
+++ /dev/null
@@ -1,196 +0,0 @@
-/*
- * COPYRIGHT (c) 1998 by Radstone Technology
- *
- *
- * THIS FILE IS PROVIDED TO YOU, THE USER, "AS IS", WITHOUT WARRANTY OF ANY
- * KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK
- * AS TO THE QUALITY AND PERFORMANCE OF ALL CODE IN THIS FILE IS WITH YOU.
- *
- * You are hereby granted permission to use, copy, modify, and distribute
- * this file, provided that this notice, plus the above copyright notice
- * and disclaimer, appears in all copies. Radstone Technology will provide
- * no support for this code.
- *
- */
-
-#ifndef _NS16550_P_H_
-#define _NS16550_P_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-/*
- * Define serial port read registers structure.
- */
-
-typedef volatile struct _SP_READ_REGISTERS {
- unsigned char ReceiveBuffer;
- unsigned char InterruptEnable;
- unsigned char InterruptId;
- unsigned char LineControl;
- unsigned char ModemControl;
- unsigned char LineStatus;
- unsigned char ModemStatus;
- unsigned char ScratchPad;
-} SP_READ_REGISTERS, *PSP_READ_REGISTERS;
-
-/*
- * Define serial port write registers structure.
- */
-
-typedef volatile struct _SP_WRITE_REGISTERS {
- unsigned char TransmitBuffer;
- unsigned char InterruptEnable;
- unsigned char FifoControl;
- unsigned char LineControl;
- unsigned char ModemControl;
- unsigned char Reserved1;
- unsigned char ModemStatus;
- unsigned char ScratchPad;
-} SP_WRITE_REGISTERS, *PSP_WRITE_REGISTERS;
-
-/*
- * Define serial port interrupt enable register structure.
- */
-
-#define SP_INT_RX_ENABLE 0x01
-#define SP_INT_TX_ENABLE 0x02
-#define SP_INT_LS_ENABLE 0x04
-#define SP_INT_MS_ENABLE 0x08
-
-/*
- * Define serial port interrupt id register structure.
- */
-
-typedef struct _SP_INTERRUPT_ID {
- unsigned char InterruptPending : 1;
- unsigned char Identification : 3;
- unsigned char Reserved1 : 2;
- unsigned char FifoEnabled : 2;
-} SP_INTERRUPT_ID, *PSP_INTERRUPT_ID;
-
-/*
- * Define serial port fifo control register structure.
- */
-#define SP_FIFO_ENABLE 0x01
-#define SP_FIFO_RXRST 0x02
-#define SP_FIFO_TXRST 0x04
-#define SP_FIFO_DMA 0x08
-#define SP_FIFO_RXLEVEL 0xc0
-
-/*
- * Define serial port line control register structure.
- */
-#define SP_LINE_SIZE 0x03
-#define SP_LINE_STOP 0x04
-#define SP_LINE_PAR 0x08
-#define SP_LINE_ODD 0x10
-#define SP_LINE_STICK 0x20
-#define SP_LINE_BREAK 0x40
-#define SP_LINE_DLAB 0x80
-
-/*
- * Line status register character size definitions.
- */
-#define FIVE_BITS 0x0 /* five bits per character */
-#define SIX_BITS 0x1 /* six bits per character */
-#define SEVEN_BITS 0x2 /* seven bits per character */
-#define EIGHT_BITS 0x3 /* eight bits per character */
-
-/*
- * Line speed divisor definition.
- */
-#define NS16550_Baud(baud_rate) (115200/baud_rate)
-
-/*
- * Define serial port modem control register structure.
- */
-#define SP_MODEM_DTR 0x01
-#define SP_MODEM_RTS 0x02
-#define SP_MODEM_IRQ 0x08
-#define SP_MODEM_LOOP 0x10
-#define SP_MODEM_DIV4 0x80
-
-/*
- * Define serial port line status register structure.
- */
-#define SP_LSR_RDY 0x01
-#define SP_LSR_EOVRUN 0x02
-#define SP_LSR_EPAR 0x04
-#define SP_LSR_EFRAME 0x08
-#define SP_LSR_BREAK 0x10
-#define SP_LSR_THOLD 0x20
-#define SP_LSR_TX 0x40
-#define SP_LSR_EFIFO 0x80
-
-typedef struct _ns16550_context
-{
- unsigned8 ucModemCtrl;
-} ns16550_context;
-
-/*
- * Driver functions
- */
-static boolean ns16550_probe(int minor);
-
-static void ns16550_init(int minor);
-
-static int ns16550_open(
- int major,
- int minor,
- void * arg
-);
-
-static int ns16550_close(
- int major,
- int minor,
- void * arg
-);
-
-static void ns16550_write_polled(
- int minor,
- char cChar
-);
-
-static void ns16550_assert_RTS(
- int minor
-);
-
-static void ns16550_negate_RTS(
- int minor
-);
-
-static void ns16550_assert_DTR(
- int minor
-);
-
-static void ns16550_negate_DTR(
- int minor
-);
-
-static void ns16550_initialize_interrupts(int minor);
-
-static int ns16550_flush(int major, int minor, void *arg);
-
-static int ns16550_write_support_int(
- int minor,
- const char *buf,
- int len
-);
-
-static int ns16550_write_support_polled(
- int minor,
- const char *buf,
- int len
- );
-
-static int ns16550_inbyte_nonblocking_polled(
- int minor
-);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _NS16550_P_H_ */
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/console/z85c30.c b/c/src/lib/libbsp/powerpc/ppcn_60x/console/z85c30.c
deleted file mode 100644
index 720117dc8d..0000000000
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/console/z85c30.c
+++ /dev/null
@@ -1,917 +0,0 @@
-/*
- * This file contains the console driver chip level routines for the
- * z85c30 chip.
- *
- * COPYRIGHT (c) 1998 by Radstone Technology
- *
- *
- * THIS FILE IS PROVIDED TO YOU, THE USER, "AS IS", WITHOUT WARRANTY OF ANY
- * KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK
- * AS TO THE QUALITY AND PERFORMANCE OF ALL CODE IN THIS FILE IS WITH YOU.
- *
- * You are hereby granted permission to use, copy, modify, and distribute
- * this file, provided that this notice, plus the above copyright notice
- * and disclaimer, appears in all copies. Radstone Technology will provide
- * no support for this code.
- *
- * COPYRIGHT (c) 1989-1997.
- * On-Line Applications Research Corporation (OAR).
- * Copyright assigned to U.S. Government, 1994.
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.OARcorp.com/rtems/license.html.
- *
- * $Id:
- */
-
-#include <rtems.h>
-#include <bsp.h>
-#include <rtems/libio.h>
-#include <stdlib.h>
-
-#include "console.h"
-#include "z85c30_p.h"
-
-/*
- * Flow control is only supported when using interrupts
- */
-console_flow z85c30_flow_RTSCTS =
-{
- z85c30_negate_RTS, /* deviceStopRemoteTx */
- z85c30_assert_RTS /* deviceStartRemoteTx */
-};
-
-console_flow z85c30_flow_DTRCTS =
-{
- z85c30_negate_DTR, /* deviceStopRemoteTx */
- z85c30_assert_DTR /* deviceStartRemoteTx */
-};
-
-/*
- * Exported driver function table
- */
-console_fns z85c30_fns =
-{
- z85c30_probe, /* deviceProbe */
- z85c30_open, /* deviceFirstOpen */
- z85c30_flush, /* deviceLastClose */
- NULL, /* deviceRead */
- z85c30_write_support_int, /* deviceWrite */
- z85c30_initialize_interrupts, /* deviceInitialize */
- z85c30_write_polled, /* deviceWritePolled */
- FALSE, /* deviceOutputUsesInterrupts */
-};
-
-console_fns z85c30_fns_polled =
-{
- z85c30_probe, /* deviceProbe */
- z85c30_open, /* deviceFirstOpen */
- z85c30_close, /* deviceLastClose */
- z85c30_inbyte_nonblocking_polled, /* deviceRead */
- z85c30_write_support_polled, /* deviceWrite */
- z85c30_init, /* deviceInitialize */
- z85c30_write_polled, /* deviceWritePolled */
- FALSE, /* deviceOutputUsesInterrupts */
-};
-
-/*
- * Read_85c30_register
- *
- * Read a Z85c30 register
- */
-static unsigned8 Read_85c30_register(
- unsigned32 ulCtrlPort,
- unsigned8 ucRegNum
-)
-{
- unsigned8 ucData;
-
- outport_byte(ulCtrlPort, ucRegNum);
-
- inport_byte(ulCtrlPort, ucData);
-
- return ucData;
-}
-
-/*
- * Write_85c30_register
- *
- * Write a Z85c30 register
- */
-static void Write_85c30_register(
- unsigned32 ulCtrlPort,
- unsigned8 ucRegNum,
- unsigned8 ucData
-)
-{
- if(ucRegNum!=SCC_WR0_SEL_WR0)
- {
- outport_byte(ulCtrlPort, ucRegNum);
- }
- outport_byte(ulCtrlPort, ucData);
-}
-
-/*
- * Read_85c30_data
- *
- * Read a Z85c30 data register
- */
-static unsigned8 Read_85c30_data(
- unsigned32 ulDataPort
-)
-{
- unsigned8 ucData;
-
- inport_byte(ulDataPort, ucData);
-
- return ucData;
-}
-
-/*
- * Write_85c30_data
- *
- * Write a Z85c30 data register
- */
-static void Write_85c30_data(
- unsigned32 ulDataPort,
- unsigned8 ucData
-)
-{
- outport_byte(ulDataPort, ucData);
-}
-
-/*
- * z85c30_initialize_port
- *
- * initialize a z85c30 Port
- */
-static void z85c30_initialize_port(
- int minor
-)
-{
- unsigned32 ulCtrlPort;
- unsigned32 ulBaudDivisor;
-
- ulCtrlPort=Console_Port_Tbl[minor].ulCtrlPort1;
-
- /*
- * Using register 4
- * Set up the clock rate is 16 times the data
- * rate, 8 bit sync char, 1 stop bit, no parity
- */
- Write_85c30_register(ulCtrlPort,
- SCC_WR0_SEL_WR4,
- SCC_WR4_1_STOP |
- SCC_WR4_16_CLOCK);
-
- /*
- * Set up for 8 bits/character on receive with
- * receiver disable via register 3
- */
- Write_85c30_register(ulCtrlPort,
- SCC_WR0_SEL_WR3,
- SCC_WR3_RX_8_BITS);
-
- /*
- * Set up for 8 bits/character on transmit
- * with transmitter disable via register 5
- */
- Write_85c30_register(ulCtrlPort,
- SCC_WR0_SEL_WR5,
- SCC_WR5_TX_8_BITS);
-
- /*
- * Clear misc control bits
- */
- Write_85c30_register(ulCtrlPort,
- SCC_WR0_SEL_WR10,
- 0x00);
-
- /*
- * Setup the source of the receive and xmit
- * clock as BRG output and the transmit clock
- * as the output source for TRxC pin via register 11
- */
- Write_85c30_register(ulCtrlPort,
- SCC_WR0_SEL_WR11,
- SCC_WR11_OUT_BR_GEN |
- SCC_WR11_TRXC_OI |
- SCC_WR11_TX_BR_GEN |
- SCC_WR11_RX_BR_GEN);
-
- ulBaudDivisor=Z85C30_Baud(
- (unsigned32)Console_Port_Tbl[minor].pDeviceParams);
- /*
- * Setup the lower 8 bits time constants=1E.
- * If the time constans=1E, then the desire
- * baud rate will be equilvalent to 9600, via register 12.
- */
- Write_85c30_register(ulCtrlPort,
- SCC_WR0_SEL_WR12,
- ulBaudDivisor&0xff);
-
- /*
- * using register 13
- * Setup the upper 8 bits time constant
- */
- Write_85c30_register(ulCtrlPort,
- SCC_WR0_SEL_WR13,
- (ulBaudDivisor>>8)&0xff);
-
- /*
- * Enable the baud rate generator enable with clock from the
- * SCC's PCLK input via register 14.
- */
- Write_85c30_register(ulCtrlPort,
- SCC_WR0_SEL_WR14,
- SCC_WR14_BR_EN |
- SCC_WR14_BR_SRC |
- SCC_WR14_NULL);
-
- /*
- * We are only interested in CTS state changes
- */
- Write_85c30_register(ulCtrlPort,
- SCC_WR0_SEL_WR15,
- SCC_WR15_CTS_IE);
-
- /*
- * Reset errors
- */
- Write_85c30_register(ulCtrlPort,
- SCC_WR0_SEL_WR0,
- SCC_WR0_RST_INT);
- Write_85c30_register(ulCtrlPort,
- SCC_WR0_SEL_WR0,
- SCC_WR0_ERR_RST);
-
- /*
- * Enable the receiver via register 3
- */
- Write_85c30_register(ulCtrlPort,
- SCC_WR0_SEL_WR3,
- SCC_WR3_RX_8_BITS |
- SCC_WR3_RX_EN);
-
- /*
- * Enable the transmitter pins set via register 5.
- */
- Write_85c30_register(ulCtrlPort,
- SCC_WR0_SEL_WR5,
- SCC_WR5_TX_8_BITS |
- SCC_WR5_TX_EN);
-
- /*
- * Disable interrupts
- */
- Write_85c30_register(ulCtrlPort,
- SCC_WR0_SEL_WR1,
- 0);
-
- /*
- * Reset TX CRC
- */
- Write_85c30_register(ulCtrlPort,
- SCC_WR0_SEL_WR0,
- SCC_WR0_RST_TX_CRC);
-
- /*
- * Reset interrupts
- */
- Write_85c30_register(ulCtrlPort,
- SCC_WR0_SEL_WR0,
- SCC_WR0_RST_INT);
-}
-
-static int z85c30_open(
- int major,
- int minor,
- void * arg
-)
-{
- /*
- * Assert DTR
- */
- if(Console_Port_Tbl[minor].pDeviceFlow
- !=&z85c30_flow_DTRCTS)
- {
- z85c30_assert_DTR(minor);
- }
-
- return(RTEMS_SUCCESSFUL);
-}
-
-static int z85c30_close(
- int major,
- int minor,
- void * arg
-)
-{
- /*
- * Negate DTR
- */
- if(Console_Port_Tbl[minor].pDeviceFlow
- !=&z85c30_flow_DTRCTS)
- {
- z85c30_negate_DTR(minor);
- }
-
- return(RTEMS_SUCCESSFUL);
-}
-
-/*
- * z85c30_write_polled
- *
- * This routine transmits a character using polling.
- */
-static void z85c30_write_polled(
- int minor,
- char cChar
-)
-{
- volatile unsigned8 z85c30_status;
- unsigned32 ulCtrlPort;
-
- ulCtrlPort=Console_Port_Tbl[minor].ulCtrlPort1;
-
- /*
- * Wait for the Transmit buffer to indicate that it is empty.
- */
- z85c30_status=Read_85c30_register(ulCtrlPort,
- SCC_WR0_SEL_RD0);
- while(!Z85C30_Status_Is_TX_buffer_empty(z85c30_status))
- {
- /*
- * Yield while we wait
- */
- if(_System_state_Is_up(_System_state_Get()))
- {
- rtems_task_wake_after(RTEMS_YIELD_PROCESSOR);
- }
- z85c30_status=Read_85c30_register(ulCtrlPort,
- SCC_WR0_SEL_RD0);
- }
-
- /*
- * Write the character.
- */
- Write_85c30_data(Console_Port_Tbl[minor].ulDataPort, cChar);
-}
-
-/*
- * Console Device Driver Entry Points
- */
-static boolean z85c30_probe(int minor)
-{
- /*
- * If the configuration dependant probe has located the device then
- * assume it is there
- */
- return(TRUE);
-}
-
-static void z85c30_init(int minor)
-{
- unsigned32 ulCtrlPort;
- unsigned8 dummy;
- z85c30_context *pz85c30Context;
-
- pz85c30Context=(z85c30_context *)malloc(sizeof(z85c30_context));
-
- Console_Port_Data[minor].pDeviceContext=(void *)pz85c30Context;
- pz85c30Context->ucModemCtrl=SCC_WR5_TX_8_BITS | SCC_WR5_TX_EN;
-
- ulCtrlPort=Console_Port_Tbl[minor].ulCtrlPort1;
- if(ulCtrlPort==Console_Port_Tbl[minor].ulCtrlPort2)
- {
- /*
- * This is channel A
- */
- /*
- * Ensure port state machine is reset
- */
- inport_byte(ulCtrlPort, dummy);
-
- Write_85c30_register(ulCtrlPort,
- SCC_WR0_SEL_WR9,
- SCC_WR9_CH_A_RST);
- }
- else
- {
- /*
- * This is channel B
- */
- /*
- * Ensure port state machine is reset
- */
- inport_byte(ulCtrlPort, dummy);
-
- Write_85c30_register(ulCtrlPort,
- SCC_WR0_SEL_WR9,
- SCC_WR9_CH_B_RST);
- }
-
- z85c30_initialize_port(minor);
-}
-
-/*
- * These routines provide control of the RTS and DTR lines
- */
-/*
- * z85c30_assert_RTS
- */
-static void z85c30_assert_RTS(int minor)
-{
- unsigned32 Irql;
- z85c30_context *pz85c30Context;
-
- pz85c30Context=(z85c30_context *)
- Console_Port_Data[minor].pDeviceContext;
-
- /*
- * Assert RTS
- */
- rtems_interrupt_disable(Irql);
- pz85c30Context->ucModemCtrl|=SCC_WR5_RTS;
- Write_85c30_register(
- Console_Port_Tbl[minor].ulCtrlPort1,
- SCC_WR0_SEL_WR5,
- pz85c30Context->ucModemCtrl);
- rtems_interrupt_enable(Irql);
-}
-
-/*
- * z85c30_negate_RTS
- */
-static void z85c30_negate_RTS(int minor)
-{
- unsigned32 Irql;
- z85c30_context *pz85c30Context;
-
- pz85c30Context=(z85c30_context *)
- Console_Port_Data[minor].pDeviceContext;
-
- /*
- * Negate RTS
- */
- rtems_interrupt_disable(Irql);
- pz85c30Context->ucModemCtrl&=~SCC_WR5_RTS;
- Write_85c30_register(
- Console_Port_Tbl[minor].ulCtrlPort1,
- SCC_WR0_SEL_WR5,
- pz85c30Context->ucModemCtrl);
- rtems_interrupt_enable(Irql);
-}
-
-/*
- * These flow control routines utilise a connection from the local DTR
- * line to the remote CTS line
- */
-/*
- * z85c30_assert_DTR
- */
-static void z85c30_assert_DTR(int minor)
-{
- unsigned32 Irql;
- z85c30_context *pz85c30Context;
-
- pz85c30Context=(z85c30_context *)
- Console_Port_Data[minor].pDeviceContext;
-
- /*
- * Assert DTR
- */
- rtems_interrupt_disable(Irql);
- pz85c30Context->ucModemCtrl|=SCC_WR5_DTR;
- Write_85c30_register(
- Console_Port_Tbl[minor].ulCtrlPort1,
- SCC_WR0_SEL_WR5,
- pz85c30Context->ucModemCtrl);
- rtems_interrupt_enable(Irql);
-}
-
-/*
- * z85c30_negate_DTR
- */
-static void z85c30_negate_DTR(int minor)
-{
- unsigned32 Irql;
- z85c30_context *pz85c30Context;
-
- pz85c30Context=(z85c30_context *)
- Console_Port_Data[minor].pDeviceContext;
-
- /*
- * Negate DTR
- */
- rtems_interrupt_disable(Irql);
- pz85c30Context->ucModemCtrl&=~SCC_WR5_DTR;
- Write_85c30_register(
- Console_Port_Tbl[minor].ulCtrlPort1,
- SCC_WR0_SEL_WR5,
- pz85c30Context->ucModemCtrl);
- rtems_interrupt_enable(Irql);
-}
-
-/*
- * z85c30_isr
- *
- * This routine is the console interrupt handler for COM3 and COM4
- *
- * Input parameters:
- * vector - vector number
- *
- * Output parameters: NONE
- *
- * Return values: NONE
- */
-
-static void z85c30_process(
- int minor,
- unsigned8 ucIntPend
-)
-{
- unsigned32 ulCtrlPort, ulDataPort;
- volatile unsigned8 z85c30_status;
- char cChar;
-
- ulCtrlPort=Console_Port_Tbl[minor].ulCtrlPort1;
- ulDataPort=Console_Port_Tbl[minor].ulDataPort;
-
- /*
- * Deal with any received characters
- */
- while(ucIntPend&SCC_RR3_B_RX_IP)
- {
- z85c30_status=Read_85c30_register(ulCtrlPort, SCC_WR0_SEL_RD0);
- if(!Z85C30_Status_Is_RX_character_available(z85c30_status))
- {
- break;
- }
-
- /*
- * Return the character read.
- */
- cChar=Read_85c30_data(ulDataPort);
-
- rtems_termios_enqueue_raw_characters(
- Console_Port_Data[minor].termios_data,
- &cChar,
- 1);
- }
-
- while(TRUE)
- {
- z85c30_status=Read_85c30_register(ulCtrlPort, SCC_WR0_SEL_RD0);
- if(!Z85C30_Status_Is_TX_buffer_empty(z85c30_status))
- {
- /*
- * We'll get another interrupt when
- * the transmitter holding reg. becomes
- * free again and we are clear to send
- */
- break;
- }
-
- if(!Z85C30_Status_Is_CTS_asserted(z85c30_status))
- {
- /*
- * We can't transmit yet
- */
- Write_85c30_register(ulCtrlPort,
- SCC_WR0_SEL_WR0,
- SCC_WR0_RST_TX_INT);
- /*
- * The next state change of CTS will wake us up
- */
- break;
- }
-
- if(Ring_buffer_Is_empty(&Console_Port_Data[minor].TxBuffer))
- {
- Console_Port_Data[minor].bActive=FALSE;
- if(Console_Port_Tbl[minor].pDeviceFlow
- !=&z85c30_flow_RTSCTS)
- {
- z85c30_negate_RTS(minor);
- }
- /*
- * There is no data to transmit
- */
- Write_85c30_register(ulCtrlPort,
- SCC_WR0_SEL_WR0,
- SCC_WR0_RST_TX_INT);
- break;
- }
-
- Ring_buffer_Remove_character(
- &Console_Port_Data[minor].TxBuffer,
- cChar);
- /*
- * transmit character
- */
- Write_85c30_data(ulDataPort, cChar);
-
- /*
- * Interrupt once FIFO has room
- */
- Write_85c30_register(ulCtrlPort,
- SCC_WR0_SEL_WR0,
- SCC_WR0_RST_TX_INT);
- break;
- }
-
- if(ucIntPend&SCC_RR3_B_EXT_IP)
- {
- /*
- * Clear the external status interrupt
- */
- Write_85c30_register(ulCtrlPort,
- SCC_WR0_SEL_WR0,
- SCC_WR0_RST_INT);
- z85c30_status=Read_85c30_register(ulCtrlPort, SCC_WR0_SEL_RD0);
- }
-
- /*
- * Reset interrupts
- */
- Write_85c30_register(ulCtrlPort,
- SCC_WR0_SEL_WR0,
- SCC_WR0_RST_HI_IUS);
-}
-
-static rtems_isr z85c30_isr(
- rtems_vector_number vector
-)
-{
- int minor;
- unsigned32 ulCtrlPort;
- volatile unsigned8 ucIntPend;
- volatile unsigned8 ucIntPendPort;
-
- for(minor=0;minor<Console_Port_Count;minor++)
- {
- if(vector==Console_Port_Tbl[minor].ulIntVector)
- {
- ulCtrlPort=Console_Port_Tbl[minor].ulCtrlPort2;
- do
- {
- ucIntPend=Read_85c30_register(ulCtrlPort,
- SCC_WR0_SEL_RD3);
-
- /*
- * If this is channel A select channel A status
- */
- if(ulCtrlPort==
- Console_Port_Tbl[minor].ulCtrlPort1)
- {
- ucIntPendPort=ucIntPend>>3;
- ucIntPendPort=ucIntPendPort&=7;
- }
- else
- {
- ucIntPendPort=ucIntPend&=7;
- }
-
- if(ucIntPendPort)
- {
- z85c30_process(minor, ucIntPendPort);
- }
- } while(ucIntPendPort);
- }
- }
-}
-
-/*
- * z85c30_flush
- */
-static int z85c30_flush(int major, int minor, void *arg)
-{
- while(!Ring_buffer_Is_empty(&Console_Port_Data[minor].TxBuffer))
- {
- /*
- * Yield while we wait
- */
- if(_System_state_Is_up(_System_state_Get()))
- {
- rtems_task_wake_after(RTEMS_YIELD_PROCESSOR);
- }
- }
-
- z85c30_close(major, minor, arg);
-
- return(RTEMS_SUCCESSFUL);
-}
-
-/*
- * z85c30_initialize_interrupts
- *
- * This routine initializes the console's receive and transmit
- * ring buffers and loads the appropriate vectors to handle the interrupts.
- *
- * Input parameters: NONE
- *
- * Output parameters: NONE
- *
- * Return values: NONE
- */
-
-static void z85c30_enable_interrupts(
- int minor
-)
-{
- unsigned32 ulCtrlPort;
-
- ulCtrlPort=Console_Port_Tbl[minor].ulCtrlPort1;
-
- /*
- * Enable interrupts
- */
- Write_85c30_register(ulCtrlPort,
- SCC_WR0_SEL_WR1,
- SCC_WR1_EXT_INT_EN |
- SCC_WR1_TX_INT_EN |
- SCC_WR1_INT_ALL_RX);
- Write_85c30_register(ulCtrlPort,
- SCC_WR0_SEL_WR2,
- 0);
- Write_85c30_register(ulCtrlPort,
- SCC_WR0_SEL_WR9,
- SCC_WR9_MIE);
-
- /*
- * Reset interrupts
- */
- Write_85c30_register(ulCtrlPort,
- SCC_WR0_SEL_WR0,
- SCC_WR0_RST_INT);
-}
-
-static void z85c30_initialize_interrupts(
- int minor
-)
-{
- z85c30_init(minor);
-
- Ring_buffer_Initialize(&Console_Port_Data[minor].TxBuffer);
-
- Console_Port_Data[minor].bActive=FALSE;
- if(Console_Port_Tbl[minor].pDeviceFlow
- !=&z85c30_flow_RTSCTS)
- {
- z85c30_negate_RTS(minor);
- }
-
- if(Console_Port_Tbl[minor].ulCtrlPort1==
- Console_Port_Tbl[minor].ulCtrlPort2)
- {
- /*
- * Only do this for Channel A
- */
- set_vector(z85c30_isr,
- Console_Port_Tbl[minor].ulIntVector,
- 1);
- }
-
- z85c30_enable_interrupts(minor);
-}
-
-/*
- * z85c30_write_support_int
- *
- * Console Termios output entry point.
- *
- */
-static int z85c30_write_support_int(
- int minor,
- const char *buf,
- int len)
-{
- int i;
- unsigned32 Irql;
-
- for(i=0; i<len;)
- {
- if(Ring_buffer_Is_full(&Console_Port_Data[minor].TxBuffer))
- {
- if(!Console_Port_Data[minor].bActive)
- {
- /*
- * Wake up the device
- */
- if(Console_Port_Tbl[minor].pDeviceFlow
- !=&z85c30_flow_RTSCTS)
- {
- z85c30_assert_RTS(minor);
- }
- rtems_interrupt_disable(Irql);
- Console_Port_Data[minor].bActive=TRUE;
- z85c30_process(minor, SCC_RR3_B_TX_IP);
- rtems_interrupt_enable(Irql);
- }
- else
- {
- /*
- * Yield while we await an interrupt
- */
- rtems_task_wake_after(RTEMS_YIELD_PROCESSOR);
- }
-
- /*
- * Wait for ring buffer to empty
- */
- continue;
- }
- else
- {
- Ring_buffer_Add_character(
- &Console_Port_Data[minor].TxBuffer,
- buf[i]);
- i++;
- }
- }
-
- /*
- * Ensure that characters are on the way
- */
- if(!Console_Port_Data[minor].bActive)
- {
- /*
- * Wake up the device
- */
- if(Console_Port_Tbl[minor].pDeviceFlow
- !=&z85c30_flow_RTSCTS)
- {
- z85c30_assert_RTS(minor);
- }
- rtems_interrupt_disable(Irql);
- Console_Port_Data[minor].bActive=TRUE;
- z85c30_process(minor, SCC_RR3_B_TX_IP);
- rtems_interrupt_enable(Irql);
- }
-
- return (len);
-}
-
-/*
- * z85c30_inbyte_nonblocking_polled
- *
- * This routine polls for a character.
- */
-static int z85c30_inbyte_nonblocking_polled(
- int minor
-)
-{
- volatile unsigned8 z85c30_status;
- unsigned32 ulCtrlPort;
-
- ulCtrlPort=Console_Port_Tbl[minor].ulCtrlPort1;
-
- /*
- * return -1 if a character is not available.
- */
- z85c30_status=Read_85c30_register(ulCtrlPort,
- SCC_WR0_SEL_RD0);
- if(!Z85C30_Status_Is_RX_character_available(z85c30_status))
- {
- return -1;
- }
-
- /*
- * Return the character read.
- */
- return Read_85c30_data(Console_Port_Tbl[minor].ulDataPort);
-}
-
-/*
- * z85c30_write_support_polled
- *
- * Console Termios output entry point.
- *
- */
-static int z85c30_write_support_polled(
- int minor,
- const char *buf,
- int len)
-{
- int nwrite=0;
-
- /*
- * poll each byte in the string out of the port.
- */
- while (nwrite < len)
- {
- /*
- * transmit character
- */
- z85c30_write_polled(minor, *buf++);
- nwrite++;
- }
-
- /*
- * return the number of bytes written.
- */
- return nwrite;
-}
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/console/z85c30.h b/c/src/lib/libbsp/powerpc/ppcn_60x/console/z85c30.h
deleted file mode 100644
index df05316347..0000000000
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/console/z85c30.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/* z85c30.h
- *
- * This include file contains all console driver definations for the z85c30
- *
- * COPYRIGHT (c) 1998 by Radstone Technology
- *
- *
- * THIS FILE IS PROVIDED TO YOU, THE USER, "AS IS", WITHOUT WARRANTY OF ANY
- * KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK
- * AS TO THE QUALITY AND PERFORMANCE OF ALL CODE IN THIS FILE IS WITH YOU.
- *
- * You are hereby granted permission to use, copy, modify, and distribute
- * this file, provided that this notice, plus the above copyright notice
- * and disclaimer, appears in all copies. Radstone Technology will provide
- * no support for this code.
- *
- * COPYRIGHT (c) 1989-1997.
- * On-Line Applications Research Corporation (OAR).
- * Copyright assigned to U.S. Government, 1994.
- *
- * The license and distribution terms for this file may in
- * the file LICENSE in this distribution or at
- * http://www.OARcorp.com/rtems/license.html.
- *
- * $Id:
- */
-
-#ifndef __Z85C30_H
-#define __Z85C30_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*
- * Driver function table
- */
-extern console_fns z85c30_fns;
-extern console_fns z85c30_fns_polled;
-
-/*
- * Flow control function tables
- */
-extern console_flow z85c30_flow_RTSCTS;
-extern console_flow z85c30_flow_DTRCTS;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/console/z85c30_p.h b/c/src/lib/libbsp/powerpc/ppcn_60x/console/z85c30_p.h
deleted file mode 100644
index 985c3b202b..0000000000
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/console/z85c30_p.h
+++ /dev/null
@@ -1,385 +0,0 @@
-/* z85c30_p.h
- *
- * This include file contains all private driver definations for the z85c30
- *
- * COPYRIGHT (c) 1998 by Radstone Technology
- *
- *
- * THIS FILE IS PROVIDED TO YOU, THE USER, "AS IS", WITHOUT WARRANTY OF ANY
- * KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK
- * AS TO THE QUALITY AND PERFORMANCE OF ALL CODE IN THIS FILE IS WITH YOU.
- *
- * You are hereby granted permission to use, copy, modify, and distribute
- * this file, provided that this notice, plus the above copyright notice
- * and disclaimer, appears in all copies. Radstone Technology will provide
- * no support for this code.
- *
- * COPYRIGHT (c) 1989-1997.
- * On-Line Applications Research Corporation (OAR).
- * Copyright assigned to U.S. Government, 1994.
- *
- * The license and distribution terms for this file may in
- * the file LICENSE in this distribution or at
- * http://www.OARcorp.com/rtems/license.html.
- *
- * $Id:
- */
-
-#ifndef __Z85C30_P_H
-#define __Z85C30_P_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* bit values for write register 0 */
-/* command register */
-
-#define SCC_WR0_SEL_WR0 0x00
-#define SCC_WR0_SEL_WR1 0x01
-#define SCC_WR0_SEL_WR2 0x02
-#define SCC_WR0_SEL_WR3 0x03
-#define SCC_WR0_SEL_WR4 0x04
-#define SCC_WR0_SEL_WR5 0x05
-#define SCC_WR0_SEL_WR6 0x06
-#define SCC_WR0_SEL_WR7 0x07
-#define SCC_WR0_SEL_WR8 0x08
-#define SCC_WR0_SEL_WR9 0x09
-#define SCC_WR0_SEL_WR10 0x0a
-#define SCC_WR0_SEL_WR11 0x0b
-#define SCC_WR0_SEL_WR12 0x0c
-#define SCC_WR0_SEL_WR13 0x0d
-#define SCC_WR0_SEL_WR14 0x0e
-#define SCC_WR0_SEL_WR15 0x0f
-#define SCC_WR0_SEL_RD0 0x00
-#define SCC_WR0_SEL_RD1 0x01
-#define SCC_WR0_SEL_RD2 0x02
-#define SCC_WR0_SEL_RD3 0x03
-#define SCC_WR0_SEL_RD4 0x04
-#define SCC_WR0_SEL_RD5 0x05
-#define SCC_WR0_SEL_RD6 0x06
-#define SCC_WR0_SEL_RD7 0x07
-#define SCC_WR0_SEL_RD8 0x08
-#define SCC_WR0_SEL_RD9 0x09
-#define SCC_WR0_SEL_RD10 0x0a
-#define SCC_WR0_SEL_RD11 0x0b
-#define SCC_WR0_SEL_RD12 0x0c
-#define SCC_WR0_SEL_RD13 0x0d
-#define SCC_WR0_SEL_RD14 0x0e
-#define SCC_WR0_SEL_RD15 0x0f
-#define SCC_WR0_NULL_CODE 0x00
-#define SCC_WR0_RST_INT 0x10
-#define SCC_WR0_SEND_ABORT 0x18
-#define SCC_WR0_EN_INT_RX 0x20
-#define SCC_WR0_RST_TX_INT 0x28
-#define SCC_WR0_ERR_RST 0x30
-#define SCC_WR0_RST_HI_IUS 0x38
-#define SCC_WR0_RST_RX_CRC 0x40
-#define SCC_WR0_RST_TX_CRC 0x80
-#define SCC_WR0_RST_TX_UND 0xc0
-
-/* write register 2 */
-/* interrupt vector */
-
-/* bit values for write register 1 */
-/* tx/rx interrupt and data transfer mode definition */
-
-#define SCC_WR1_EXT_INT_EN 0x01
-#define SCC_WR1_TX_INT_EN 0x02
-#define SCC_WR1_PARITY 0x04
-#define SCC_WR1_RX_INT_DIS 0x00
-#define SCC_WR1_RX_INT_FIR 0x08
-#define SCC_WR1_INT_ALL_RX 0x10
-#define SCC_WR1_RX_INT_SPE 0x18
-#define SCC_WR1_RDMA_RECTR 0x20
-#define SCC_WR1_RDMA_FUNC 0x40
-#define SCC_WR1_RDMA_EN 0x80
-
-/* bit values for write register 3 */
-/* receive parameters and control */
-
-#define SCC_WR3_RX_EN 0x01
-#define SCC_WR3_SYNC_CHAR 0x02
-#define SCC_WR3_ADR_SEARCH 0x04
-#define SCC_WR3_RX_CRC_EN 0x08
-#define SCC_WR3_ENTER_HUNT 0x10
-#define SCC_WR3_AUTO_EN 0x20
-#define SCC_WR3_RX_5_BITS 0x00
-#define SCC_WR3_RX_7_BITS 0x40
-#define SCC_WR3_RX_6_BITS 0x80
-#define SCC_WR3_RX_8_BITS 0xc0
-
-/* bit values for write register 4 */
-/* tx/rx misc parameters and modes */
-
-#define SCC_WR4_PAR_EN 0x01
-#define SCC_WR4_PAR_EVEN 0x02
-#define SCC_WR4_SYNC_EN 0x00
-#define SCC_WR4_1_STOP 0x04
-#define SCC_WR4_2_STOP 0x0c
-#define SCC_WR4_8_SYNC 0x00
-#define SCC_WR4_16_SYNC 0x10
-#define SCC_WR4_SDLC 0x20
-#define SCC_WR4_EXT_SYNC 0x30
-#define SCC_WR4_1_CLOCK 0x00
-#define SCC_WR4_16_CLOCK 0x40
-#define SCC_WR4_32_CLOCK 0x80
-#define SCC_WR4_64_CLOCK 0xc0
-
-/* bit values for write register 5 */
-/* transmit parameter and controls */
-
-#define SCC_WR5_TX_CRC_EN 0x01
-#define SCC_WR5_RTS 0x02
-#define SCC_WR5_SDLC 0x04
-#define SCC_WR5_TX_EN 0x08
-#define SCC_WR5_SEND_BRK 0x10
-
-#define SCC_WR5_TX_5_BITS 0x00
-#define SCC_WR5_TX_7_BITS 0x20
-#define SCC_WR5_TX_6_BITS 0x40
-#define SCC_WR5_TX_8_BITS 0x60
-#define SCC_WR5_DTR 0x80
-
-/* write register 6 */
-/* sync chars or sdlc address field */
-
-/* write register 7 */
-/* sync char or sdlc flag */
-
-/* write register 8 */
-/* transmit buffer */
-
-/* bit values for write register 9 */
-/* master interrupt control */
-
-#define SCC_WR9_VIS 0x01
-#define SCC_WR9_NV 0x02
-#define SCC_WR9_DLC 0x04
-#define SCC_WR9_MIE 0x08
-#define SCC_WR9_STATUS_HI 0x10
-#define SCC_WR9_NO_RST 0x00
-#define SCC_WR9_CH_B_RST 0x40
-#define SCC_WR9_CH_A_RST 0x80
-#define SCC_WR9_HDWR_RST 0xc0
-
-/* bit values for write register 10 */
-/* misc tx/rx control bits */
-
-#define SCC_WR10_6_BIT_SYNC 0x01
-#define SCC_WR10_LOOP_MODE 0x02
-#define SCC_WR10_ABORT_UND 0x04
-#define SCC_WR10_MARK_IDLE 0x08
-#define SCC_WR10_ACT_POLL 0x10
-#define SCC_WR10_NRZ 0x00
-#define SCC_WR10_NRZI 0x20
-#define SCC_WR10_FM1 0x40
-#define SCC_WR10_FM0 0x60
-#define SCC_WR10_CRC_PRESET 0x80
-
-/* bit values for write register 11 */
-/* clock mode control */
-
-#define SCC_WR11_OUT_XTAL 0x00
-#define SCC_WR11_OUT_TX_CLK 0x01
-#define SCC_WR11_OUT_BR_GEN 0x02
-#define SCC_WR11_OUT_DPLL 0x03
-#define SCC_WR11_TRXC_OI 0x04
-#define SCC_WR11_TX_RTXC 0x00
-#define SCC_WR11_TX_TRXC 0x08
-#define SCC_WR11_TX_BR_GEN 0x10
-#define SCC_WR11_TX_DPLL 0x18
-#define SCC_WR11_RX_RTXC 0x00
-#define SCC_WR11_RX_TRXC 0x20
-#define SCC_WR11_RX_BR_GEN 0x40
-#define SCC_WR11_RX_DPLL 0x60
-#define SCC_WR11_RTXC_XTAL 0x80
-
-/* write register 12 */
-/* lower byte of baud rate generator time constant */
-
-/* write register 13 */
-/* upper byte of baud rate generator time constant */
-
-/* bit values for write register 14 */
-/* misc control bits */
-
-#define SCC_WR14_BR_EN 0x01
-#define SCC_WR14_BR_SRC 0x02
-#define SCC_WR14_DTR_FUNC 0x04
-#define SCC_WR14_AUTO_ECHO 0x08
-#define SCC_WR14_LCL_LOOP 0x10
-#define SCC_WR14_NULL 0x00
-#define SCC_WR14_SEARCH 0x20
-#define SCC_WR14_RST_CLK 0x40
-#define SCC_WR14_DIS_DPLL 0x60
-#define SCC_WR14_SRC_BR 0x80
-#define SCC_WR14_SRC_RTXC 0xa0
-#define SCC_WR14_FM_MODE 0xc0
-#define SCC_WR14_NRZI 0xe0
-
-/* bit values for write register 15 */
-/* external/status interrupt control */
-
-#define SCC_WR15_ZERO_CNT 0x02
-#define SCC_WR15_CD_IE 0x08
-#define SCC_WR15_SYNC_IE 0x10
-#define SCC_WR15_CTS_IE 0x20
-#define SCC_WR15_TX_UND_IE 0x40
-#define SCC_WR15_BREAK_IE 0x80
-
-/* bit values for read register 0 */
-/* tx/rx buffer status and external status */
-
-#define SCC_RR0_RX_AVAIL 0x01
-#define SCC_RR0_ZERO_CNT 0x02
-#define SCC_RR0_TX_EMPTY 0x04
-#define SCC_RR0_CD 0x08
-#define SCC_RR0_SYNC 0x10
-#define SCC_RR0_CTS 0x20
-#define SCC_RR0_TX_UND 0x40
-#define SCC_RR0_BREAK 0x80
-
-/* bit values for read register 1 */
-
-#define SCC_RR1_ALL_SENT 0x01
-#define SCC_RR1_RES_CD_2 0x02
-#define SCC_RR1_RES_CD_1 0x01
-#define SCC_RR1_RES_CD_0 0x08
-#define SCC_RR1_PAR_ERR 0x10
-#define SCC_RR1_RX_OV_ERR 0x20
-#define SCC_RR1_CRC_ERR 0x40
-#define SCC_RR1_END_FRAME 0x80
-
-/* read register 2 */
-/* interrupt vector */
-
-/* bit values for read register 3 */
-/* interrupt pending register */
-
-#define SCC_RR3_B_EXT_IP 0x01
-#define SCC_RR3_B_TX_IP 0x02
-#define SCC_RR3_B_RX_IP 0x04
-#define SCC_RR3_A_EXT_IP 0x08
-#define SCC_RR3_A_TX_IP 0x10
-#define SCC_RR3_A_RX_IP 0x20
-
-/* read register 8 */
-/* receive data register */
-
-/* bit values for read register 10 */
-/* misc status bits */
-
-#define SCC_RR10_ON_LOOP 0x02
-#define SCC_RR10_LOOP_SEND 0x10
-#define SCC_RR10_2_CLK_MIS 0x40
-#define SCC_RR10_1_CLK_MIS 0x80
-
-/* read register 12 */
-/* lower byte of time constant */
-
-/* read register 13 */
-/* upper byte of time constant */
-
-/* bit values for read register 15 */
-/* external/status ie bits */
-
-#define SCC_RR15_ZERO_CNT 0x02
-#define SCC_RR15_CD_IE 0x08
-#define SCC_RR15_SYNC_IE 0x10
-#define SCC_RR15_CTS_IE 0x20
-#define SCC_RR15_TX_UND_IE 0x40
-#define SCC_RR15_BREAK_IE 0x80
-
-typedef struct _z85c30_context
-{
- unsigned8 ucModemCtrl;
-} z85c30_context;
-
-/*
- * The following macro calculates the Baud constant. For the Z85C30 chip.
- *
- * Note: baud constant = ((clock frequency / Clock_X) / (2 * Baud Rate)) - 2
- * eg ((10,000,000 / 16) / (2 * Baud Rate)) - 2
- */
-#define Z85C30_Baud( _baud_rate ) \
- ( (Z85C30_CLOCK /( 16 * 2 * _baud_rate)) - 2)
-
-#define Z85C30_Status_Is_RX_character_available(_status) \
- ((_status) & SCC_RR0_RX_AVAIL)
-
-#define Z85C30_Status_Is_TX_buffer_empty(_status) \
- ((_status) & SCC_RR0_TX_EMPTY)
-
-#define Z85C30_Status_Is_CTS_asserted(_status) \
- ((_status) & SCC_RR0_CTS)
-
-#define Z85C30_Status_Is_break_abort(_status) \
- ((_status) & SCC_RR0_BREAK)
-
-/*
- * Private routines
- */
-static boolean z85c30_probe(int minor);
-
-static void z85c30_init(int minor);
-
-static int z85c30_open(
- int major,
- int minor,
- void * arg
-);
-
-static int z85c30_close(
- int major,
- int minor,
- void * arg
-);
-
-static void z85c30_write_polled(
- int minor,
- char cChar
-);
-
-static void z85c30_assert_RTS(
- int minor
-);
-
-static void z85c30_negate_RTS(
- int minor
-);
-
-static void z85c30_assert_DTR(
- int minor
-);
-
-static void z85c30_negate_DTR(
- int minor
-);
-
-static void z85c30_initialize_interrupts(int minor);
-
-static int z85c30_flush(int major, int minor, void *arg);
-
-static int z85c30_write_support_int(
- int minor,
- const char *buf,
- int len
-);
-
-static int z85c30_write_support_polled(
- int minor,
- const char *buf,
- int len
-);
-
-static int z85c30_inbyte_nonblocking_polled(
- int minor
-);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif