2004-03-31 Ralf Corsepius <ralf_corsepius@rtems.org>

* clock/clock.c, console/config.c, console/console.c, console/debugio.c, console/i8042.c, console/ns16550cfg.c, console/ns16550cfg.h, console/vga.c, console/vga_p.h, console/z85c30cfg.c, console/z85c30cfg.h, include/bsp.h, include/nvram.h, include/pci.h, network/amd79c970.c, network/amd79c970.h, nvram/mk48t18.h, nvram/nvram.c, nvram/stk11c68.h, pci/pci.c, startup/bspstart.c, startup/genpvec.c, startup/spurious.c, startup/swap.c, timer/timer.c, tod/cmos.h, tod/tod.c, universe/universe.c: Convert to using c99 fixed size types.
author: Ralf Corsepius <ralf.corsepius@rtems.org> 2004-03-31 03:49:17 +0000
committer: Ralf Corsepius <ralf.corsepius@rtems.org> 2004-03-31 03:49:17 +0000
commit: bad8092cbf5305cd339b16fdcced0597e4f5b115 (patch)
tree: 0183aa2c00d69fc8c28d3dad9e313dd17ac973fb /c/src/lib/libbsp/powerpc/ppcn_60x
parent: 2004-03-31 Ralf Corsepius <ralf_corsepius@rtems.org> (diff)
download: rtems-bad8092cbf5305cd339b16fdcced0597e4f5b115.tar.bz2
29 files changed, 595 insertions, 582 deletions
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/ChangeLog b/c/src/lib/libbsp/powerpc/ppcn_60x/ChangeLog
index 13edee8b4d..d0a830fcd3 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/ChangeLog
@@ -1,3 +1,16 @@
+2004-03-31	Ralf Corsepius <ralf_corsepius@rtems.org>
+
+	* clock/clock.c, console/config.c, console/console.c,
+	console/debugio.c, console/i8042.c, console/ns16550cfg.c,
+	console/ns16550cfg.h, console/vga.c, console/vga_p.h,
+	console/z85c30cfg.c, console/z85c30cfg.h, include/bsp.h,
+	include/nvram.h, include/pci.h, network/amd79c970.c,
+	network/amd79c970.h, nvram/mk48t18.h, nvram/nvram.c,
+	nvram/stk11c68.h, pci/pci.c, startup/bspstart.c, startup/genpvec.c,
+	startup/spurious.c, startup/swap.c, timer/timer.c, tod/cmos.h,
+	tod/tod.c, universe/universe.c: Convert to using c99 fixed size
+	types.
+
 2004-02-19	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
 
 	* Makefile.am: Reflect changes to bsp.am. 
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/clock/clock.c b/c/src/lib/libbsp/powerpc/ppcn_60x/clock/clock.c
index 81c10a4062..da06bb271c 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/clock/clock.c
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/clock/clock.c
@@ -32,13 +32,13 @@
  *  Clock ticks since initialization
  */
 
-volatile rtems_unsigned32 Clock_driver_ticks;
+volatile uint32_t         Clock_driver_ticks;
 
 /*
  *  This is the value programmed into the count down timer.
  */
 
-rtems_unsigned32 Clock_Decrementer_value;
+uint32_t         Clock_Decrementer_value;
 
 rtems_isr_entry  Old_ticker;
 
@@ -203,7 +203,7 @@ rtems_device_driver Clock_control(
   void *pargp
 )
 {
-    rtems_unsigned32 isrlevel;
+    uint32_t         isrlevel;
     rtems_libio_ioctl_args_t *args = pargp;
  
     if (args == 0)
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/console/config.c b/c/src/lib/libbsp/powerpc/ppcn_60x/console/config.c
index 5247ea11a9..4c7c4879cf 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/console/config.c
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/console/config.c
@@ -279,10 +279,10 @@ typedef volatile struct _SP_WRITE_REGISTERS {
 
 static boolean config_PMX1553_probe(int minor)
 {
-	unsigned8 ucBusNumber, ucSlotNumber, ucChannel;
-	unsigned8 ucIntLine;
-	unsigned32 ulPortBase, ulMemBase, ulDeviceID;
-	unsigned8 *pucSIO_cir, *pucUart_int_sr, *pucUartDevIntReg;
+	uint8_t   ucBusNumber, ucSlotNumber, ucChannel;
+	uint8_t   ucIntLine;
+	uint32_t   ulPortBase, ulMemBase, ulDeviceID;
+	uint8_t   *pucSIO_cir, *pucUart_int_sr, *pucUartDevIntReg;
 	PSP_WRITE_REGISTERS     pNS16550Write;
 
 	/*
@@ -329,9 +329,9 @@ static boolean config_PMX1553_probe(int minor)
 			PCI_CONFIG_BAR_2,
 			&ulMemBase);
 
-	pucUartDevIntReg=(unsigned8 *)(PCI_MEM_BASE+ulMemBase);
-	pucUart_int_sr=(unsigned8 *)(PCI_MEM_BASE+ulMemBase+0x10);
-	pucSIO_cir=(unsigned8 *)(PCI_MEM_BASE+ulMemBase+0x18);
+	pucUartDevIntReg=(uint8_t*)(PCI_MEM_BASE+ulMemBase);
+	pucUart_int_sr=(uint8_t*)(PCI_MEM_BASE+ulMemBase+0x10);
+	pucSIO_cir=(uint8_t*)(PCI_MEM_BASE+ulMemBase+0x18);
 
 	/*
 	 * Use ulIntVector field to select RS232/RS422
@@ -440,19 +440,19 @@ static boolean config_PMX1553_probe(int minor)
 	/*
 	 * Scale requested baud rate for 16 MHz clock
 	 */
-	(unsigned32)Console_Port_Tbl[minor].pDeviceParams*=7373;
-	(unsigned32)Console_Port_Tbl[minor].pDeviceParams/=16000;
+	(uint32_t)Console_Port_Tbl[minor].pDeviceParams*=7373;
+	(uint32_t)Console_Port_Tbl[minor].pDeviceParams/=16000;
 #else
 	/*
 	 * Scale requested baud rate for 22.1184 MHz clock
 	 */
-	(unsigned32)Console_Port_Tbl[minor].pDeviceParams/=3;
+	(uint32_t)Console_Port_Tbl[minor].pDeviceParams/=3;
 #endif
 	/*
 	 * In order to maintain maximum data rate accuracy, we will
 	 * apply a div 4 here rather than in hardware (using MCR bit 7).
 	 */
-	(unsigned32)Console_Port_Tbl[minor].pDeviceParams/=4;
+	(uint32_t)Console_Port_Tbl[minor].pDeviceParams/=4;
 
 	return(TRUE);
 }
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/console/console.c b/c/src/lib/libbsp/powerpc/ppcn_60x/console/console.c
index 5fbe223d0f..3dce4dd367 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/console/console.c
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/console/console.c
@@ -292,7 +292,7 @@ void DEBUG_puts(
 )
 {
 	char *s;
-	unsigned32	Irql;
+	uint32_t  	Irql;
 
 	rtems_interrupt_disable(Irql);
 
@@ -322,11 +322,11 @@ void DEBUG_puts(
  */
 void
 DEBUG_puth(
-    unsigned32 ulHexNum
+    uint32_t   ulHexNum
     )
 {
 	unsigned long i,d;
-	unsigned32 Irql;
+	uint32_t   Irql;
 
 	rtems_interrupt_disable(Irql);
 	
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/console/debugio.c b/c/src/lib/libbsp/powerpc/ppcn_60x/console/debugio.c
index 1e6a9bcbf1..17dd530d73 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/console/debugio.c
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/console/debugio.c
@@ -60,7 +60,7 @@ void DEBUG_puts(
 )
 {
   char *s;
-  unsigned32  Irql;
+  uint32_t    Irql;
 
   rtems_interrupt_disable(Irql);
 
@@ -89,11 +89,11 @@ void DEBUG_puts(
  */
 
 void DEBUG_puth(
-  unsigned32 ulHexNum
+  uint32_t   ulHexNum
 )
 {
   unsigned long  i,d;
-  unsigned32      Irql;
+  uint32_t        Irql;
   void          (*poll)(int minor, char cChar);
   
   poll = Console_Port_Tbl[Console_Port_Minor].pDeviceFns->deviceWritePolled;
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/console/i8042.c b/c/src/lib/libbsp/powerpc/ppcn_60x/console/i8042.c
index 3883f65906..a8cd4f6e9c 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/console/i8042.c
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/console/i8042.c
@@ -83,7 +83,7 @@ static void i8042_process(
 
 static void i8042_scan_code(
 	int minor,
-	unsigned8   ucScan
+	uint8_t     ucScan
 );
 #endif
 
@@ -107,8 +107,8 @@ void i8042_polled_off(
 )
 {
 #if CONSOLE_USE_INTERRUPTS
-	unsigned32	Irql;
-	unsigned8	ucScan;
+	uint32_t  	Irql;
+	uint8_t  	ucScan;
 
 	/*
 	 * Make sure we have processed everything outstanding
@@ -133,14 +133,14 @@ void i8042_polled_off(
 static rtems_status_code
 i8042_outbyte_raw(
 	int minor,
-	unsigned8 ucData
+	uint8_t   ucData
 )
 {
-	unsigned32 i;
-	unsigned8 Status;
+	uint32_t   i;
+	uint8_t   Status;
 
 #if CONSOLE_USE_INTERRUPTS
-	unsigned32	Irql;
+	uint32_t  	Irql;
 
 	if(bInterruptsEnabled)
 	{
@@ -179,10 +179,10 @@ i8042_outbyte_raw(
 static rtems_status_code
 i8042_inbyte_polled(
 	int minor,
-	unsigned8 *pucData
+	uint8_t   *pucData
 )
 {
-	unsigned8 Status;
+	uint8_t   Status;
 
 	inport_byte(Console_Port_Tbl[minor].ulCtrlPort1, Status);
 	if(Status & KBD_OBF_MASK)
@@ -200,7 +200,7 @@ i8042_inbyte_polled(
 static rtems_status_code
 i8042_inbyte_raw(
 	int minor,
-	unsigned8 *pucData
+	uint8_t   *pucData
 )
 {
 	int i;
@@ -249,11 +249,11 @@ i8042_inbyte_raw(
 static rtems_status_code
 i8042_outbyte_cmd_polled(
 	int minor,
-	unsigned8 ucCommand
+	uint8_t   ucCommand
 )
 {
-	unsigned32 i;
-	unsigned8 Status;
+	uint32_t   i;
+	uint8_t   Status;
 
 	/*
 	 * This routine may be called when no clock driver is available
@@ -293,7 +293,7 @@ void EnqueueKbdChar(
  */
 static void i8042_process_two_code(
 	int minor,
-	unsigned8 ucScan,
+	uint8_t   ucScan,
 	boolean bMakenBreak
 )
 {
@@ -416,7 +416,7 @@ static void i8042_process_two_code(
 }
 
 static boolean i8042_process_qualifiers(
-	unsigned8 ucScan,
+	uint8_t   ucScan,
 	boolean	bMakenBreak
 )
 {
@@ -468,13 +468,13 @@ static boolean i8042_process_qualifiers(
 
 static boolean i8042_process_top_row(
 	int		minor,
-	unsigned8	ucScan
+	uint8_t  	ucScan
 )
 {
 	boolean	bProcessed;
 	char	cASCIIFnCode;
 #if CONSOLE_USE_INTERRUPTS==0
-	unsigned8	ucKeyboardAck;
+	uint8_t  	ucKeyboardAck;
 #endif
 
 	/*
@@ -633,7 +633,7 @@ static boolean i8042_process_top_row(
 
 static boolean i8042_process_keypad(
 	int	minor,
-	unsigned8 ucScan
+	uint8_t   ucScan
 )
 {
 	char cASCIICtrlCode;
@@ -735,7 +735,7 @@ static boolean i8042_process_keypad(
  */
 static void i8042_scan_code(
 	int minor,
-	unsigned8   ucScan
+	uint8_t     ucScan
 )
 {
 	char cChar;
@@ -870,8 +870,8 @@ static void i8042_scan_code(
  */
 boolean i8042_probe(int minor)
 {
-	unsigned8 ucKeyboardAck;
-	unsigned8 ucKeyboardID1, ucKeyboardID2;
+	uint8_t   ucKeyboardAck;
+	uint8_t   ucKeyboardID1, ucKeyboardID2;
 
 	if(!vga_probe(minor))
 	{
@@ -920,7 +920,7 @@ boolean i8042_probe(int minor)
 
 void i8042_init(int minor)
 {
-	unsigned8 ucKeyboardAck;
+	uint8_t   ucKeyboardAck;
 
 	vga_init(minor);
 
@@ -953,7 +953,7 @@ int i8042_inbyte_nonblocking_polled(
 	int minor 
 )
 {
-	unsigned8	ucScan;
+	uint8_t  	ucScan;
 	char	ucData;
 
 	if(i8042_inbyte_polled(minor, &ucScan)==RTEMS_SUCCESSFUL)
@@ -988,8 +988,8 @@ static void i8042_process(
 	int	minor
 )
 {
-	unsigned8	Status;
-	unsigned8	ucData;
+	uint8_t  	Status;
+	uint8_t  	ucData;
 
 	inport_byte(Console_Port_Tbl[minor].ulCtrlPort1, Status);
 
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/console/ns16550cfg.c b/c/src/lib/libbsp/powerpc/ppcn_60x/console/ns16550cfg.c
index f4d8e62a9c..e28d02c078 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/console/ns16550cfg.c
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/console/ns16550cfg.c
@@ -28,9 +28,9 @@
 #include <rtems.h>
 #include <bsp.h>
 
-unsigned8 Read_ns16550_register(
-  unsigned32  ulCtrlPort,
-  unsigned8   ucRegNum
+uint8_t   Read_ns16550_register(
+  uint32_t    ulCtrlPort,
+  uint8_t     ucRegNum
 )
 {
   unsigned char *p = (unsigned char *)ulCtrlPort;
@@ -41,9 +41,9 @@ unsigned8 Read_ns16550_register(
 }
 
 void  Write_ns16550_register(
-  unsigned32  ulCtrlPort,
-  unsigned8   ucRegNum,
-  unsigned8   ucData
+  uint32_t    ulCtrlPort,
+  uint8_t     ucRegNum,
+  uint8_t     ucData
 )
 {
   unsigned char *p = (unsigned char *)ulCtrlPort;
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/console/ns16550cfg.h b/c/src/lib/libbsp/powerpc/ppcn_60x/console/ns16550cfg.h
index 6a44d100a0..e30e08ab63 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/console/ns16550cfg.h
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/console/ns16550cfg.h
@@ -36,15 +36,15 @@ extern "C" {
  *  Board specific register access routines
  */
 
-unsigned8 Read_ns16550_register(
-  unsigned32  ulCtrlPort,
-  unsigned8   ucRegNum
+uint8_t   Read_ns16550_register(
+  uint32_t    ulCtrlPort,
+  uint8_t     ucRegNum
 );
 
 void  Write_ns16550_register(
-  unsigned32  ulCtrlPort,
-  unsigned8   ucRegNum,
-  unsigned8   ucData
+  uint32_t    ulCtrlPort,
+  uint8_t     ucRegNum,
+  uint8_t     ucData
 );
 
 #ifdef __cplusplus
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/console/vga.c b/c/src/lib/libbsp/powerpc/ppcn_60x/console/vga.c
index 8e8177f18f..9e67cc6541 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/console/vga.c
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/console/vga.c
@@ -64,13 +64,13 @@ extern volatile boolean bScrollLock;
 | Global Variables
 +--------------------------------------------------------------------------*/
 /* Physical address of start of video text memory. */
-static unsigned16 *videoRam    = (unsigned16 *)VGA_FB;
+static uint16_t   *videoRam    = (uint16_t*)VGA_FB;
 /* Pointer for current output position in display. */
-static unsigned16 *videoRamPtr = (unsigned16 *)VGA_FB;
-static unsigned8  videoRows = VGA_NUM_ROWS; /* Number of rows in display.    */
-static unsigned8  videoCols = VGA_NUM_COLS; /* Number of columns in display. */
-static unsigned8  cursRow   = 0;       /* Current cursor row.           */
-static unsigned8  cursCol   = 0;       /* Current cursor column.        */
+static uint16_t   *videoRamPtr = (uint16_t*)VGA_FB;
+static uint8_t    videoRows = VGA_NUM_ROWS; /* Number of rows in display.    */
+static uint8_t    videoCols = VGA_NUM_COLS; /* Number of columns in display. */
+static uint8_t    cursRow   = 0;       /* Current cursor row.           */
+static uint8_t    cursCol   = 0;       /* Current cursor column.        */
 
 
 /*-------------------------------------------------------------------------+
@@ -81,7 +81,7 @@ static unsigned8  cursCol   = 0;       /* Current cursor column.        */
 |          Returns: Nothing. 
 +--------------------------------------------------------------------------*/
 static inline void
-setHardwareCursorPos(unsigned16 videoCursor)
+setHardwareCursorPos(uint16_t   videoCursor)
 {
 	VGA_WRITE_CRTC(0x0e, (videoCursor >> 8) & 0xff);
 	VGA_WRITE_CRTC(0x0f, videoCursor & 0xff);
@@ -111,13 +111,13 @@ updateVideoRamPtr(void)
 |          Returns: Nothing. 
 +--------------------------------------------------------------------------*/
 static void
-scrollUp(unsigned8 lines)
+scrollUp(uint8_t   lines)
 {
 	/* Number of blank display cells on bottom of window. */
-	unsigned16 blankCount;
+	uint16_t   blankCount;
 
        /* Source and destination pointers for memory copy operations. */
-	unsigned16 *ptrDst, *ptrSrc;
+	uint16_t   *ptrDst, *ptrSrc;
 
 	if(lines<videoRows)  /* Move window's contents up. */
 	{
@@ -125,7 +125,7 @@ scrollUp(unsigned8 lines)
 		 * Number of non-blank cells on upper part
 		 * of display (total - blank).
 		 */
-		unsigned16 nonBlankCount;
+		uint16_t   nonBlankCount;
 
 		blankCount = lines * videoCols;
 		nonBlankCount = DISPLAY_CELL_COUNT - blankCount;
@@ -336,7 +336,7 @@ int vga_write_support(
 
 boolean vga_probe(int minor)
 {
-	unsigned8 ucMiscIn;
+	uint8_t   ucMiscIn;
 
 	/*
 	 * Check for presence of VGA adaptor
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/console/vga_p.h b/c/src/lib/libbsp/powerpc/ppcn_60x/console/vga_p.h
index 591365a94f..3ab6cbc2ba 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/console/vga_p.h
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/console/vga_p.h
@@ -21,7 +21,7 @@
 extern "C" {
 #endif
 
-#define VGA_FB		((unsigned32)PCI_MEM_BASE+0xb8000)
+#define VGA_FB		((uint32_t)PCI_MEM_BASE+0xb8000)
 #define VGA_NUM_ROWS	25
 #define VGA_NUM_COLS	80
 
@@ -39,7 +39,7 @@ extern "C" {
 	outport_byte(0x3cf, val)
 #define VGA_WRITE_ATT(reg, val) \
 	{ \
-		volatile unsigned8 ucDummy; \
+		volatile uint8_t   ucDummy; \
 		inport_byte(0x3da, ucDummy); \
 		outport_byte(0x3c0, reg); \
 		outport_byte(0x3c0, val); \
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/console/z85c30cfg.c b/c/src/lib/libbsp/powerpc/ppcn_60x/console/z85c30cfg.c
index 5b2cdda024..4aeafe3939 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/console/z85c30cfg.c
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/console/z85c30cfg.c
@@ -34,12 +34,12 @@
  *  Read a Z85c30 register
  */
 
-unsigned8 Read_85c30_register(
-  unsigned32  ulCtrlPort,
-  unsigned8   ucRegNum
+uint8_t   Read_85c30_register(
+  uint32_t    ulCtrlPort,
+  uint8_t     ucRegNum
 )
 {
-  unsigned8 ucData;
+  uint8_t   ucData;
 
   outport_byte(ulCtrlPort, ucRegNum);
   inport_byte(ulCtrlPort, ucData);
@@ -53,9 +53,9 @@ unsigned8 Read_85c30_register(
  */
 
 void  Write_85c30_register(
-  unsigned32  ulCtrlPort,
-  unsigned8   ucRegNum,
-  unsigned8   ucData
+  uint32_t    ulCtrlPort,
+  uint8_t     ucRegNum,
+  uint8_t     ucData
 )
 {
   if(ucRegNum) {
@@ -70,11 +70,11 @@ void  Write_85c30_register(
  *  Read a Z85c30 data register
  */
 
-unsigned8 Read_85c30_data(
-  unsigned32  ulDataPort
+uint8_t   Read_85c30_data(
+  uint32_t    ulDataPort
 )
 {
-  unsigned8 ucData;
+  uint8_t   ucData;
 
   inport_byte(ulDataPort, ucData);
   return ucData;
@@ -87,8 +87,8 @@ unsigned8 Read_85c30_data(
  */
 
 void  Write_85c30_data(
-  unsigned32  ulDataPort,
-  unsigned8   ucData
+  uint32_t    ulDataPort,
+  uint8_t     ucData
 )
 {
   outport_byte(ulDataPort, ucData);
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/console/z85c30cfg.h b/c/src/lib/libbsp/powerpc/ppcn_60x/console/z85c30cfg.h
index 8bbeacda6f..0b5a6383f9 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/console/z85c30cfg.h
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/console/z85c30cfg.h
@@ -36,24 +36,24 @@ extern "C" {
  *  Board specific register access routines
  */
 
-unsigned8 Read_85c30_register(
-  unsigned32  ulCtrlPort,
-  unsigned8   ucRegNum
+uint8_t   Read_85c30_register(
+  uint32_t    ulCtrlPort,
+  uint8_t     ucRegNum
 );
 
 void  Write_85c30_register(
-  unsigned32  ulCtrlPort,
-  unsigned8   ucRegNum,
-  unsigned8   ucData
+  uint32_t    ulCtrlPort,
+  uint8_t     ucRegNum,
+  uint8_t     ucData
 );
 
-unsigned8 Read_85c30_data(
-  unsigned32  ulDataPort
+uint8_t   Read_85c30_data(
+  uint32_t    ulDataPort
 );
 
 void  Write_85c30_data(
-  unsigned32  ulDataPort,
-  unsigned8   ucData
+  uint32_t    ulDataPort,
+  uint8_t     ucData
 );
 
 #ifdef __cplusplus
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/include/bsp.h b/c/src/lib/libbsp/powerpc/ppcn_60x/include/bsp.h
index 64ebd37c54..66ff4488d6 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/include/bsp.h
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/include/bsp.h
@@ -237,68 +237,68 @@ extern void Dis_Ext_Interrupt(int level);
  * As ports are all little endian we will perform swaps here on 16 and 32
  * bit transfers
  */
-extern unsigned16 Swap16(unsigned16 usVal);
-extern unsigned32 Swap32(unsigned32 ulVal);
+extern uint16_t   Swap16(uint16_t   usVal);
+extern uint32_t   Swap32(uint32_t   ulVal);
 
 #define outport_byte(port, val)			\
 	EIEIO;					\
-	*(volatile unsigned8 *)(PCI_IO_BASE+	\
+	*(volatile uint8_t*)(PCI_IO_BASE+	\
 				(unsigned long)(port))=(val)
 
 #define outport_16(port, val) 			\
 	EIEIO;					\
-	*(volatile unsigned16 *)(PCI_IO_BASE+	\
+	*(volatile uint16_t*)(PCI_IO_BASE+	\
 				 (unsigned long)(port))=Swap16(val)
 
 #define outport_32(port, val) 			\
 	EIEIO;					\
-	*(volatile unsigned32 *)(PCI_IO_BASE+	\
+	*(volatile uint32_t*)(PCI_IO_BASE+	\
 				 (unsigned long)(port))=Swap32(val)
 
 #define inport_byte(port, val)				\
 	EIEIO;						\
-	(val)=*(volatile unsigned8 *)(PCI_IO_BASE+	\
+	(val)=*(volatile uint8_t*)(PCI_IO_BASE+	\
 				      (unsigned long)(port))
 
 #define inport_16(port, val)					\
 	EIEIO;							\
-	(val)=Swap16(*(volatile unsigned16 *)(PCI_IO_BASE+	\
+	(val)=Swap16(*(volatile uint16_t*)(PCI_IO_BASE+	\
 					      (unsigned long)(port)))
 
 #define inport_32(port, val)					\
 	EIEIO;							\
-	(val)=Swap32(*(volatile unsigned32 *)(PCI_IO_BASE+	\
+	(val)=Swap32(*(volatile uint32_t*)(PCI_IO_BASE+	\
 					      (unsigned long)(port)))
 
 /*
  *  System Planar Board Registers
  */
 typedef volatile struct _PLANARREGISTERS{
-    unsigned8 Reserved0[0x803];     /* Offset 0x000 */
-    unsigned8 SimmId;               /* Offset 0x803 */
-    unsigned8 SimmPresent;          /* Offset 0x804 */
-    unsigned8 Reserved1[3];
-    unsigned8 HardfileLight;        /* Offset 0x808 */
-    unsigned8 Reserved2[3];
-    unsigned8 EquipmentPresent1;    /* Offset 0x80C */
-    unsigned8 Reserved3;
-    unsigned8 EquipmentPresent2;    /* Offset 0x80e */
-    unsigned8 Reserved4;
-    unsigned8 PasswordProtect1;     /* Offset 0x810 */
-    unsigned8 Reserved5;
-    unsigned8 PasswordProtect2;     /* Offset 0x812 */
-    unsigned8 Reserved6;
-    unsigned8 L2Flush;              /* Offset 0x814 */
-    unsigned8 Reserved7[3];
-    unsigned8 Keylock;              /* Offset 0x818 */
-    unsigned8 Reserved8[0x3c];
-    unsigned8 BoardRevision;		/* Offset 0x854 */
-    unsigned8 Reserved9[0xf];
-    unsigned8 BoardID;				/* Offset 0x864 */
-    unsigned8 Reserved10;
-    unsigned8 MotherboardMemoryType; /* Offset 0x866 */
-    unsigned8 Reserved11;
-    unsigned8 MezzanineMemoryType;  /* Offset 0x868 */
+    uint8_t   Reserved0[0x803];     /* Offset 0x000 */
+    uint8_t   SimmId;               /* Offset 0x803 */
+    uint8_t   SimmPresent;          /* Offset 0x804 */
+    uint8_t   Reserved1[3];
+    uint8_t   HardfileLight;        /* Offset 0x808 */
+    uint8_t   Reserved2[3];
+    uint8_t   EquipmentPresent1;    /* Offset 0x80C */
+    uint8_t   Reserved3;
+    uint8_t   EquipmentPresent2;    /* Offset 0x80e */
+    uint8_t   Reserved4;
+    uint8_t   PasswordProtect1;     /* Offset 0x810 */
+    uint8_t   Reserved5;
+    uint8_t   PasswordProtect2;     /* Offset 0x812 */
+    uint8_t   Reserved6;
+    uint8_t   L2Flush;              /* Offset 0x814 */
+    uint8_t   Reserved7[3];
+    uint8_t   Keylock;              /* Offset 0x818 */
+    uint8_t   Reserved8[0x3c];
+    uint8_t   BoardRevision;		/* Offset 0x854 */
+    uint8_t   Reserved9[0xf];
+    uint8_t   BoardID;				/* Offset 0x864 */
+    uint8_t   Reserved10;
+    uint8_t   MotherboardMemoryType; /* Offset 0x866 */
+    uint8_t   Reserved11;
+    uint8_t   MezzanineMemoryType;  /* Offset 0x868 */
 } PLANARREGISTERS, *PPLANARREGISTERS;
 
 extern unsigned char ucSystemType;
@@ -378,20 +378,20 @@ void InitializeNvRAM(void);
 
 #define Cause_tm27_intr()  \
   do { \
-    unsigned32 _clicks = 8; \
+    uint32_t   _clicks = 8; \
     asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
   } while (0)
 
 
 #define Clear_tm27_intr() \
   do { \
-    unsigned32 _clicks = 0xffffffff; \
+    uint32_t   _clicks = 0xffffffff; \
     asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
   } while (0)
 
 #define Lower_tm27_intr() \
   do { \
-    unsigned32 _msr = 0; \
+    uint32_t   _msr = 0; \
     _ISR_Set_level( 0 ); \
     asm volatile( "mfmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
     _msr |=  0x8002; \
@@ -455,7 +455,7 @@ void initialize_external_exception_vector();
  * console.c
  */
 void DEBUG_puts( char *string );
-void DEBUG_puth( unsigned32 ulHexNum );
+void DEBUG_puth( uint32_t   ulHexNum );
 
 void BSP_fatal_return( void );
 
@@ -463,7 +463,7 @@ extern rtems_configuration_table BSP_Configuration;     /* owned by BSP */
 
 extern rtems_cpu_table           Cpu_table;             /* owned by BSP */
 
-extern unsigned32          bsp_isr_level;
+extern uint32_t            bsp_isr_level;
 
 #endif /* ASM */
 
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/include/nvram.h b/c/src/lib/libbsp/powerpc/ppcn_60x/include/nvram.h
index 246c2679c5..3bedee57d1 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/include/nvram.h
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/include/nvram.h
@@ -33,20 +33,20 @@ void InitializeNvRAM(void);
 /*
  * These routines access data in the NvRAM's OS area
  */
-extern rtems_status_code ReadNvRAM8(unsigned32 ulOffset, unsigned8 *pucData);
-extern rtems_status_code WriteNvRAM8(unsigned32 ulOffset, unsigned8 ucValue);
-extern rtems_status_code ReadNvRAM16(unsigned32 ulOffset, unsigned16 *pusData);
-extern rtems_status_code WriteNvRAM16(unsigned32 ulOffset, unsigned16 usValue);
-extern rtems_status_code ReadNvRAM32(unsigned32 ulOffset, unsigned32 *pulData);
-extern rtems_status_code WriteNvRAM32(unsigned32 ulOffset, unsigned32 ulValue);
+extern rtems_status_code ReadNvRAM8(uint32_t   ulOffset, uint8_t   *pucData);
+extern rtems_status_code WriteNvRAM8(uint32_t   ulOffset, uint8_t   ucValue);
+extern rtems_status_code ReadNvRAM16(uint32_t   ulOffset, uint16_t   *pusData);
+extern rtems_status_code WriteNvRAM16(uint32_t   ulOffset, uint16_t   usValue);
+extern rtems_status_code ReadNvRAM32(uint32_t   ulOffset, uint32_t   *pulData);
+extern rtems_status_code WriteNvRAM32(uint32_t   ulOffset, uint32_t   ulValue);
 rtems_status_code ReadNvRAMBlock(
-  unsigned32 ulOffset, unsigned8 *pucData, unsigned32 length);
+  uint32_t   ulOffset, uint8_t   *pucData, uint32_t   length);
 rtems_status_code WriteNvRAMBlock(
-  unsigned32 ulOffset, unsigned8 *ucValue, unsigned32 length);
+  uint32_t   ulOffset, uint8_t   *ucValue, uint32_t   length);
 /*
  * This routine returns the size of the NvRAM
  */
-extern unsigned32 SizeNvRAM();
+extern uint32_t   SizeNvRAM();
 
 /*
  * This routine commits changes to the NvRAM
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/include/pci.h b/c/src/lib/libbsp/powerpc/ppcn_60x/include/pci.h
index f012d882d7..7731651cc0 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/include/pci.h
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/include/pci.h
@@ -267,56 +267,56 @@
  * PCI access functions
  */
 extern rtems_status_code PCIConfigWrite8(
-    unsigned8 ucBusNumber,
-    unsigned8 ucSlotNumber,
-    unsigned8 ucFunctionNumber,
-    unsigned8 ucOffset,
-    unsigned8 ucValue
+    uint8_t   ucBusNumber,
+    uint8_t   ucSlotNumber,
+    uint8_t   ucFunctionNumber,
+    uint8_t   ucOffset,
+    uint8_t   ucValue
 );
 
 extern rtems_status_code PCIConfigWrite16(
-    unsigned8 ucBusNumber,
-    unsigned8 ucSlotNumber,
-    unsigned8 ucFunctionNumber,
-    unsigned8 ucOffset,
-    unsigned16 usValue
+    uint8_t   ucBusNumber,
+    uint8_t   ucSlotNumber,
+    uint8_t   ucFunctionNumber,
+    uint8_t   ucOffset,
+    uint16_t   usValue
 );
 
 extern rtems_status_code PCIConfigWrite32(
-    unsigned8 ucBusNumber,
-    unsigned8 ucSlotNumber,
-    unsigned8 ucFunctionNumber,
-    unsigned8 ucOffset,
-    unsigned32 ulValue
+    uint8_t   ucBusNumber,
+    uint8_t   ucSlotNumber,
+    uint8_t   ucFunctionNumber,
+    uint8_t   ucOffset,
+    uint32_t   ulValue
 );
 
 extern rtems_status_code PCIConfigRead8(
-    unsigned8 ucBusNumber,
-    unsigned8 ucSlotNumber,
-    unsigned8 ucFunctionNumber,
-    unsigned8 ucOffset,
-    unsigned8 *pucValue
+    uint8_t   ucBusNumber,
+    uint8_t   ucSlotNumber,
+    uint8_t   ucFunctionNumber,
+    uint8_t   ucOffset,
+    uint8_t   *pucValue
 );
 
 extern rtems_status_code PCIConfigRead16(
-    unsigned8 ucBusNumber,
-    unsigned8 ucSlotNumber,
-    unsigned8 ucFunctionNumber,
-    unsigned8 ucOffset,
-    unsigned16 *pusValue
+    uint8_t   ucBusNumber,
+    uint8_t   ucSlotNumber,
+    uint8_t   ucFunctionNumber,
+    uint8_t   ucOffset,
+    uint16_t   *pusValue
 );
 
 extern rtems_status_code PCIConfigRead32(
-    unsigned8 ucBusNumber,
-    unsigned8 ucSlotNumber,
-    unsigned8 ucFunctionNumber,
-    unsigned8 ucOffset,
-    unsigned32 *pulValue
+    uint8_t   ucBusNumber,
+    uint8_t   ucSlotNumber,
+    uint8_t   ucFunctionNumber,
+    uint8_t   ucOffset,
+    uint32_t   *pulValue
 );
 
 /*
  * Return the number of PCI busses in the system
  */
-extern unsigned8 BusCountPCI();
+extern uint8_t   BusCountPCI();
 
 #endif /* _PCI_H_ */
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/network/amd79c970.c b/c/src/lib/libbsp/powerpc/ppcn_60x/network/amd79c970.c
index ba3849df9a..2ad0b8e02a 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/network/amd79c970.c
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/network/amd79c970.c
@@ -100,7 +100,7 @@ typedef struct amd79c970Context {
 	tmde_t		txBdBase[TX_RING_SIZE];
 	initblk_t		initBlk;
 	pc_net_t		*pPCNet;
-	unsigned32		ulIntVector;
+	uint32_t  		ulIntVector;
 	struct mbuf		**rxMbuf;
 	struct mbuf		**txMbuf;
 	int			rxBdCount;
@@ -142,7 +142,7 @@ static amd79c970Context_t *pAmd79c970Context[NPCNETDRIVER];
 static rtems_isr
 amd79c970_isr (rtems_vector_number v)
 {
-	unsigned32 ulCSR0, ulCSR4, ulCSR5;
+	uint32_t   ulCSR0, ulCSR4, ulCSR5;
 	amd79c970Context_t *dp;
 	int i;
 
@@ -220,15 +220,15 @@ amd79c970_initialize_hardware (int instance, int broadcastFlag)
 	amd79c970Context_t *dp;
 	struct mbuf 	*bp;
 	int		i;
-	unsigned8	ucPCIBusCount;
-	unsigned8	ucBusNumber;
-	unsigned8	ucSlotNumber;
-	unsigned32	ulDeviceID;
-	unsigned32	ulBAR0;
-	unsigned8	ucIntVector;
-	unsigned32	ulInitClkPCIAddr;
-	unsigned32	ulAPROM;
-	unsigned32	ulCSR0;
+	uint8_t  	ucPCIBusCount;
+	uint8_t  	ucBusNumber;
+	uint8_t  	ucSlotNumber;
+	uint32_t  	ulDeviceID;
+	uint32_t  	ulBAR0;
+	uint8_t  	ucIntVector;
+	uint32_t  	ulInitClkPCIAddr;
+	uint32_t  	ulAPROM;
+	uint32_t  	ulCSR0;
 
 	ucPCIBusCount=BusCountPCI();
 
@@ -334,7 +334,7 @@ amd79c970_initialize_hardware (int instance, int broadcastFlag)
 		dp->rxMbuf[i]=bp=ambufw (RBUF_SIZE);
 		bp->data += sizeof (struct iface *);
                 dp->rxBdBase[i].rmde_addr=
-			Swap32((unsigned32)bp->data+PCI_SYS_MEM_BASE);
+			Swap32((uint32_t)bp->data+PCI_SYS_MEM_BASE);
                 dp->rxBdBase[i].rmde_bcnt=
 			Swap16(-(bp->size-sizeof (struct iface *)));
                 dp->rxBdBase[i].rmde_flags=Swap16(RFLG_OWN);
@@ -369,7 +369,7 @@ amd79c970_initialize_hardware (int instance, int broadcastFlag)
 	/*
 	 * Set the receive descriptor ring address 
 	 */
-	dp->initBlk.ib_rdra=Swap32((unsigned32)&dp->rxBdBase[0]+
+	dp->initBlk.ib_rdra=Swap32((uint32_t)&dp->rxBdBase[0]+
 				     PCI_SYS_MEM_BASE);
 
 	/*
@@ -379,7 +379,7 @@ amd79c970_initialize_hardware (int instance, int broadcastFlag)
 	/*
 	 * Set the tranmit descriptor ring address 
 	 */
-	dp->initBlk.ib_tdra=Swap32((unsigned32)&dp->txBdBase[0]+
+	dp->initBlk.ib_tdra=Swap32((uint32_t)&dp->txBdBase[0]+
 				     PCI_SYS_MEM_BASE);
 
 	for(i=0;i<6;i++)
@@ -403,7 +403,7 @@ amd79c970_initialize_hardware (int instance, int broadcastFlag)
 
 	WR_CSR32(dp, CSR5, 0);
 
-	ulInitClkPCIAddr=(unsigned32)&dp->initBlk+PCI_SYS_MEM_BASE;
+	ulInitClkPCIAddr=(uint32_t)&dp->initBlk+PCI_SYS_MEM_BASE;
 	/*
 	 * CSR2 must contain the high order 16 bits of the first word in 
 	 * the initialization block 
@@ -461,8 +461,8 @@ amd79c970_initialize_hardware (int instance, int broadcastFlag)
 static void
 amd79c970_retire_tx_bd (amd79c970Context_t *dp)
 {
-	unsigned16 status;
-	unsigned32 error;
+	uint16_t   status;
+	uint32_t   error;
 	int i;
 	int nRetired;
 
@@ -525,7 +525,7 @@ amd79c970_raw (struct iface *iface, struct mbuf **bpp)
 	amd79c970Context_t *dp;
 	struct mbuf *bp;
 	tmde_t *firstTxBd, *txBd;
-	unsigned16 status;
+	uint16_t   status;
 	int nAdded;
 
 	dp = pAmd79c970Context[iface->dev];
@@ -607,7 +607,7 @@ amd79c970_raw (struct iface *iface, struct mbuf **bpp)
 		/*
 		 * Fill in the buffer descriptor
 		 */
-		txBd->tmde_addr=Swap32((unsigned32)bp->data+PCI_SYS_MEM_BASE);
+		txBd->tmde_addr=Swap32((uint32_t)bp->data+PCI_SYS_MEM_BASE);
 		txBd->tmde_bcnt=Swap16(-bp->cnt);
 		dp->txMbuf[dp->txBdHead] = bp;
 
@@ -676,7 +676,7 @@ amd79c970_rx (int dev, void *p1, void *p2)
 	struct iface *iface=(struct iface *)p1;
 	amd79c970Context_t *dp=(amd79c970Context_t *)p2;
 	struct mbuf *bp;
-	rtems_unsigned16 status;
+	uint16_t         status;
 	rmde_t *rxBd;
 	int rxBdIndex;
 	int continuousCount;
@@ -770,7 +770,7 @@ amd79c970_rx (int dev, void *p1, void *p2)
 			dp->rxMbuf[rxBdIndex]=bp=ambufw (RBUF_SIZE);
 			bp->data += sizeof (struct iface *);
 			rxBd->rmde_addr=Swap32(
-				(unsigned32)bp->data+PCI_SYS_MEM_BASE);
+				(uint32_t)bp->data+PCI_SYS_MEM_BASE);
 			rxBd->rmde_bcnt=Swap16(
 				-(bp->size-sizeof (struct iface *)));
 		}
@@ -797,7 +797,7 @@ static int
 amd79c970_stop (struct iface *iface)
 {
 	amd79c970Context_t *dp;
-	unsigned32	ulCSR0;
+	uint32_t  	ulCSR0;
 	int		i;
 
 	dp=pAmd79c970Context[iface->dev];
@@ -913,7 +913,7 @@ rtems_ka9q_driver_attach (int argc, char *argv[], void *p)
 	 * Note that this structure must be aligned to a 16 byte boundary
 	 */
 	pAmd79c970Context[i]=(amd79c970Context_t *)
-		(((unsigned32)callocw(1,
+		(((uint32_t)callocw(1,
 				      sizeof(amd79c970Context_t)+16)+16) & ~15);
 	dp=pAmd79c970Context[i];
 
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/network/amd79c970.h b/c/src/lib/libbsp/powerpc/ppcn_60x/network/amd79c970.h
index dd30d90b0d..f600611418 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/network/amd79c970.h
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/network/amd79c970.h
@@ -25,18 +25,18 @@ typedef volatile struct pc_net
 	union
 	{
 		struct {
-			unsigned16	aprom[8];  /* 0x00 */
-			unsigned16	rdp;	   /* 0x10 */
-			unsigned16	rap;	   /* 0x14 */
-			unsigned16	reset;	   /* 0x18 */
-			unsigned16	bdp;	   /* 0x1C */
+			uint16_t  	aprom[8];  /* 0x00 */
+			uint16_t  	rdp;	   /* 0x10 */
+			uint16_t  	rap;	   /* 0x14 */
+			uint16_t  	reset;	   /* 0x18 */
+			uint16_t  	bdp;	   /* 0x1C */
 		} wio;
 		struct {
-			unsigned32	aprom[4];  /* 0x00 */
-			unsigned32	rdp;	   /* 0x10 */
-			unsigned32	rap;	   /* 0x12 */
-			unsigned32	reset;	   /* 0x14 */
-			unsigned32	bdp;	   /* 0x16 */
+			uint32_t  	aprom[4];  /* 0x00 */
+			uint32_t  	rdp;	   /* 0x10 */
+			uint32_t  	rap;	   /* 0x12 */
+			uint32_t  	reset;	   /* 0x14 */
+			uint32_t  	bdp;	   /* 0x16 */
 		} dwio;
 	} u;
 } pc_net_t;
@@ -48,24 +48,24 @@ typedef volatile struct pc_net
 #define EEPROM_HEAD_SIZE 36
 
 typedef struct pc_net_eeprom {
-	unsigned8	EthNumber[6];
-	unsigned16	Reserved1;	/* Must be 0x0000 */
-	unsigned16	Reserved2;	/* Must be 0x1000 */
-	unsigned16	User1;
-	unsigned16	checksum;
-	unsigned16	Reserved3;	/* Must be 0x5757 */
-	unsigned16	bcr16;
-	unsigned16	bcr17;
-	unsigned16	bcr18;
-	unsigned16	bcr2;
-	unsigned16	bcr21;
-	unsigned16	Reserved4;	/* Must be 0x0000 */
-	unsigned16	Reserved5;	/* Must be 0x0000 */
-	unsigned8	Reserved6;	/* Must be 0x00 */
-	unsigned8	checksumAdjust;
-	unsigned16	Reserved7;	/* Must be 0x0000 */
-	unsigned16	crc;		/* CCITT checksum from Serial[] onwards */
-	unsigned8	Serial[16];	/* Radstone Serial Number */
+	uint8_t  	EthNumber[6];
+	uint16_t  	Reserved1;	/* Must be 0x0000 */
+	uint16_t  	Reserved2;	/* Must be 0x1000 */
+	uint16_t  	User1;
+	uint16_t  	checksum;
+	uint16_t  	Reserved3;	/* Must be 0x5757 */
+	uint16_t  	bcr16;
+	uint16_t  	bcr17;
+	uint16_t  	bcr18;
+	uint16_t  	bcr2;
+	uint16_t  	bcr21;
+	uint16_t  	Reserved4;	/* Must be 0x0000 */
+	uint16_t  	Reserved5;	/* Must be 0x0000 */
+	uint8_t  	Reserved6;	/* Must be 0x00 */
+	uint8_t  	checksumAdjust;
+	uint16_t  	Reserved7;	/* Must be 0x0000 */
+	uint16_t  	crc;		/* CCITT checksum from Serial[] onwards */
+	uint8_t  	Serial[16];	/* Radstone Serial Number */
 } pc_net_eeprom_t;
 
 /*
@@ -219,9 +219,9 @@ typedef struct pc_net_eeprom {
 
 typedef volatile struct initblk {
 	/* mode can be set in csr15 */
-	unsigned16	ib_mode;	/* Chip's operating parameters */
-	unsigned8	ib_rlen;	/* rx ring length (power of 2) */
-	unsigned8	ib_tlen;	/* tx ring length (power of 2) */
+	uint16_t  	ib_mode;	/* Chip's operating parameters */
+	uint8_t  	ib_rlen;	/* rx ring length (power of 2) */
+	uint8_t  	ib_tlen;	/* tx ring length (power of 2) */
 /*
  * The bytes must be swapped within the word, so that, for example,
  * the address 8:0:20:1:25:5a is written in the order
@@ -229,10 +229,10 @@ typedef volatile struct initblk {
  * For PCI970 that is long word swapped: so no swapping needed, since 
  * the bus will swap.
  */
-	unsigned8	ib_padr[8];	/* physical address */
-	unsigned16	ib_ladrf[4];	/* logical address filter */
-	unsigned32	ib_rdra;	/* rcv ring desc addr */
-	unsigned32	ib_tdra;	/* xmit ring desc addr */
+	uint8_t  	ib_padr[8];	/* physical address */
+	uint16_t  	ib_ladrf[4];	/* logical address filter */
+	uint32_t  	ib_rdra;	/* rcv ring desc addr */
+	uint32_t  	ib_tdra;	/* xmit ring desc addr */
 } initblk_t;
 
 
@@ -275,15 +275,15 @@ typedef volatile struct initblk {
  */
 
 typedef volatile struct rmde {
-	unsigned32	rmde_addr;	/* buf addr */
+	uint32_t  	rmde_addr;	/* buf addr */
 
-	unsigned16	rmde_bcnt; 
-	unsigned16	rmde_flags;
+	uint16_t  	rmde_bcnt; 
+	uint16_t  	rmde_flags;
 
-	unsigned16	rmde_mcnt;
-	unsigned16	rmde_misc;
+	uint16_t  	rmde_mcnt;
+	uint16_t  	rmde_misc;
 
-	unsigned32	align;
+	uint32_t  	align;
 } rmde_t;
 
 
@@ -319,14 +319,14 @@ typedef volatile struct rmde {
  * 16 and 32 byte field will require swapping.
  */
 typedef volatile struct tmde {
-    	unsigned32	tmde_addr;	/* buf addr */
+    	uint32_t  	tmde_addr;	/* buf addr */
 
-	unsigned16	tmde_bcnt; 
-	unsigned16	tmde_status;	/* misc error and status bits */
+	uint16_t  	tmde_bcnt; 
+	uint16_t  	tmde_status;	/* misc error and status bits */
 
-	unsigned32	tmde_error;
+	uint32_t  	tmde_error;
 
-	unsigned32	align;
+	uint32_t  	align;
 } tmde_t;
 
 /*
@@ -414,13 +414,13 @@ typedef volatile struct tmde {
 /*
  * Bit definitions for BCR19 
  */
-#define	prom_EDI	(unsigned16)0x0001
-#define	prom_EDO	(unsigned16)0x0001
-#define	prom_ESK	(unsigned16)0x0002
-#define	prom_ECS	(unsigned16)0x0004
-#define	prom_EEN	(unsigned16)0x0010
-#define	prom_EEDET	(unsigned16)0x2000
-#define	prom_PVALID	(unsigned16)0x8000
-#define	prom_PREAD	(unsigned16)0x4000
+#define	prom_EDI	(uint16_t)0x0001
+#define	prom_EDO	(uint16_t)0x0001
+#define	prom_ESK	(uint16_t)0x0002
+#define	prom_ECS	(uint16_t)0x0004
+#define	prom_EEN	(uint16_t)0x0010
+#define	prom_EEDET	(uint16_t)0x2000
+#define	prom_PVALID	(uint16_t)0x8000
+#define	prom_PREAD	(uint16_t)0x4000
 
 #endif
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/nvram/mk48t18.h b/c/src/lib/libbsp/powerpc/ppcn_60x/nvram/mk48t18.h
index f4aa3be106..958fd5a557 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/nvram/mk48t18.h
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/nvram/mk48t18.h
@@ -33,35 +33,35 @@
  */
  
 typedef struct _MK48T18_CMOS_MAP {
-    unsigned8 SystemDependentArea2[8];
-    unsigned8 FeatureByte0[1];
-    unsigned8 FeatureByte1[1];
-    unsigned8 Century;	     /* century byte in BCD */
-    unsigned8 FeatureByte3[1];
-    unsigned8 FeatureByte4[1];
-    unsigned8 FeatureByte5[1];
-    unsigned8 FeatureByte6[1];
-    unsigned8 FeatureByte7[1];
-    unsigned8 BootPW[14];
-    rtems_unsigned16 BootCrc; /* CRC on BootPW */
-    unsigned8 ConfigPW[14];
-    rtems_unsigned16 ConfigCrc; /* CRC on ConfigPW */
-    unsigned8 SystemDependentArea1[8];
+    uint8_t   SystemDependentArea2[8];
+    uint8_t   FeatureByte0[1];
+    uint8_t   FeatureByte1[1];
+    uint8_t   Century;	     /* century byte in BCD */
+    uint8_t   FeatureByte3[1];
+    uint8_t   FeatureByte4[1];
+    uint8_t   FeatureByte5[1];
+    uint8_t   FeatureByte6[1];
+    uint8_t   FeatureByte7[1];
+    uint8_t   BootPW[14];
+    uint16_t         BootCrc; /* CRC on BootPW */
+    uint8_t   ConfigPW[14];
+    uint16_t         ConfigCrc; /* CRC on ConfigPW */
+    uint8_t   SystemDependentArea1[8];
     /*
      * The following are the RTC registers
      */
-    volatile unsigned8 Control;
-    volatile unsigned8 Second:7;	/* 0-59 */
-    volatile unsigned8 Stop:1;
-    volatile unsigned8 Minute;	/* 0-59 */
-    volatile unsigned8 Hour;	/* 0-23 */
-    volatile unsigned8 Day:3;	/* 1-7 */
-    volatile unsigned8 Resvd1:3;	/* 0 */
-    volatile unsigned8 FT:1;	/* Frequency test bit - must be 0 */
-    volatile unsigned8 Resvd2:1;	/* 0 */
-    volatile unsigned8 Date;	/* 1-31 */
-    volatile unsigned8 Month;	/* 1-12 */
-    volatile unsigned8 Year;	/* 0-99 */
+    volatile uint8_t   Control;
+    volatile uint8_t   Second:7;	/* 0-59 */
+    volatile uint8_t   Stop:1;
+    volatile uint8_t   Minute;	/* 0-59 */
+    volatile uint8_t   Hour;	/* 0-23 */
+    volatile uint8_t   Day:3;	/* 1-7 */
+    volatile uint8_t   Resvd1:3;	/* 0 */
+    volatile uint8_t   FT:1;	/* Frequency test bit - must be 0 */
+    volatile uint8_t   Resvd2:1;	/* 0 */
+    volatile uint8_t   Date;	/* 1-31 */
+    volatile uint8_t   Month;	/* 1-12 */
+    volatile uint8_t   Year;	/* 0-99 */
 } MK48T18_CMOS_MAP, *PMK48T18_CMOS_MAP;
 
 /*
@@ -73,14 +73,14 @@ typedef struct _MK48T18_CMOS_MAP {
 
 #define MK48T18_NVSIZE 8192-sizeof(MK48T18_CMOS_MAP)
 #define MK48T18_GESIZE (MK48T18_NVSIZE-CONFSIZE-OSAREASIZE-sizeof(HEADER))
-#define MK48T18_BASE (PMK48T18_NVRAM_MAP)((unsigned8 *)PCI_MEM_BASE+0x00800000)
+#define MK48T18_BASE (PMK48T18_NVRAM_MAP)((uint8_t*)PCI_MEM_BASE+0x00800000)
 
 /* Here is the whole map of the MK48T18 NVRAM */
 typedef struct _MK48T18_NVRAM_MAP {
     HEADER	Header;
-    unsigned8	GEArea[MK48T18_GESIZE];
-    unsigned8	OSArea[OSAREASIZE];
-    unsigned8	ConfigArea[CONFSIZE];
+    uint8_t  	GEArea[MK48T18_GESIZE];
+    uint8_t  	OSArea[OSAREASIZE];
+    uint8_t  	ConfigArea[CONFSIZE];
     MK48T18_CMOS_MAP	CMOS;
 } MK48T18_NVRAM_MAP, *PMK48T18_NVRAM_MAP;
 
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/nvram/nvram.c b/c/src/lib/libbsp/powerpc/ppcn_60x/nvram/nvram.c
index bf085c968b..753cdda86a 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/nvram/nvram.c
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/nvram/nvram.c
@@ -28,15 +28,15 @@ typedef
 void
 (*PNVRAMWRITE)
 (
-	unsigned32 ulOffset,
-	unsigned8 ucByte
+	uint32_t   ulOffset,
+	uint8_t   ucByte
 );
 
 typedef
-unsigned8
+uint8_t  
 (*PNVRAMREAD)
 (
-	unsigned32 ulOffset
+	uint32_t   ulOffset
 );
 
 typedef
@@ -50,7 +50,7 @@ typedef struct _NVRAM_ENTRY_TABLE
 	PNVRAMWRITE	nvramWrite;
 	PNVRAMREAD	nvramRead;
 	PNVRAMCOMMIT	nvramCommit;
-	unsigned32	nvramSize;
+	uint32_t  	nvramSize;
 } NVRAM_ENTRY_TABLE, *PNVRAM_ENTRY_TABLE;
 
 /*
@@ -66,14 +66,14 @@ static void nvramCommitStub();
 /*
  * DS1385 specific routines
  */
-static void nvramDsWrite(unsigned32 ulOffset, unsigned8 ucByte);
-static unsigned8 nvramDsRead(unsigned32 ulOffset);
+static void nvramDsWrite(uint32_t   ulOffset, uint8_t   ucByte);
+static uint8_t   nvramDsRead(uint32_t   ulOffset);
 
 /*
  * MK48T18 specific routines
  */
-static void nvramMkWrite(unsigned32 ulOffset, unsigned8 ucByte);
-static unsigned8 nvramMkRead(unsigned32 ulOffset);
+static void nvramMkWrite(uint32_t   ulOffset, uint8_t   ucByte);
+static uint8_t   nvramMkRead(uint32_t   ulOffset);
 
 /*
  * STK11C68 specific routines
@@ -128,8 +128,8 @@ NVRAM_ENTRY_TABLE nvramStk88Table =
  */
 static PNVRAM_ENTRY_TABLE pNvRAMFunc;
 static boolean		bNvRAMChanged=FALSE;
-static unsigned32	ulPRePOSAreaLength;
-static unsigned32	ulPRePOSAreaOffset;
+static uint32_t  	ulPRePOSAreaLength;
+static uint32_t  	ulPRePOSAreaOffset;
 
 /*
  * Mutual-exclusion semaphore
@@ -139,9 +139,9 @@ static rtems_id semNvRAM;
 /*
  * These routines support the ds1385
  */
-static unsigned8 nvramDsRead(unsigned32 ulOffset)
+static uint8_t   nvramDsRead(uint32_t   ulOffset)
 {
-	unsigned8 ucTemp;
+	uint8_t   ucTemp;
 
 	ucTemp = ulOffset & 0xff;
 	outport_byte(DS1385_PORT_BASE, ucTemp);
@@ -153,15 +153,15 @@ static unsigned8 nvramDsRead(unsigned32 ulOffset)
 	return(ucTemp);
 }
 
-static void nvramDsWrite(unsigned32 ulOffset, unsigned8 ucData)
+static void nvramDsWrite(uint32_t   ulOffset, uint8_t   ucData)
 {
-	unsigned8 ucTemp;
+	uint8_t   ucTemp;
 
-	ucTemp = (unsigned8)(ulOffset & 0xff);
-	outport_byte(DS1385_PORT_BASE, (unsigned8) ucTemp);
+	ucTemp = (uint8_t)(ulOffset & 0xff);
+	outport_byte(DS1385_PORT_BASE, (uint8_t) ucTemp);
 
-	ucTemp = (unsigned8)((ulOffset >> 8) & 0xf);
-	outport_byte((DS1385_PORT_BASE + 1) , (unsigned8)ucTemp);
+	ucTemp = (uint8_t)((ulOffset >> 8) & 0xf);
+	outport_byte((DS1385_PORT_BASE + 1) , (uint8_t)ucTemp);
 
 	outport_byte((DS1385_PORT_BASE+3), ucData);
 }
@@ -169,16 +169,16 @@ static void nvramDsWrite(unsigned32 ulOffset, unsigned8 ucData)
 /*
  * These routines support the MK48T18 and STK11C68
  */
-static unsigned8 nvramMkRead(unsigned32 ulOffset)
+static uint8_t   nvramMkRead(uint32_t   ulOffset)
 {
-	unsigned8 *pNvRAM = (unsigned8 *)MK48T18_BASE;
+	uint8_t   *pNvRAM = (uint8_t*)MK48T18_BASE;
 
 	return(pNvRAM[ulOffset]);
 }
 
-static void nvramMkWrite(unsigned32 ulOffset, unsigned8 ucData)
+static void nvramMkWrite(uint32_t   ulOffset, uint8_t   ucData)
 {
-	unsigned8 *pNvRAM = (unsigned8 *)MK48T18_BASE;
+	uint8_t   *pNvRAM = (uint8_t*)MK48T18_BASE;
 
 	pNvRAM[ulOffset]=ucData;
 }
@@ -287,7 +287,7 @@ static void nvramStk11C88Commit()
 /*
  * This routine returns the size of the NvRAM
  */
-unsigned32 SizeNvRAM()
+uint32_t   SizeNvRAM()
 {
 	return(ulPRePOSAreaLength);
 }
@@ -306,7 +306,7 @@ void CommitNvRAM()
 /*
  * This routine reads a byte from the NvRAM
  */
-rtems_status_code ReadNvRAM8(unsigned32 ulOffset, unsigned8 *pucData)
+rtems_status_code ReadNvRAM8(uint32_t   ulOffset, uint8_t   *pucData)
 {
 	if(ulOffset>ulPRePOSAreaLength)
 	{
@@ -321,7 +321,7 @@ rtems_status_code ReadNvRAM8(unsigned32 ulOffset, unsigned8 *pucData)
 /*
  * This routine writes a byte to the NvRAM
  */
-rtems_status_code WriteNvRAM8(unsigned32 ulOffset, unsigned8 ucValue)
+rtems_status_code WriteNvRAM8(uint32_t   ulOffset, uint8_t   ucValue)
 {
 	if(ulOffset>ulPRePOSAreaLength)
 	{
@@ -338,9 +338,9 @@ rtems_status_code WriteNvRAM8(unsigned32 ulOffset, unsigned8 ucValue)
  * This routine reads a block of bytes from the NvRAM
  */
 rtems_status_code ReadNvRAMBlock(
-  unsigned32 ulOffset, unsigned8 *pucData, unsigned32 length)
+  uint32_t   ulOffset, uint8_t   *pucData, uint32_t   length)
 {
-	unsigned32 i;
+	uint32_t   i;
 
 	if((ulOffset + length) > ulPRePOSAreaLength)
 	{
@@ -358,9 +358,9 @@ rtems_status_code ReadNvRAMBlock(
  * This routine writes a block of bytes to the NvRAM
  */
 rtems_status_code WriteNvRAMBlock(
-  unsigned32 ulOffset, unsigned8 *ucValue, unsigned32 length)
+  uint32_t   ulOffset, uint8_t   *ucValue, uint32_t   length)
 {
-	unsigned32 i;
+	uint32_t   i;
 
 	if((ulOffset + length) > ulPRePOSAreaLength)
 	{
@@ -379,9 +379,9 @@ rtems_status_code WriteNvRAMBlock(
 /*
  * The NVRAM holds data in Big-Endian format
  */
-rtems_status_code ReadNvRAM16 (unsigned32 ulOffset, unsigned16 *pusData)
+rtems_status_code ReadNvRAM16 (uint32_t   ulOffset, uint16_t   *pusData)
 {
-	unsigned32 ulTrueOffset=ulPRePOSAreaOffset+ulOffset;
+	uint32_t   ulTrueOffset=ulPRePOSAreaOffset+ulOffset;
 
 	if(ulOffset>ulPRePOSAreaLength)
 	{
@@ -394,25 +394,25 @@ rtems_status_code ReadNvRAM16 (unsigned32 ulOffset, unsigned16 *pusData)
 	return(RTEMS_SUCCESSFUL);
 }
 
-rtems_status_code WriteNvRAM16 (unsigned32 ulOffset, unsigned16 usValue)
+rtems_status_code WriteNvRAM16 (uint32_t   ulOffset, uint16_t   usValue)
 {
-	unsigned32 ulTrueOffset=ulPRePOSAreaOffset+ulOffset;
+	uint32_t   ulTrueOffset=ulPRePOSAreaOffset+ulOffset;
 
 	if(ulOffset>ulPRePOSAreaLength)
 	{
 		return RTEMS_INVALID_ADDRESS;
 	}
 	rtems_semaphore_obtain(semNvRAM, RTEMS_WAIT, RTEMS_NO_TIMEOUT);
-        pNvRAMFunc->nvramWrite(ulTrueOffset, (unsigned8) (usValue >> 8));
-        pNvRAMFunc->nvramWrite(ulTrueOffset + 1, (unsigned8) usValue);
+        pNvRAMFunc->nvramWrite(ulTrueOffset, (uint8_t) (usValue >> 8));
+        pNvRAMFunc->nvramWrite(ulTrueOffset + 1, (uint8_t) usValue);
 	bNvRAMChanged=TRUE;
 	rtems_semaphore_release(semNvRAM);
 	return(RTEMS_SUCCESSFUL);
 }
 
-rtems_status_code ReadNvRAM32 (unsigned32 ulOffset, unsigned32 *pulData)
+rtems_status_code ReadNvRAM32 (uint32_t   ulOffset, uint32_t   *pulData)
 {
-	unsigned32 ulTrueOffset=ulPRePOSAreaOffset+ulOffset;
+	uint32_t   ulTrueOffset=ulPRePOSAreaOffset+ulOffset;
 
 	if(ulOffset>ulPRePOSAreaLength)
 	{
@@ -427,19 +427,19 @@ rtems_status_code ReadNvRAM32 (unsigned32 ulOffset, unsigned32 *pulData)
 	return(RTEMS_SUCCESSFUL);
 }
 
-rtems_status_code WriteNvRAM32 (unsigned32 ulOffset, unsigned32 ulValue)
+rtems_status_code WriteNvRAM32 (uint32_t   ulOffset, uint32_t   ulValue)
 {
-	unsigned32 ulTrueOffset=ulPRePOSAreaOffset+ulOffset;
+	uint32_t   ulTrueOffset=ulPRePOSAreaOffset+ulOffset;
 
 	if(ulOffset>ulPRePOSAreaLength)
 	{
 		return RTEMS_INVALID_ADDRESS;
 	}
 	rtems_semaphore_obtain(semNvRAM, RTEMS_WAIT, RTEMS_NO_TIMEOUT);
-        pNvRAMFunc->nvramWrite(ulTrueOffset, (unsigned8) (ulValue >> 24));
-        pNvRAMFunc->nvramWrite(ulTrueOffset + 1, (unsigned8) (ulValue >> 16));
-        pNvRAMFunc->nvramWrite(ulTrueOffset + 2, (unsigned8) (ulValue >> 8));
-        pNvRAMFunc->nvramWrite(ulTrueOffset + 3, (unsigned8) ulValue);
+        pNvRAMFunc->nvramWrite(ulTrueOffset, (uint8_t) (ulValue >> 24));
+        pNvRAMFunc->nvramWrite(ulTrueOffset + 1, (uint8_t) (ulValue >> 16));
+        pNvRAMFunc->nvramWrite(ulTrueOffset + 2, (uint8_t) (ulValue >> 8));
+        pNvRAMFunc->nvramWrite(ulTrueOffset + 3, (uint8_t) ulValue);
 	bNvRAMChanged=TRUE;
 	rtems_semaphore_release(semNvRAM);
 	return(RTEMS_SUCCESSFUL);
@@ -450,7 +450,7 @@ InitializeNvRAM(void)
 {
 	PHEADER pNvHeader = (PHEADER)0;
 	rtems_status_code sc;
-	unsigned32 ulLength, ulOffset;
+	uint32_t   ulLength, ulOffset;
 
 	if(ucSystemType==SYS_TYPE_PPC1)
 	{
@@ -502,8 +502,8 @@ InitializeNvRAM(void)
 	/*
 	 * Access the header at the start of NvRAM
 	 */
-	ReadNvRAM32((unsigned32)(&pNvHeader->OSAreaLength), &ulLength);
-	ReadNvRAM32((unsigned32)(&pNvHeader->OSAreaAddress), &ulOffset);
+	ReadNvRAM32((uint32_t)(&pNvHeader->OSAreaLength), &ulLength);
+	ReadNvRAM32((uint32_t)(&pNvHeader->OSAreaAddress), &ulOffset);
 
 	/*
 	 * Now set limits for future accesses
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/nvram/stk11c68.h b/c/src/lib/libbsp/powerpc/ppcn_60x/nvram/stk11c68.h
index 118662905b..9fc2a5a5dc 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/nvram/stk11c68.h
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/nvram/stk11c68.h
@@ -28,7 +28,7 @@
  */
 #define STK11C68_NVSIZE 8192
 #define STK11C68_GESIZE (STK11C68_NVSIZE-CONFSIZE-OSAREASIZE-sizeof(HEADER))
-#define STK11C68_BASE (PSTK11C68_NVRAM_MAP)((unsigned8 *)PCI_MEM_BASE+0x00800000)
+#define STK11C68_BASE (PSTK11C68_NVRAM_MAP)((uint8_t*)PCI_MEM_BASE+0x00800000)
 
 /*
  * STK11C88 definitions
@@ -38,9 +38,9 @@
 /* Here is the whole map of the STK11C68 NVRAM */
 typedef struct _STK11C68_NVRAM_MAP {
 	HEADER		Header;
-	unsigned8	GEArea[STK11C68_GESIZE];
-	unsigned8	OSArea[OSAREASIZE];
-	unsigned8	ConfigArea[CONFSIZE];
+	uint8_t  	GEArea[STK11C68_GESIZE];
+	uint8_t  	OSArea[OSAREASIZE];
+	uint8_t  	ConfigArea[CONFSIZE];
 } STK11C68_NVRAM_MAP, *PSTK11C68_NVRAM_MAP;
 
 #endif /* _STK11C68_H */
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/pci/pci.c b/c/src/lib/libbsp/powerpc/ppcn_60x/pci/pci.c
index 909a568d55..3f1423f7f2 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/pci/pci.c
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/pci/pci.c
@@ -48,17 +48,17 @@
 /*
  * Private data
  */
-static unsigned8 ucMaxPCIBus;
+static uint8_t   ucMaxPCIBus;
 
 /*
  * Public routines
  */
 rtems_status_code PCIConfigWrite8(
-	unsigned8 ucBusNumber,
-	unsigned8 ucSlotNumber,
-	unsigned8 ucFunctionNumber,
-	unsigned8 ucOffset,
-	unsigned8 ucValue
+	uint8_t   ucBusNumber,
+	uint8_t   ucSlotNumber,
+	uint8_t   ucFunctionNumber,
+	uint8_t   ucOffset,
+	uint8_t   ucValue
 )
 {
 	ISR_Level Irql;
@@ -86,11 +86,11 @@ rtems_status_code PCIConfigWrite8(
 }
 
 rtems_status_code PCIConfigWrite16(
-	unsigned8 ucBusNumber,
-	unsigned8 ucSlotNumber,
-	unsigned8 ucFunctionNumber,
-	unsigned8 ucOffset,
-	unsigned16 usValue
+	uint8_t   ucBusNumber,
+	uint8_t   ucSlotNumber,
+	uint8_t   ucFunctionNumber,
+	uint8_t   ucOffset,
+	uint16_t   usValue
 )
 {
 	ISR_Level Irql;
@@ -118,11 +118,11 @@ rtems_status_code PCIConfigWrite16(
 }
 
 rtems_status_code PCIConfigWrite32(
-	unsigned8 ucBusNumber,
-	unsigned8 ucSlotNumber,
-	unsigned8 ucFunctionNumber,
-	unsigned8 ucOffset,
-	unsigned32 ulValue
+	uint8_t   ucBusNumber,
+	uint8_t   ucSlotNumber,
+	uint8_t   ucFunctionNumber,
+	uint8_t   ucOffset,
+	uint32_t   ulValue
 )
 {
 	ISR_Level Irql;
@@ -150,11 +150,11 @@ rtems_status_code PCIConfigWrite32(
 }
 
 rtems_status_code PCIConfigRead8(
-	unsigned8 ucBusNumber,
-	unsigned8 ucSlotNumber,
-	unsigned8 ucFunctionNumber,
-	unsigned8 ucOffset,
-	unsigned8 *pucValue
+	uint8_t   ucBusNumber,
+	uint8_t   ucSlotNumber,
+	uint8_t   ucFunctionNumber,
+	uint8_t   ucOffset,
+	uint8_t   *pucValue
 )
 {
 	ISR_Level Irql;
@@ -182,11 +182,11 @@ rtems_status_code PCIConfigRead8(
 }
 
 rtems_status_code PCIConfigRead16(
-	unsigned8 ucBusNumber,
-	unsigned8 ucSlotNumber,
-	unsigned8 ucFunctionNumber,
-	unsigned8 ucOffset,
-	unsigned16 *pusValue
+	uint8_t   ucBusNumber,
+	uint8_t   ucSlotNumber,
+	uint8_t   ucFunctionNumber,
+	uint8_t   ucOffset,
+	uint16_t   *pusValue
 )
 {
 	ISR_Level Irql;
@@ -214,11 +214,11 @@ rtems_status_code PCIConfigRead16(
 }
 
 rtems_status_code PCIConfigRead32(
-	unsigned8 ucBusNumber,
-	unsigned8 ucSlotNumber,
-	unsigned8 ucFunctionNumber,
-	unsigned8 ucOffset,
-	unsigned32 *pulValue
+	uint8_t   ucBusNumber,
+	uint8_t   ucSlotNumber,
+	uint8_t   ucFunctionNumber,
+	uint8_t   ucOffset,
+	uint32_t   *pulValue
 )
 {
 	ISR_Level Irql;
@@ -250,10 +250,10 @@ rtems_status_code PCIConfigRead32(
  */
 void InitializePCI()
 {
-	unsigned8 ucSlotNumber, ucFnNumber, ucNumFuncs;
-	unsigned8 ucHeader;
-	unsigned8 ucBaseClass, ucSubClass, ucMaxSubordinate;
-	unsigned32 ulDeviceID;
+	uint8_t   ucSlotNumber, ucFnNumber, ucNumFuncs;
+	uint8_t   ucHeader;
+	uint8_t   ucBaseClass, ucSubClass, ucMaxSubordinate;
+	uint32_t   ulDeviceID;
 
 	/*
 	 * Scan PCI bus 0 looking for PCI-PCI bridges
@@ -336,7 +336,7 @@ void InitializePCI()
 /*
  * Return the number of PCI busses in the system
  */
-unsigned8 BusCountPCI()
+uint8_t   BusCountPCI()
 {
 	return(ucMaxPCIBus+1);
 }
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/startup/bspstart.c b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/bspstart.c
index 1acae15701..a4e5d5319f 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/bspstart.c
@@ -66,7 +66,7 @@ extern rtems_configuration_table  Configuration;
 rtems_configuration_table         BSP_Configuration;
 
 rtems_cpu_table   Cpu_table;
-rtems_unsigned32  bsp_isr_level;
+uint32_t          bsp_isr_level;
 
 static int stdin_fd, stdout_fd, stderr_fd;
 
@@ -80,7 +80,7 @@ extern int end;
  */
 
 void bsp_postdriver_hook(void);
-void bsp_libc_init( void *, unsigned32, int );
+void bsp_libc_init( void *, uint32_t, int );
 
 /*
  *  bsp_pretasking_hook
@@ -91,10 +91,10 @@ void bsp_libc_init( void *, unsigned32, int );
 
 void bsp_pretasking_hook(void)
 {
-        rtems_unsigned32 heap_start;
-        rtems_unsigned32 heap_size;
+        uint32_t         heap_start;
+        uint32_t         heap_size;
 
-        heap_start = (rtems_unsigned32) &end;
+        heap_start = (uint32_t) &end;
         if (heap_start & (CPU_ALIGNMENT-1))
           heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
 
@@ -165,11 +165,11 @@ void bsp_start( void )
 {
 	unsigned char *work_space_start;
 	unsigned char ucBoardRev, ucMothMemType, ucEquipPres1, ucEquipPres2;
-	unsigned16	usPVR=0;
-	unsigned8	ucTempl, ucTemph;
-	unsigned8	ucBanksPresent;
-	unsigned8	ucSimmPresent;
-	unsigned32	ulCurBank, ulTopBank;
+	uint16_t  	usPVR=0;
+	uint8_t  	ucTempl, ucTemph;
+	uint8_t  	ucBanksPresent;
+	uint8_t  	ucSimmPresent;
+	uint32_t  	ulCurBank, ulTopBank;
 
 	/*
 	 * Determine system type
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/startup/genpvec.c b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/genpvec.c
index deec1fc699..24a8bf71fa 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/startup/genpvec.c
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/genpvec.c
@@ -46,8 +46,8 @@ rtems_isr external_exception_ISR (
 /*
  * Current 8259 masks
  */
-unsigned8	ucMaster8259Mask;
-unsigned8	ucSlave8259Mask;
+uint8_t  	ucMaster8259Mask;
+uint8_t  	ucSlave8259Mask;
 
 /* 
  * Structure to for one of possible multiple interrupt handlers for 
@@ -65,7 +65,7 @@ typedef struct
  *        handlers at a later time.
  */
   EE_ISR_Type       ISR_Nodes [NUM_LIRQ_HANDLERS];
-  rtems_unsigned16  Nodes_Used; 
+  uint16_t          Nodes_Used; 
   Chain_Control     ISR_Array  [NUM_LIRQ];
 
 void initialize_external_exception_vector()
@@ -177,8 +177,8 @@ void set_EE_vector(
   rtems_vector_number vector        /* vector number      */
 )
 {
-	rtems_unsigned16 vec_idx  = vector - PPCN_60X_8259_IRQ_BASE;
-	rtems_unsigned32 index;
+	uint16_t         vec_idx  = vector - PPCN_60X_8259_IRQ_BASE;
+	uint32_t         index;
 
 	assert  (Nodes_Used < NUM_LIRQ_HANDLERS);
 
@@ -222,11 +222,11 @@ rtems_isr external_exception_ISR (
   rtems_vector_number   vector             /* IN  */
 )
 { 
-	unsigned16	index;
-	unsigned8	ucISr;
+	uint16_t  	index;
+	uint8_t  	ucISr;
 	EE_ISR_Type	*node;
 
-	index = *((volatile unsigned8 *)IRQ_VECTOR_BASE);
+	index = *((volatile uint8_t*)IRQ_VECTOR_BASE);
 
 	/*
 	 * check for spurious interrupt
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/startup/spurious.c b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/spurious.c
index a2015565f3..f91a3974e3 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/startup/spurious.c
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/spurious.c
@@ -175,7 +175,7 @@ rtems_isr bsp_spurious_handler(
 
 void bsp_spurious_initialize()
 {
-  rtems_unsigned32 trap;
+  uint32_t         trap;
 
   for ( trap=0 ; trap < PPC_IRQ_LAST ; trap++ ) {
 
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/startup/swap.c b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/swap.c
index 58b3e13dbb..04aa304c1d 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/startup/swap.c
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/startup/swap.c
@@ -27,10 +27,10 @@
  */
 
 inline unsigned int Swap32(
-        unsigned32 ulValue
+        uint32_t   ulValue
 )
 {
-        unsigned32 ulSwapped;
+        uint32_t   ulSwapped;
 
         asm volatile(
 		"rlwimi %0,%1,8,24,31;"
@@ -46,10 +46,10 @@ inline unsigned int Swap32(
 }
 
 inline unsigned int Swap16(
-        unsigned16 usValue
+        uint16_t   usValue
 )
 {
-        unsigned16 usSwapped;
+        uint16_t   usSwapped;
 
         asm volatile(
 		"rlwimi %0,%1,24,24,31;"
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/timer/timer.c b/c/src/lib/libbsp/powerpc/ppcn_60x/timer/timer.c
index 4b91a0e8dd..9d82edb0da 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/timer/timer.c
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/timer/timer.c
@@ -21,7 +21,7 @@
 
 #include <bsp.h>
 
-rtems_unsigned64 Timer_driver_Start_time;
+uint64_t         Timer_driver_Start_time;
 
 rtems_boolean Timer_driver_Find_average_overhead;
 
@@ -43,9 +43,9 @@ void Timer_initialize()
  */
 int Read_timer()
 {
-  rtems_unsigned64  clicks;
-  rtems_unsigned64  total64;
-  rtems_unsigned32  total;
+  uint64_t          clicks;
+  uint64_t          total64;
+  uint32_t          total;
 
   /* approximately CLOCK_SPEED clicks per microsecond */
 
@@ -55,9 +55,9 @@ int Read_timer()
 
   total64 = clicks - Timer_driver_Start_time;
 
-  assert( total64 <= 0xffffffff );  /* fits into a unsigned32 */
+  assert( total64 <= 0xffffffff );  /* fits into a uint32_t   */
 
-  total = (rtems_unsigned32) total64;
+  total = (uint32_t) total64;
 
   if ( Timer_driver_Find_average_overhead == 1 )
     return total;          /* in "clicks" of the decrementer units */
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/tod/cmos.h b/c/src/lib/libbsp/powerpc/ppcn_60x/tod/cmos.h
index 92cd7813a8..6df03f6cbd 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/tod/cmos.h
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/tod/cmos.h
@@ -67,29 +67,29 @@
 #define DS1385_REGD_VALID	0x80
  
 typedef struct _CMOS_MAP {
-    volatile rtems_unsigned8 DateAndTime[14];
+    volatile uint8_t         DateAndTime[14];
 
-    rtems_unsigned8 SystemDependentArea1[2];
-    rtems_unsigned8 SystemDependentArea2[8];
-    rtems_unsigned8 FeatureByte0[1];
-    rtems_unsigned8 FeatureByte1[1]; /* 19 = PW Flag;
+    uint8_t         SystemDependentArea1[2];
+    uint8_t         SystemDependentArea2[8];
+    uint8_t         FeatureByte0[1];
+    uint8_t         FeatureByte1[1]; /* 19 = PW Flag;
     attribute = write protect */
-    rtems_unsigned8 Century[1]; /* century byte in BCD, e.g. 0x19 currently */
-    rtems_unsigned8 FeatureByte3[1];
-    rtems_unsigned8 FeatureByte4[1];
-    rtems_unsigned8 FeatureByte5[1];
-    rtems_unsigned8 FeatureByte6[1];
-    rtems_unsigned8 FeatureByte7[1]; /* 1F = Alternate PW Flag;
+    uint8_t         Century[1]; /* century byte in BCD, e.g. 0x19 currently */
+    uint8_t         FeatureByte3[1];
+    uint8_t         FeatureByte4[1];
+    uint8_t         FeatureByte5[1];
+    uint8_t         FeatureByte6[1];
+    uint8_t         FeatureByte7[1]; /* 1F = Alternate PW Flag;
     attribute = write protect */
-    rtems_unsigned8 BootPW[14]; /* Power-on password needed to boot system;
+    uint8_t         BootPW[14]; /* Power-on password needed to boot system;
     reset value = 0x00000000000000005a5a5a5a5a5a);
     attribute = lock */
-    rtems_unsigned8 BootCrc[2]; /* CRC on BootPW */
-    rtems_unsigned8 ConfigPW[14]; /* Configuration Password needed to
+    uint8_t         BootCrc[2]; /* CRC on BootPW */
+    uint8_t         ConfigPW[14]; /* Configuration Password needed to
     change configuration of system;
     reset value = 0x00000000000000005a5a5a5a5a5a);
     attribute = lock */
-    rtems_unsigned8 ConfigCrc[2]; /* CRC on ConfigPW */
+    uint8_t         ConfigCrc[2]; /* CRC on ConfigPW */
 } CMOS_MAP, *PCMOS_MAP;
  
 #endif /* _CMOS_ */
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/tod/tod.c b/c/src/lib/libbsp/powerpc/ppcn_60x/tod/tod.c
index 80e0ff3116..7872747a6a 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/tod/tod.c
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/tod/tod.c
@@ -88,7 +88,7 @@ static rtems_id	semRTC;
 /*
  * This only works for the Gregorian calendar - i.e. after 1752 (in the UK)
  */
-rtems_unsigned8 
+uint8_t         
 GregorianDay(rtems_time_of_day *pTOD)
 {
 	boolean isLeap;
@@ -126,13 +126,13 @@ GregorianDay(rtems_time_of_day *pTOD)
 	day += lastYear*365 + leapsToDate + MonthOffset[pTOD->month-1] +
 		   pTOD->day;
 
-	return((rtems_unsigned8)(day%7));
+	return((uint8_t)(day%7));
 }
 
 void
 DsWriteRawClockRegister (
-	rtems_unsigned8 Register,
-	rtems_unsigned8 Value
+	uint8_t         Register,
+	uint8_t         Value
 )
 
 /*++
@@ -156,17 +156,17 @@ Return Value:
 --*/
 
 {
-	outport_byte((rtems_unsigned8 *)RTC_PORT, Register & 0x7f);
+	outport_byte((uint8_t*)RTC_PORT, Register & 0x7f);
 
 	/* Read the realtime clock register value. */
 
-	outport_byte((rtems_unsigned8 *)(RTC_PORT + 1), Value);
+	outport_byte((uint8_t*)(RTC_PORT + 1), Value);
 	return;
 }
 
-rtems_unsigned8
+uint8_t        
 DsReadRawClockRegister (
-	rtems_unsigned8 Register
+	uint8_t         Register
 )
 
 /*++
@@ -190,20 +190,20 @@ Return Value:
 --*/
 
 {
-	rtems_unsigned8 ucDataByte;
+	uint8_t         ucDataByte;
 
-	outport_byte((rtems_unsigned8 *)RTC_PORT, Register & 0x7f);
+	outport_byte((uint8_t*)RTC_PORT, Register & 0x7f);
 
 	/* Read the realtime clock register value. */
 
-	inport_byte((rtems_unsigned8 *)(RTC_PORT + 1), ucDataByte);
+	inport_byte((uint8_t*)(RTC_PORT + 1), ucDataByte);
 	return ucDataByte;
 }
 
 void
 DsWriteClockRegister (
-	rtems_unsigned8 Register,
-	rtems_unsigned8 Value
+	uint8_t         Register,
+	uint8_t         Value
 )
 
 /*++
@@ -226,16 +226,16 @@ Return Value:
 --*/
 
 {
-	rtems_unsigned8 BcdValue;
+	uint8_t         BcdValue;
 
 	BcdValue = Bin2BCD(Value);
 	DsWriteRawClockRegister(Register, BcdValue);
 	return;
 }
 
-rtems_unsigned8
+uint8_t        
 DsReadClockRegister (
-	rtems_unsigned8 Register
+	uint8_t         Register
 )
 
 /*++
@@ -255,7 +255,7 @@ Return Value:
 --*/
 
 {
-	rtems_unsigned8 BcdValue;
+	uint8_t         BcdValue;
 
 	BcdValue =  DsReadRawClockRegister(Register);
 	return BCD2Bin(BcdValue);
@@ -289,7 +289,7 @@ Return Value:
 --*/
 
 {
-	rtems_unsigned8 ucDataByte;
+	uint8_t         ucDataByte;
 	PCMOS_MAP pCMOS = (PCMOS_MAP)0;
 
 	/* If the realtime clock battery is still functioning, then write */
@@ -307,26 +307,26 @@ Return Value:
 		/* Write the realtime clock values. */
 
 		DsWriteClockRegister(RTC_YEAR,
-				     (rtems_unsigned8)(pTOD->year%100));
+				     (uint8_t)(pTOD->year%100));
 		if(pTOD->year>=100)
 		{
-			DsWriteClockRegister((rtems_unsigned8)
+			DsWriteClockRegister((uint8_t)
 					     ((unsigned long)&pCMOS->Century),
 					     pTOD->year/100);
 		}
 		DsWriteClockRegister(RTC_MONTH,
-				     (rtems_unsigned8)pTOD->month);
+				     (uint8_t)pTOD->month);
 		DsWriteClockRegister(RTC_DAY_OF_MONTH,
-				     (rtems_unsigned8)pTOD->day);
+				     (uint8_t)pTOD->day);
 		DsWriteClockRegister(RTC_DAY_OF_WEEK,
-				     (rtems_unsigned8)
+				     (uint8_t)
 				     (GregorianDay(pTOD) + 1));
 		DsWriteClockRegister(RTC_HOUR,
-				     (rtems_unsigned8)pTOD->hour);
+				     (uint8_t)pTOD->hour);
 		DsWriteClockRegister(RTC_MINUTE,
-				     (rtems_unsigned8)pTOD->minute);
+				     (uint8_t)pTOD->minute);
 		DsWriteClockRegister(RTC_SECOND,
-				     (rtems_unsigned8)pTOD->second);
+				     (uint8_t)pTOD->second);
 
 		/* Set the realtime clock control to update the time. */
 
@@ -366,7 +366,7 @@ Return Value:
 --*/
 
 {
-	rtems_unsigned8 ucDataByte;
+	uint8_t         ucDataByte;
 	PCMOS_MAP pCMOS = (PCMOS_MAP)0;
 
 	/* If the realtime clock battery is still functioning, then read */
@@ -385,9 +385,9 @@ Return Value:
 
 		/* Read the realtime clock values. */
 
-		pTOD->year=(rtems_unsigned16)
+		pTOD->year=(uint16_t)
 				  (DsReadClockRegister(
-				   (rtems_unsigned8)
+				   (uint8_t)
 				   (unsigned long)&pCMOS->Century)
 				  *100 + DsReadClockRegister(RTC_YEAR));
 		pTOD->month=DsReadClockRegister(RTC_MONTH);
@@ -443,18 +443,18 @@ Return Value:
 	 * Write the realtime clock values.
 	 */
 
-	pNvRAM->CMOS.Year = (rtems_unsigned8)Bin2BCD(pTOD->year%100);
+	pNvRAM->CMOS.Year = (uint8_t)Bin2BCD(pTOD->year%100);
 	if(pTOD->year>=100)
 	{
-	    pNvRAM->CMOS.Century=(rtems_unsigned8)
+	    pNvRAM->CMOS.Century=(uint8_t)
 	    			 Bin2BCD(pTOD->year/100);
 	}
-	pNvRAM->CMOS.Month  = (rtems_unsigned8)Bin2BCD(pTOD->month);
-	pNvRAM->CMOS.Date   = (rtems_unsigned8)Bin2BCD(pTOD->day);
-	pNvRAM->CMOS.Day    = (rtems_unsigned8)(GregorianDay(pTOD) + 1);
-	pNvRAM->CMOS.Hour   = (rtems_unsigned8)Bin2BCD(pTOD->hour);
-	pNvRAM->CMOS.Minute = (rtems_unsigned8)Bin2BCD(pTOD->minute);
-	pNvRAM->CMOS.Second = (rtems_unsigned8)Bin2BCD(pTOD->second);
+	pNvRAM->CMOS.Month  = (uint8_t)Bin2BCD(pTOD->month);
+	pNvRAM->CMOS.Date   = (uint8_t)Bin2BCD(pTOD->day);
+	pNvRAM->CMOS.Day    = (uint8_t)(GregorianDay(pTOD) + 1);
+	pNvRAM->CMOS.Hour   = (uint8_t)Bin2BCD(pTOD->hour);
+	pNvRAM->CMOS.Minute = (uint8_t)Bin2BCD(pTOD->minute);
+	pNvRAM->CMOS.Second = (uint8_t)Bin2BCD(pTOD->second);
 
 	/*
 	 * Set the realtime clock control to update the time.
@@ -504,13 +504,13 @@ Return Value:
 	 * Read the realtime clock values.
 	 */
 
-	pTOD->year = (rtems_unsigned16)(100*BCD2Bin(pNvRAM->CMOS.Century)+
+	pTOD->year = (uint16_t)(100*BCD2Bin(pNvRAM->CMOS.Century)+
 					      BCD2Bin(pNvRAM->CMOS.Year));
-	pTOD->month = (rtems_unsigned8)BCD2Bin(pNvRAM->CMOS.Month);
-	pTOD->day = (rtems_unsigned8)BCD2Bin(pNvRAM->CMOS.Date);
-	pTOD->hour = (rtems_unsigned8)BCD2Bin(pNvRAM->CMOS.Hour);
-	pTOD->minute = (rtems_unsigned8)BCD2Bin(pNvRAM->CMOS.Minute);
-	pTOD->second = (rtems_unsigned8)BCD2Bin(pNvRAM->CMOS.Second);
+	pTOD->month = (uint8_t)BCD2Bin(pNvRAM->CMOS.Month);
+	pTOD->day = (uint8_t)BCD2Bin(pNvRAM->CMOS.Date);
+	pTOD->hour = (uint8_t)BCD2Bin(pNvRAM->CMOS.Hour);
+	pTOD->minute = (uint8_t)BCD2Bin(pNvRAM->CMOS.Minute);
+	pTOD->second = (uint8_t)BCD2Bin(pNvRAM->CMOS.Second);
 
 	/*
 	 * Set the realtime clock control to normal mode.
diff --git a/c/src/lib/libbsp/powerpc/ppcn_60x/universe/universe.c b/c/src/lib/libbsp/powerpc/ppcn_60x/universe/universe.c
index 05e1a4d466..62e0ae27fa 100644
--- a/c/src/lib/libbsp/powerpc/ppcn_60x/universe/universe.c
+++ b/c/src/lib/libbsp/powerpc/ppcn_60x/universe/universe.c
@@ -34,108 +34,108 @@
  ********************************************************************/
 
 typedef struct {
-  rtems_unsigned32 PCI_ID;                 /* Offset 0x0000 */
-  rtems_unsigned32 PCI_CSR;                /* Offset 0x0004 */
-  rtems_unsigned32 PCI_CLASS;              /* Offset 0x0008 */
-  rtems_unsigned32 PCI_MISC0;              /* Offset 0x000C */
-  rtems_unsigned32 PCI_BS;                 /* Offset 0x0010 */
-  rtems_unsigned32 Buf_Offset_0x0014[ 0x0A ]; /* Offset 0x0014 */
-  rtems_unsigned32 PCI_MISC1;              /* Offset 0x003C */
-  rtems_unsigned32 Buf_Offset_0x0040[ 0x30 ]; /* Offset 0x0040 */
-  rtems_unsigned32 LSI0_CTL;               /* Offset 0x0100 */
-  rtems_unsigned32 LSI0_BS;                /* Offset 0x0104 */
-  rtems_unsigned32 LSI0_BD;                /* Offset 0x0108 */
-  rtems_unsigned32 LSI0_TO;                /* Offset 0x010C */
-  rtems_unsigned32 Buf_Offset_0x0110;         /* Offset 0x0110 */
-  rtems_unsigned32 LSI1_CTL;               /* Offset 0x0114 */
-  rtems_unsigned32 LSI1_BS;                /* Offset 0x0118 */
-  rtems_unsigned32 LSI1_BD;                /* Offset 0x011C */
-  rtems_unsigned32 LSI1_TO;                /* Offset 0x0120 */
-  rtems_unsigned32 Buf_Offset_0x0124;         /* Offset 0x0124 */
-  rtems_unsigned32 LSI2_CTL;               /* Offset 0x0128 */
-  rtems_unsigned32 LSI2_BS;                /* Offset 0x012C */
-  rtems_unsigned32 LSI2_BD;                /* Offset 0x0130 */
-  rtems_unsigned32 LSI2_TO;                /* Offset 0x0134 */
-  rtems_unsigned32 Buf_Offset_0x0138;         /* Offset 0x0138 */
-  rtems_unsigned32 LSI3_CTL;               /* Offset 0x013C */
-  rtems_unsigned32 LSI3_BS;                /* Offset 0x0140 */
-  rtems_unsigned32 LSI3_BD;                /* Offset 0x0144 */
-  rtems_unsigned32 LSI3_TO;                /* Offset 0x0148 */
-  rtems_unsigned32 Buf_Offset_0x014C[ 0x09 ]; /* Offset 0x014C */
-  rtems_unsigned32 SCYC_CTL;               /* Offset 0x0170 */
-  rtems_unsigned32 SCYC_ADDR;              /* Offset 0x0174 */
-  rtems_unsigned32 SCYC_EN;                /* Offset 0x0178 */
-  rtems_unsigned32 SCYC_CMP;               /* Offset 0x017C */
-  rtems_unsigned32 SCYC_SWP;               /* Offset 0x0180 */
-  rtems_unsigned32 LMISC;                  /* Offset 0x0184 */
-  rtems_unsigned32 SLSI;                   /* Offset 0x0188 */
-  rtems_unsigned32 L_CMDERR;               /* Offset 0x018C */
-  rtems_unsigned32 LAERR;                  /* Offset 0x0190 */
-  rtems_unsigned32 Buf_Offset_0x0194[ 0x1B ]; /* Offset 0x0194 */
-  rtems_unsigned32 DCTL;                   /* Offset 0x0200 */
-  rtems_unsigned32 DTBC;                   /* Offset 0x0204 */
-  rtems_unsigned32 DLA;                    /* Offset 0x0208 */
-  rtems_unsigned32 Buf_Offset_0x020C;         /* Offset 0x020C */
-  rtems_unsigned32 DVA;                    /* Offset 0x0210 */
-  rtems_unsigned32 Buf_Offset_0x0214;         /* Offset 0x0214 */
-  rtems_unsigned32 DCPP;                   /* Offset 0x0218 */
-  rtems_unsigned32 Buf_Offset_0x021C;         /* Offset 0x021C */
-  rtems_unsigned32 DGCS;                   /* Offset 0x0220 */
-  rtems_unsigned32 D_LLUE;                 /* Offset 0x0224 */
-  rtems_unsigned32 Buf_Offset_0x0228[ 0x36 ]; /* Offset 0x0228 */
-  rtems_unsigned32 LINT_EN;                /* Offset 0x0300 */
-  rtems_unsigned32 LINT_STAT;              /* Offset 0x0304 */
-  rtems_unsigned32 LINT_MAP0;              /* Offset 0x0308 */
-  rtems_unsigned32 LINT_MAP1;              /* Offset 0x030C */
-  rtems_unsigned32 VINT_EN;                /* Offset 0x0310 */
-  rtems_unsigned32 VINT_STAT;              /* Offset 0x0314 */
-  rtems_unsigned32 VINT_MAP0;              /* Offset 0x0318 */
-  rtems_unsigned32 VINT_MAP1;              /* Offset 0x031C */
-  rtems_unsigned32 STATID;                 /* Offset 0x0320 */
-  rtems_unsigned32 V1_STATID;              /* Offset 0x0324 */
-  rtems_unsigned32 V2_STATID;              /* Offset 0x0328 */
-  rtems_unsigned32 V3_STATID;              /* Offset 0x032C */
-  rtems_unsigned32 V4_STATID;              /* Offset 0x0330 */
-  rtems_unsigned32 V5_STATID;              /* Offset 0x0334 */
-  rtems_unsigned32 V6_STATID;              /* Offset 0x0338 */
-  rtems_unsigned32 V7_STATID;              /* Offset 0x033C */
-  rtems_unsigned32 Buf_Offset_0x0340[ 0x30 ]; /* Offset 0x0340 */
-  rtems_unsigned32 MAST_CTL;               /* Offset 0x0400 */ 
-  rtems_unsigned32 MISC_CTL;               /* Offset 0x0404 */ 
-  rtems_unsigned32 MISC_STAT;              /* Offset 0x0408 */ 
-  rtems_unsigned32 USER_AM;                /* Offset 0x040C */
-  rtems_unsigned32 Buf_Offset_0x0410[ 0x2bc ];/* Offset 0x0410 */
-  rtems_unsigned32 VSI0_CTL;               /* Offset 0x0F00 */
-  rtems_unsigned32 VSI0_BS;                /* Offset 0x0F04 */
-  rtems_unsigned32 VSI0_BD;                /* Offset 0x0F08 */
-  rtems_unsigned32 VSI0_TO;                /* Offset 0x0F0C */
-  rtems_unsigned32 Buf_Offset_0x0f10;         /* Offset 0x0F10 */
-  rtems_unsigned32 VSI1_CTL;               /* Offset 0x0F14 */
-  rtems_unsigned32 VSI1_BS;                /* Offset 0x0F18 */
-  rtems_unsigned32 VSI1_BD;                /* Offset 0x0F1C */
-  rtems_unsigned32 VSI1_TO;                /* Offset 0x0F20 */
-  rtems_unsigned32 Buf_Offset_0x0F24;         /* Offset 0x0F24 */
-  rtems_unsigned32 VSI2_CTL;               /* Offset 0x0F28 */
-  rtems_unsigned32 VSI2_BS;                /* Offset 0x0F2C */
-  rtems_unsigned32 VSI2_BD;                /* Offset 0x0F30 */
-  rtems_unsigned32 VSI2_TO;                /* Offset 0x0F34 */
-  rtems_unsigned32 Buf_Offset_0x0F38;         /* Offset 0x0F38 */
-  rtems_unsigned32 VSI3_CTL;               /* Offset 0x0F3C */
-  rtems_unsigned32 VSI3_BS;                /* Offset 0x0F40 */
-  rtems_unsigned32 VSI3_BD;                /* Offset 0x0F44 */
-  rtems_unsigned32 VSI3_TO;                /* Offset 0x0F48 */
-  rtems_unsigned32 Buf_Offset_0x0F4C[ 0x9 ];  /* Offset 0x0F4C */
-  rtems_unsigned32 VRAI_CTL;               /* Offset 0x0F70 */
-  rtems_unsigned32 VRAI_BS;                /* Offset 0x0F74 */
-  rtems_unsigned32 Buf_Offset_0x0F78[ 0x2 ];  /* Offset 0x0F78 */
-  rtems_unsigned32 VCSR_CTL;               /* Offset 0x0F80 */
-  rtems_unsigned32 VCSR_TO;                /* Offset 0x0F84 */
-  rtems_unsigned32 V_AMERR;                /* Offset 0x0F88 */
-  rtems_unsigned32 VAERR;                  /* Offset 0x0F8C */
-  rtems_unsigned32 Buf_Offset_0x0F90[ 0x19 ]; /* Offset 0x0F90 */
-  rtems_unsigned32 VCSR_CLR;               /* Offset 0x0FF4 */
-  rtems_unsigned32 VCSR_SET;               /* Offset 0x0FF8 */
-  rtems_unsigned32 VCSR_BS;                /* Offset 0x0FFC */
+  uint32_t         PCI_ID;                 /* Offset 0x0000 */
+  uint32_t         PCI_CSR;                /* Offset 0x0004 */
+  uint32_t         PCI_CLASS;              /* Offset 0x0008 */
+  uint32_t         PCI_MISC0;              /* Offset 0x000C */
+  uint32_t         PCI_BS;                 /* Offset 0x0010 */
+  uint32_t         Buf_Offset_0x0014[ 0x0A ]; /* Offset 0x0014 */
+  uint32_t         PCI_MISC1;              /* Offset 0x003C */
+  uint32_t         Buf_Offset_0x0040[ 0x30 ]; /* Offset 0x0040 */
+  uint32_t         LSI0_CTL;               /* Offset 0x0100 */
+  uint32_t         LSI0_BS;                /* Offset 0x0104 */
+  uint32_t         LSI0_BD;                /* Offset 0x0108 */
+  uint32_t         LSI0_TO;                /* Offset 0x010C */
+  uint32_t         Buf_Offset_0x0110;         /* Offset 0x0110 */
+  uint32_t         LSI1_CTL;               /* Offset 0x0114 */
+  uint32_t         LSI1_BS;                /* Offset 0x0118 */
+  uint32_t         LSI1_BD;                /* Offset 0x011C */
+  uint32_t         LSI1_TO;                /* Offset 0x0120 */
+  uint32_t         Buf_Offset_0x0124;         /* Offset 0x0124 */
+  uint32_t         LSI2_CTL;               /* Offset 0x0128 */
+  uint32_t         LSI2_BS;                /* Offset 0x012C */
+  uint32_t         LSI2_BD;                /* Offset 0x0130 */
+  uint32_t         LSI2_TO;                /* Offset 0x0134 */
+  uint32_t         Buf_Offset_0x0138;         /* Offset 0x0138 */
+  uint32_t         LSI3_CTL;               /* Offset 0x013C */
+  uint32_t         LSI3_BS;                /* Offset 0x0140 */
+  uint32_t         LSI3_BD;                /* Offset 0x0144 */
+  uint32_t         LSI3_TO;                /* Offset 0x0148 */
+  uint32_t         Buf_Offset_0x014C[ 0x09 ]; /* Offset 0x014C */
+  uint32_t         SCYC_CTL;               /* Offset 0x0170 */
+  uint32_t         SCYC_ADDR;              /* Offset 0x0174 */
+  uint32_t         SCYC_EN;                /* Offset 0x0178 */
+  uint32_t         SCYC_CMP;               /* Offset 0x017C */
+  uint32_t         SCYC_SWP;               /* Offset 0x0180 */
+  uint32_t         LMISC;                  /* Offset 0x0184 */
+  uint32_t         SLSI;                   /* Offset 0x0188 */
+  uint32_t         L_CMDERR;               /* Offset 0x018C */
+  uint32_t         LAERR;                  /* Offset 0x0190 */
+  uint32_t         Buf_Offset_0x0194[ 0x1B ]; /* Offset 0x0194 */
+  uint32_t         DCTL;                   /* Offset 0x0200 */
+  uint32_t         DTBC;                   /* Offset 0x0204 */
+  uint32_t         DLA;                    /* Offset 0x0208 */
+  uint32_t         Buf_Offset_0x020C;         /* Offset 0x020C */
+  uint32_t         DVA;                    /* Offset 0x0210 */
+  uint32_t         Buf_Offset_0x0214;         /* Offset 0x0214 */
+  uint32_t         DCPP;                   /* Offset 0x0218 */
+  uint32_t         Buf_Offset_0x021C;         /* Offset 0x021C */
+  uint32_t         DGCS;                   /* Offset 0x0220 */
+  uint32_t         D_LLUE;                 /* Offset 0x0224 */
+  uint32_t         Buf_Offset_0x0228[ 0x36 ]; /* Offset 0x0228 */
+  uint32_t         LINT_EN;                /* Offset 0x0300 */
+  uint32_t         LINT_STAT;              /* Offset 0x0304 */
+  uint32_t         LINT_MAP0;              /* Offset 0x0308 */
+  uint32_t         LINT_MAP1;              /* Offset 0x030C */
+  uint32_t         VINT_EN;                /* Offset 0x0310 */
+  uint32_t         VINT_STAT;              /* Offset 0x0314 */
+  uint32_t         VINT_MAP0;              /* Offset 0x0318 */
+  uint32_t         VINT_MAP1;              /* Offset 0x031C */
+  uint32_t         STATID;                 /* Offset 0x0320 */
+  uint32_t         V1_STATID;              /* Offset 0x0324 */
+  uint32_t         V2_STATID;              /* Offset 0x0328 */
+  uint32_t         V3_STATID;              /* Offset 0x032C */
+  uint32_t         V4_STATID;              /* Offset 0x0330 */
+  uint32_t         V5_STATID;              /* Offset 0x0334 */
+  uint32_t         V6_STATID;              /* Offset 0x0338 */
+  uint32_t         V7_STATID;              /* Offset 0x033C */
+  uint32_t         Buf_Offset_0x0340[ 0x30 ]; /* Offset 0x0340 */
+  uint32_t         MAST_CTL;               /* Offset 0x0400 */ 
+  uint32_t         MISC_CTL;               /* Offset 0x0404 */ 
+  uint32_t         MISC_STAT;              /* Offset 0x0408 */ 
+  uint32_t         USER_AM;                /* Offset 0x040C */
+  uint32_t         Buf_Offset_0x0410[ 0x2bc ];/* Offset 0x0410 */
+  uint32_t         VSI0_CTL;               /* Offset 0x0F00 */
+  uint32_t         VSI0_BS;                /* Offset 0x0F04 */
+  uint32_t         VSI0_BD;                /* Offset 0x0F08 */
+  uint32_t         VSI0_TO;                /* Offset 0x0F0C */
+  uint32_t         Buf_Offset_0x0f10;         /* Offset 0x0F10 */
+  uint32_t         VSI1_CTL;               /* Offset 0x0F14 */
+  uint32_t         VSI1_BS;                /* Offset 0x0F18 */
+  uint32_t         VSI1_BD;                /* Offset 0x0F1C */
+  uint32_t         VSI1_TO;                /* Offset 0x0F20 */
+  uint32_t         Buf_Offset_0x0F24;         /* Offset 0x0F24 */
+  uint32_t         VSI2_CTL;               /* Offset 0x0F28 */
+  uint32_t         VSI2_BS;                /* Offset 0x0F2C */
+  uint32_t         VSI2_BD;                /* Offset 0x0F30 */
+  uint32_t         VSI2_TO;                /* Offset 0x0F34 */
+  uint32_t         Buf_Offset_0x0F38;         /* Offset 0x0F38 */
+  uint32_t         VSI3_CTL;               /* Offset 0x0F3C */
+  uint32_t         VSI3_BS;                /* Offset 0x0F40 */
+  uint32_t         VSI3_BD;                /* Offset 0x0F44 */
+  uint32_t         VSI3_TO;                /* Offset 0x0F48 */
+  uint32_t         Buf_Offset_0x0F4C[ 0x9 ];  /* Offset 0x0F4C */
+  uint32_t         VRAI_CTL;               /* Offset 0x0F70 */
+  uint32_t         VRAI_BS;                /* Offset 0x0F74 */
+  uint32_t         Buf_Offset_0x0F78[ 0x2 ];  /* Offset 0x0F78 */
+  uint32_t         VCSR_CTL;               /* Offset 0x0F80 */
+  uint32_t         VCSR_TO;                /* Offset 0x0F84 */
+  uint32_t         V_AMERR;                /* Offset 0x0F88 */
+  uint32_t         VAERR;                  /* Offset 0x0F8C */
+  uint32_t         Buf_Offset_0x0F90[ 0x19 ]; /* Offset 0x0F90 */
+  uint32_t         VCSR_CLR;               /* Offset 0x0FF4 */
+  uint32_t         VCSR_SET;               /* Offset 0x0FF8 */
+  uint32_t         VCSR_BS;                /* Offset 0x0FFC */
 } Universe_Memory;
 
 volatile Universe_Memory *UNIVERSE;
@@ -144,18 +144,18 @@ volatile Universe_Memory *UNIVERSE;
  * PCI_bus_write
  */
 void PCI_bus_write(
-  volatile rtems_unsigned32 * _addr,                  /* IN */
-  rtems_unsigned32 _data                              /* IN */
+  volatile uint32_t         * _addr,                  /* IN */
+  uint32_t         _data                              /* IN */
 ) 
 {
   outport_32(_addr, _data);
 }
 
-rtems_unsigned32 PCI_bus_read(
-  volatile rtems_unsigned32 *  _addr                  /* IN */
+uint32_t         PCI_bus_read(
+  volatile uint32_t         *  _addr                  /* IN */
 )
 {
-  rtems_unsigned32 data;
+  uint32_t         data;
  
   inport_32(_addr, data);
   return data;
@@ -177,8 +177,8 @@ rtems_unsigned32 PCI_bus_read(
 
 void InitializeUniverse()
 {
-  rtems_unsigned32 pci_id;
-  rtems_unsigned32 universe_temp_value;
+  uint32_t         pci_id;
+  uint32_t         universe_temp_value;
  
   /*
    * Verify the UNIVERSE CHIP ID 
@@ -309,10 +309,10 @@ void InitializeUniverse()
  *       Slave Image 0 registers.
  */
 void set_vme_base_address (
-  rtems_unsigned32 base_address 
+  uint32_t         base_address 
 )
 {  
-  volatile rtems_unsigned32 temp;
+  volatile uint32_t         temp;
 
   /*
    * Calculate the current size of the Slave VME image 0
@@ -341,18 +341,18 @@ void set_vme_base_address (
 /*
  * Gets the VME base address
  */
-rtems_unsigned32 get_vme_base_address ()
+uint32_t         get_vme_base_address ()
 {  
-  volatile rtems_unsigned32 temp;
+  volatile uint32_t         temp;
 
   temp = PCI_bus_read( &UNIVERSE->VSI0_BS );
   temp &= 0xFFFFF000;
   return (temp);
 }
 
-rtems_unsigned32 get_vme_slave_size()
+uint32_t         get_vme_slave_size()
 {
-  volatile rtems_unsigned32 temp;
+  volatile uint32_t         temp;
   temp  =  PCI_bus_read( &UNIVERSE->VSI0_BD);
   temp &= 0xFFFFF000;
   temp  = temp - get_vme_base_address ();
@@ -363,9 +363,9 @@ rtems_unsigned32 get_vme_slave_size()
  * Set the size of the VME slave image
  * Note: The maximum size is up to 24 M bytes. (00000000 - 017FFFFF)
  */
-void set_vme_slave_size (rtems_unsigned32 size)
+void set_vme_slave_size (uint32_t         size)
 {  
-  volatile rtems_unsigned32 temp;
+  volatile uint32_t         temp;
 
   if (size<0) 
     size = 0;
@@ -391,13 +391,13 @@ void set_vme_slave_size (rtems_unsigned32 size)
  * Returns the 16 bit location specified by vme_ptr, which must be a
  * pointer to VME D16 space
  */
-rtems_unsigned16 get_vme(
-  rtems_unsigned16 *vme_ptr
+uint16_t         get_vme(
+  uint16_t         *vme_ptr
 )
 {
-  rtems_unsigned16 result;
+  uint16_t         result;
 
-  if (vme_ptr > (rtems_unsigned16 *)0x3EFFFFFF)
+  if (vme_ptr > (uint16_t*)0x3EFFFFFF)
   {
     /*
      * LSI0_TO register to 0x3EFFF000 if it had not been updated already
@@ -405,13 +405,13 @@ rtems_unsigned16 get_vme(
     if (( PCI_bus_read( &UNIVERSE->LSI0_TO ) & 0xFFFFF000) != 0x3EFFF000)
          PCI_bus_write( &UNIVERSE->LSI0_TO, 0x3EFFF000 );
 
-    result = (*(rtems_unsigned16 *)(
-               ((rtems_unsigned32)vme_ptr - 0x3EFFF000)+
+    result = (*(uint16_t*)(
+               ((uint32_t)vme_ptr - 0x3EFFF000)+
                 PPCN_60X_PCI_MEM_BASE) );
    }
    else
-     result = (*(rtems_unsigned16 *)
-                ((rtems_unsigned32)vme_ptr+PPCN_60X_PCI_MEM_BASE));
+     result = (*(uint16_t*)
+                ((uint32_t)vme_ptr+PPCN_60X_PCI_MEM_BASE));
 
    return result;
 }
@@ -421,23 +421,23 @@ rtems_unsigned16 get_vme(
  * be a pointer to VME D16 space
  */
 void put_vme(
-  rtems_unsigned16 *vme_ptr,
-  rtems_unsigned16 value
+  uint16_t         *vme_ptr,
+  uint16_t         value
 )
 { 
 
-  if (vme_ptr > (rtems_unsigned16 *)0x3EFFFFFF) {
+  if (vme_ptr > (uint16_t*)0x3EFFFFFF) {
     /* 
      * LSI0_TO register to 0x3EFFF000 if it had not been updated already
      */
      if (( PCI_bus_read( &UNIVERSE->LSI0_TO) & 0xFFFFF000) != 0x3EFFF000)
        PCI_bus_write( &UNIVERSE->LSI0_TO, 0x3EFFF000 );
    
-    *(rtems_unsigned16 *) (((rtems_unsigned32)vme_ptr - 0x3EFFF000) + 
+    *(uint16_t*) (((uint32_t)vme_ptr - 0x3EFFF000) + 
                             PPCN_60X_PCI_MEM_BASE) = value;
    }
    else
-      *(rtems_unsigned16 *)((rtems_unsigned32)vme_ptr + 
+      *(uint16_t*)((uint32_t)vme_ptr + 
                              PPCN_60X_PCI_MEM_BASE) = value;
 }
 #endif
author	Ralf Corsepius <ralf.corsepius@rtems.org>	2004-03-31 03:49:17 +0000
committer	Ralf Corsepius <ralf.corsepius@rtems.org>	2004-03-31 03:49:17 +0000
commit	bad8092cbf5305cd339b16fdcced0597e4f5b115 (patch)
tree	0183aa2c00d69fc8c28d3dad9e313dd17ac973fb /c/src/lib/libbsp/powerpc/ppcn_60x
parent	2004-03-31 Ralf Corsepius <ralf_corsepius@rtems.org> (diff)
download	rtems-bad8092cbf5305cd339b16fdcced0597e4f5b115.tar.bz2