Use fixed-width C99 types for PowerPC in_be16() and co.

Also use the const qualifier on the address pointer's target in in_*()

Closes #2128

5 files changed, 70 insertions, 65 deletions

diff --git a/c/src/lib/libbsp/powerpc/mvme5500/irq/BSP_irq.c b/c/src/lib/libbsp/powerpc/mvme5500/irq/BSP_irq.c
index 0f99deed77..ca5fa70cfc 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/irq/BSP_irq.c
+++ b/c/src/lib/libbsp/powerpc/mvme5500/irq/BSP_irq.c
@@ -27,6 +27,7 @@
  *
  */
 
+#include <inttypes.h>
 #include <stdio.h>
 #include <rtems/system.h>
 #include <bsp.h>
@@ -314,8 +315,8 @@ void BSP_enable_irq_at_pic(const rtems_irq_number irqNum)
 #endif
   BSP_irqMask_cache[regNum] |= (1 << bitNum);
 
-  out_le32(BSP_irqMask_reg[regNum], BSP_irqMask_cache[regNum]);
-  while (in_le32(BSP_irqMask_reg[regNum]) != BSP_irqMask_cache[regNum]);
+  out_le32((volatile uint32_t *)BSP_irqMask_reg[regNum], BSP_irqMask_cache[regNum]);
+  while (in_le32((volatile uint32_t *)BSP_irqMask_reg[regNum]) != BSP_irqMask_cache[regNum]);
 
   rtems_interrupt_enable(level);
 }
@@ -342,8 +343,8 @@ int BSP_disable_irq_at_pic(const rtems_irq_number irqNum)
 
   BSP_irqMask_cache[regNum] &=  ~(1 << bitNum);
 
-  out_le32(BSP_irqMask_reg[regNum], BSP_irqMask_cache[regNum]);
-  while (in_le32(BSP_irqMask_reg[regNum]) != BSP_irqMask_cache[regNum]);
+  out_le32((volatile uint32_t *)BSP_irqMask_reg[regNum], BSP_irqMask_cache[regNum]);
+  while (in_le32((volatile uint32_t *)BSP_irqMask_reg[regNum]) != BSP_irqMask_cache[regNum]);
 
   rtems_interrupt_enable(level);
 
@@ -372,39 +373,39 @@ int BSP_setup_the_pic(rtems_irq_global_settings* config)
    * bit 10:GPP interrupts as level sensitive(1) or edge sensitive(0).
    * MOTload default is set as level sensitive(1). Set it agin to make sure.
    */
-  out_le32((volatile unsigned int *)GT_CommUnitArb_Ctrl,
-           (in_le32((volatile unsigned int *)GT_CommUnitArb_Ctrl)| (1<<10)));
+  out_le32((volatile uint32_t *)GT_CommUnitArb_Ctrl,
+           (in_le32((volatile uint32_t *)GT_CommUnitArb_Ctrl)| (1<<10)));
 
 #if 0
-  printk("BSP_irqMask_reg[0] = 0x%x, BSP_irqCause_reg[0] 0x%x\n",
-         in_le32(BSP_irqMask_reg[0]),
-         in_le32(BSP_irqCause_reg[0]));
-  printk("BSP_irqMask_reg[1] = 0x%x, BSP_irqCause_reg[1] 0x%x\n",
-         in_le32(BSP_irqMask_reg[1]),
-         in_le32(BSP_irqCause_reg[1]));
-  printk("BSP_irqMask_reg[2] = 0x%x, BSP_irqCause_reg[2] 0x%x\n",
-         in_le32(BSP_irqMask_reg[2]),
-         in_le32(BSP_irqCause_reg[2]));
+  printk("BSP_irqMask_reg[0] = 0x%" PRIx32 ", BSP_irqCause_reg[0] 0x%" PRIx32 "\n",
+         in_le32((volatile uint32_t *)BSP_irqMask_reg[0]),
+         in_le32((volatile uint32_t *)BSP_irqCause_reg[0]));
+  printk("BSP_irqMask_reg[1] = 0x%" PRIx32 ", BSP_irqCause_reg[1] 0x%" PRIx32 "\n",
+         in_le32((volatile uint32_t *)BSP_irqMask_reg[1]),
+         in_le32((volatile uint32_t *)BSP_irqCause_reg[1]));
+  printk("BSP_irqMask_reg[2] = 0x%" PRIx32 ", BSP_irqCause_reg[2] 0x%" PRIx32 "\n",
+         in_le32((volatile uint32_t *)BSP_irqMask_reg[2]),
+         in_le32((volatile uint32_t *)BSP_irqCause_reg[2]));
 #endif
 
   /* Initialize the interrupt related  registers */
   for (i=0; i<3; i++) {
-    out_le32(BSP_irqCause_reg[i], 0);
-    out_le32(BSP_irqMask_reg[i], 0);
+    out_le32((volatile uint32_t *)BSP_irqCause_reg[i], 0);
+    out_le32((volatile uint32_t *)BSP_irqMask_reg[i], 0);
   }
-  in_le32(BSP_irqMask_reg[2]);
+  in_le32((volatile uint32_t *)BSP_irqMask_reg[2]);
   compute_pic_masks_from_prio();
 
 #if 0
-  printk("BSP_irqMask_reg[0] = 0x%x, BSP_irqCause_reg[0] 0x%x\n",
-         in_le32(BSP_irqMask_reg[0]),
-         in_le32(BSP_irqCause_reg[0]));
-  printk("BSP_irqMask_reg[1] = 0x%x, BSP_irqCause_reg[1] 0x%x\n",
-         in_le32(BSP_irqMask_reg[1]),
-         in_le32(BSP_irqCause_reg[1]));
-  printk("BSP_irqMask_reg[2] = 0x%x, BSP_irqCause_reg[2] 0x%x\n",
-         in_le32(BSP_irqMask_reg[2]),
-         in_le32(BSP_irqCause_reg[2]));
+  printk("BSP_irqMask_reg[0] = 0x%" PRIx32 ", BSP_irqCause_reg[0] 0x%" PRIx32 "\n",
+         in_le32((volatile uint32_t *)BSP_irqMask_reg[0]),
+         in_le32((volatile uint32_t *)BSP_irqCause_reg[0]));
+  printk("BSP_irqMask_reg[1] = 0x%" PRIx32 ", BSP_irqCause_reg[1] 0x%" PRIx32 "\n",
+         in_le32((volatile uint32_t *)BSP_irqMask_reg[1]),
+         in_le32((volatile uint32_t *)BSP_irqCause_reg[1]));
+  printk("BSP_irqMask_reg[2] = 0x%" PRIx32 ", BSP_irqCause_reg[2] 0x%" PRIx32 "\n",
+         in_le32((volatile uint32_t *)BSP_irqMask_reg[2]),
+         in_le32((volatile uint32_t *)BSP_irqCause_reg[2]));
 #endif
 
   /*
@@ -442,7 +443,7 @@ int C_dispatch_irq_handler (BSP_Exception_frame *frame, unsigned int excNum)
   }
 
   for (j=0; j<3; j++ ) oldMask[j] = BSP_irqMask_cache[j];
-  for (j=0; j<3; j++) irqCause[j] = in_le32(BSP_irqCause_reg[j]) & in_le32(BSP_irqMask_reg[j]);
+  for (j=0; j<3; j++) irqCause[j] = in_le32((volatile uint32_t *)BSP_irqCause_reg[j]) & in_le32((volatile uint32_t *)BSP_irqMask_reg[j]);
 
   while (((irq = picPrioTable[i++])!=-1)&& (loop++ < MAX_IRQ_LOOP))
   {
@@ -450,19 +451,19 @@ int C_dispatch_irq_handler (BSP_Exception_frame *frame, unsigned int excNum)
       for (j=0; j<3; j++)
         BSP_irqMask_cache[j] &= (~ BSP_irq_prio_mask_tbl[j][irq]);
 
-      out_le32(BSP_irqMask_reg[0], BSP_irqMask_cache[0]);
-      out_le32(BSP_irqMask_reg[1], BSP_irqMask_cache[1]);
-      out_le32(BSP_irqMask_reg[2], BSP_irqMask_cache[2]);
-      in_le32(BSP_irqMask_reg[2]);
+      out_le32((volatile uint32_t *)BSP_irqMask_reg[0], BSP_irqMask_cache[0]);
+      out_le32((volatile uint32_t *)BSP_irqMask_reg[1], BSP_irqMask_cache[1]);
+      out_le32((volatile uint32_t *)BSP_irqMask_reg[2], BSP_irqMask_cache[2]);
+      in_le32((volatile uint32_t *)BSP_irqMask_reg[2]);
 
       bsp_irq_dispatch_list( rtems_hdl_tbl, irq, default_rtems_hdl);
 
       for (j=0; j<3; j++ ) BSP_irqMask_cache[j] = oldMask[j];
 
-      out_le32(BSP_irqMask_reg[0], oldMask[0]);
-      out_le32(BSP_irqMask_reg[1], oldMask[1]);
-      out_le32(BSP_irqMask_reg[2], oldMask[2]);
-      in_le32(BSP_irqMask_reg[2]);
+      out_le32((volatile uint32_t *)BSP_irqMask_reg[0], oldMask[0]);
+      out_le32((volatile uint32_t *)BSP_irqMask_reg[1], oldMask[1]);
+      out_le32((volatile uint32_t *)BSP_irqMask_reg[2], oldMask[2]);
+      in_le32((volatile uint32_t *)BSP_irqMask_reg[2]);
     }
   }
 
diff --git a/c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/if_wm.c b/c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/if_wm.c
index b6a51848e8..25be33959c 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/if_wm.c
+++ b/c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/if_wm.c
@@ -39,6 +39,7 @@
 #include <rtems.h>
 #include <rtems/bspIo.h>      /* printk */
 
+#include <inttypes.h>
 #include <stdio.h>	      /* printf for statistics */
 #include <string.h>
 
@@ -217,8 +218,8 @@ struct wm_softc {
 #define	WM_F_BUS64		0x20	/* bus is 64-bit */
 #define	WM_F_PCIX		0x40	/* bus is PCI-X */
 
-#define	CSR_READ(sc,reg) in_le32((volatile unsigned *)(sc->sc_membase+reg))
-#define	CSR_WRITE(sc,reg,val) out_le32((volatile unsigned *)(sc->sc_membase+reg), val)
+#define	CSR_READ(sc,reg) in_le32((volatile uint32_t *)(sc->sc_membase+reg))
+#define	CSR_WRITE(sc,reg,val) out_le32((volatile uint32_t *)(sc->sc_membase+reg), val)
 
 #define	WM_CDTXADDR(sc)	( (uint32_t) &sc->sc_txdescs[0] )
 #define	WM_CDRXADDR(sc)	( (uint32_t) &sc->sc_rxdescs[0] )
@@ -540,18 +541,18 @@ static void i82544EI_stats(struct wm_softc *sc)
 
   printf("    Ghost Interrupts:%-8lu\n", sc->stats.ghostInterrupts);
   printf("       Rx Interrupts:%-8lu\n", sc->stats.rxInterrupts);
-  printf("     Receive Packets:%-8u\n", CSR_READ(sc,WMREG_GPRC));
+  printf("     Receive Packets:%-8u\n", (unsigned)CSR_READ(sc,WMREG_GPRC));
   printf("     Receive Overrun:%-8lu\n", sc->stats.rxOvrRunInterrupts);
-  printf("     Receive  errors:%-8u\n", CSR_READ(sc,WMREG_RXERRC));
+  printf("     Receive  errors:%-8u\n", (unsigned)CSR_READ(sc,WMREG_RXERRC));
   printf("   Rx sequence error:%-8lu\n", sc->stats.rxSeqErr);
   printf("      Rx /C/ ordered:%-8lu\n", sc->stats.rxC_ordered);
-  printf("    Rx Length Errors:%-8u\n", CSR_READ(sc,WMREG_RLEC));
+  printf("    Rx Length Errors:%-8u\n", (unsigned)CSR_READ(sc,WMREG_RLEC));
   printf("       Tx Interrupts:%-8lu\n", sc->stats.txInterrupts);
-  printf("   Transmitt Packets:%-8u\n", CSR_READ(sc,WMREG_GPTC));
+  printf("   Transmitt Packets:%-8u\n", (unsigned)CSR_READ(sc,WMREG_GPTC));
   printf("   Transmitt  errors:%-8lu\n", ifp->if_oerrors);
   printf("         Active Txqs:%-8lu\n", sc->txq_nactive);
-  printf("          collisions:%-8u\n", CSR_READ(sc,WMREG_COLC));
-  printf("          Crc Errors:%-8u\n", CSR_READ(sc,WMREG_CRCERRS));
+  printf("          collisions:%-8u\n", (unsigned)CSR_READ(sc,WMREG_COLC));
+  printf("          Crc Errors:%-8u\n", (unsigned)CSR_READ(sc,WMREG_CRCERRS));
   printf("  Link Status Change:%-8lu\n", sc->stats.linkStatusChng);
 }
 
@@ -1146,21 +1147,21 @@ static int i82544EI_init_hw(struct wm_softc *sc)
 
 void BSP_rdTIDV(void)
 {
-  printf("Reg TIDV: 0x%x\n", in_le32((volatile unsigned *) (BSP_1GHz_membase+WMREG_TIDV)));
+  printf("Reg TIDV: 0x%" PRIx32 "\n", in_le32((volatile uint32_t *) (BSP_1GHz_membase+WMREG_TIDV)));
 }
 void BSP_rdRDTR(void)
 {
-  printf("Reg RDTR: 0x%x\n", in_le32((volatile unsigned *) (BSP_1GHz_membase+WMREG_RDTR)));
+  printf("Reg RDTR: 0x%" PRIx32 "\n", in_le32((volatile uint32_t *) (BSP_1GHz_membase+WMREG_RDTR)));
 }
 
 void BSP_setTIDV(int val)
 {
-  out_le32((volatile unsigned *) (BSP_1GHz_membase+WMREG_TIDV), val);
+  out_le32((volatile uint32_t *) (BSP_1GHz_membase+WMREG_TIDV), val);
 }
 
 void BSP_setRDTR(int val)
 {
-  out_le32((volatile unsigned *) (BSP_1GHz_membase+WMREG_RDTR), val);
+  out_le32((volatile uint32_t *) (BSP_1GHz_membase+WMREG_RDTR), val);
 }
 /*
  * i82544EI_ifinit:		[ifnet interface function]
diff --git a/c/src/lib/libbsp/powerpc/mvme5500/pci/pci.c b/c/src/lib/libbsp/powerpc/mvme5500/pci/pci.c
index d3ffa1e455..8601721c03 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/pci/pci.c
+++ b/c/src/lib/libbsp/powerpc/mvme5500/pci/pci.c
@@ -102,7 +102,7 @@ unsigned char offset, uint8_t *val)
     BSP_pci[n].config_data,pciConfigPack(bus,dev,func,offset));
 #endif
 
-  out_be32((volatile unsigned int *) BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
+  out_be32((volatile uint32_t *) BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
   *val = in_8(BSP_pci[n].pci_config_data + (offset&3));
   return PCIBIOS_SUCCESSFUL;
 }
@@ -123,8 +123,8 @@ unsigned char func, unsigned char offset, uint16_t *val)
   printk("addr %x, data %x, pack %x \n", config_addr,
     config_data,pciConfigPack(bus,dev,func,offset));
 #endif
-  out_be32((volatile unsigned int *) BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
-  *val = in_le16((volatile unsigned short *) (BSP_pci[n].pci_config_data + (offset&2)));
+  out_be32((volatile uint32_t *) BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
+  *val = in_le16((volatile uint16_t *) (BSP_pci[n].pci_config_data + (offset&2)));
   return PCIBIOS_SUCCESSFUL;
 }
 
@@ -141,8 +141,8 @@ unsigned char func, unsigned char offset, uint32_t *val)
   *val = 0xffffffff;
   if ((offset&3)|| (offset & ~0xff)) return PCIBIOS_BAD_REGISTER_NUMBER;
 
-  out_be32((volatile unsigned int *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
-  *val = in_le32((volatile unsigned int *)BSP_pci[n].pci_config_data);
+  out_be32((volatile uint32_t *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
+  *val = in_le32((volatile uint32_t *)BSP_pci[n].pci_config_data);
   return PCIBIOS_SUCCESSFUL;
 }
 
@@ -157,8 +157,8 @@ static int indirect_pci_write_config_byte(unsigned char bus, unsigned char dev,u
 
   if (offset & ~0xff) return PCIBIOS_BAD_REGISTER_NUMBER;
 
-  out_be32((volatile unsigned int *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
-  out_8((volatile unsigned char *) (BSP_pci[n].pci_config_data + (offset&3)), val);
+  out_be32((volatile uint32_t *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
+  out_8((volatile uint8_t *) (BSP_pci[n].pci_config_data + (offset&3)), val);
   return PCIBIOS_SUCCESSFUL;
 }
 
@@ -173,8 +173,8 @@ static int indirect_pci_write_config_word(unsigned char bus, unsigned char dev,u
 
   if ((offset&1)|| (offset & ~0xff)) return PCIBIOS_BAD_REGISTER_NUMBER;
 
-  out_be32((volatile unsigned int *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
-  out_le16((volatile unsigned short *)(BSP_pci[n].pci_config_data + (offset&3)), val);
+  out_be32((volatile uint32_t *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
+  out_le16((volatile uint16_t *)(BSP_pci[n].pci_config_data + (offset&3)), val);
   return PCIBIOS_SUCCESSFUL;
 }
 
@@ -189,8 +189,8 @@ static int indirect_pci_write_config_dword(unsigned char bus,unsigned char dev,u
 
   if ((offset&3)|| (offset & ~0xff)) return PCIBIOS_BAD_REGISTER_NUMBER;
 
-  out_be32((volatile unsigned int *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
-  out_le32((volatile unsigned int *)BSP_pci[n].pci_config_data, val);
+  out_be32((volatile uint32_t *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
+  out_le32((volatile uint32_t *)BSP_pci[n].pci_config_data, val);
   return PCIBIOS_SUCCESSFUL;
 }
 
diff --git a/c/src/lib/libbsp/powerpc/mvme5500/pci/pci_interface.c b/c/src/lib/libbsp/powerpc/mvme5500/pci/pci_interface.c
index d22691b724..9f7be59151 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/pci/pci_interface.c
+++ b/c/src/lib/libbsp/powerpc/mvme5500/pci/pci_interface.c
@@ -23,6 +23,8 @@
 #include <bsp/gtreg.h>
 #include <bsp/gtpcireg.h>
 
+#include <inttypes.h>
+
 #define PCI_DEBUG     0
 
 #if 0
@@ -71,10 +73,10 @@ void pci_interface(void)
 
 #ifdef CPU2PCI_ORDER
     /* MOTLOad deafult : 0x07ff8600 */
-    out_le32((volatile unsigned int *)(GT64x60_REG_BASE+CNT_SYNC_REG), 0x07fff600);
+    out_le32((volatile uint32_t *)(GT64x60_REG_BASE+CNT_SYNC_REG), 0x07fff600);
 #endif
     /* asserts SERR upon various detection */
-    out_le32((volatile unsigned int *)(GT64x60_REG_BASE+0xc28), 0x3fffff);
+    out_le32((volatile uint32_t *)(GT64x60_REG_BASE+0xc28), 0x3fffff);
     pciAccessInit();
 }
 
@@ -83,15 +85,15 @@ void pciAccessInit(void)
   unsigned int PciLocal, data;
 
   for (PciLocal=0; PciLocal < 2; PciLocal++) {
-    data = in_le32((volatile unsigned int *)(GT64x60_REG_BASE+PCI0_ACCESS_CNTL_BASE0_LOW+(PciLocal * 0x80)));
+    data = in_le32((volatile uint32_t *)(GT64x60_REG_BASE+PCI0_ACCESS_CNTL_BASE0_LOW+(PciLocal * 0x80)));
 #if 0
     printk("PCI%d_ACCESS_CNTL_BASE0_LOW was 0x%x\n",PciLocal,data);
 #endif
     data |= PCI_ACCCTLBASEL_VALUE;
     data &= ~0x300000;
-    out_le32((volatile unsigned int *)(GT64x60_REG_BASE+PCI0_ACCESS_CNTL_BASE0_LOW+(PciLocal * 0x80)), data);
+    out_le32((volatile uint32_t *)(GT64x60_REG_BASE+PCI0_ACCESS_CNTL_BASE0_LOW+(PciLocal * 0x80)), data);
 #if 0
-      printf("PCI%d_ACCESS_CNTL_BASE0_LOW now 0x%x\n",PciLocal,in_le32((volatile unsigned int *)(GT64x60_REG_BASE+PCI0_ACCESS_CNTL_BASE0_LOW+(PciLocal * 0x80))));
+      printf("PCI%d_ACCESS_CNTL_BASE0_LOW now 0x%" PRIx32 "\n",PciLocal,in_le32((volatile uint32_t *)(GT64x60_REG_BASE+PCI0_ACCESS_CNTL_BASE0_LOW+(PciLocal * 0x80))));
 #endif
   }
 }
diff --git a/c/src/lib/libbsp/powerpc/mvme5500/startup/bspreset.c b/c/src/lib/libbsp/powerpc/mvme5500/startup/bspreset.c
index b25888e727..de15bc4972 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/startup/bspreset.c
+++ b/c/src/lib/libbsp/powerpc/mvme5500/startup/bspreset.c
@@ -8,6 +8,7 @@
 #include <rtems/bspIo.h>
 #include <libcpu/io.h>
 #include <libcpu/stackTrace.h>
+#include <stdint.h>
 
 void bsp_reset()
 {
@@ -17,5 +18,5 @@ void bsp_reset()
 
   printk("RTEMS terminated; Rebooting ...\n");
   /* Mvme5500 board reset : 2004 S. Kate Feng <feng1@bnl.gov>  */
-  out_8((volatile unsigned char*) (GT64x60_DEV1_BASE +2), 0x80);
+  out_8((volatile uint8_t*) (GT64x60_DEV1_BASE +2), 0x80);
 }