Whitespace removal.

6 files changed, 149 insertions, 149 deletions

diff --git a/c/src/lib/libbsp/powerpc/mvme5500/network/if_100MHz/GT64260eth.c b/c/src/lib/libbsp/powerpc/mvme5500/network/if_100MHz/GT64260eth.c
index 8288641bd7..4f3f5fa235 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/network/if_100MHz/GT64260eth.c
+++ b/c/src/lib/libbsp/powerpc/mvme5500/network/if_100MHz/GT64260eth.c
@@ -2,10 +2,10 @@
  *
  * Copyright (c) 2003,2004 Brookhaven National  Laboratory
  *               S. Kate Feng <feng1@bnl.gov>
- * All rights reserved 
+ * All rights reserved
  *
  * Acknowledgements:
- * netBSD : Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc. 
+ * netBSD : Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc.
  * Marvell : NDA document for the discovery system controller
  *
  * Some notes from the author, S. Kate Feng :
@@ -16,7 +16,7 @@
  * 2) Implemented hardware snoop instead of software snoop
  *    to ensure SDRAM cache coherency. (Copyright : NDA item)
  * 3) Added S/W support for multi mbuf.  (TODO : Let the H/W do it)
- *    
+ *
  */
 #define BYTE_ORDER BIG_ENDIAN
 
@@ -37,7 +37,7 @@
 
 #include <rtems/rtems_bsdnet.h>
 #include <rtems/rtems_bsdnet_internal.h>
-#include <rtems/error.h>           
+#include <rtems/error.h>
 #include <errno.h>
 
 #include <rtems/rtems/types.h>
@@ -65,12 +65,12 @@ extern unsigned char ReadConfVPD_buff(int offset); /* in startup/bspstart.c */
 
 #define GT_ETH_TASK_NAME  "Geth"
 #define PKT_BUF_SZ 1536
-#define SOFTC_ALIGN  31   
-#define HASH_ALIGN   15   
+#define SOFTC_ALIGN  31
+#define HASH_ALIGN   15
 
 #define TXQ_HiLmt_OFF 2
 
-/* <skf> 
+/* <skf>
  * 1. printk debug is for diagnosis only, which may cause
  * unexpected result, especially if txq is under heavy load
  * because CPU is fast with a decent cache.
@@ -81,7 +81,7 @@ extern unsigned char ReadConfVPD_buff(int offset); /* in startup/bspstart.c */
 #if 0
 #define GE_FORGOT
 #define GE_NORX
-#define GT_DEBUG 
+#define GT_DEBUG
 #endif
 
 /* RTEMS event to kill the daemon */
@@ -138,7 +138,7 @@ static void GT64260eth_irq_on(const rtems_irq_connect_data *irq)
   for (sc= root_GT64260eth_dev; sc; sc= sc-> next_module) {
     outl(0x30883444,ETH0_EIMR); /* MOTLoad default interrupt mask */
     return;
-  }  
+  }
 }
 
 static void GT64260eth_irq_off(const rtems_irq_connect_data *irq)
@@ -168,7 +168,7 @@ static void GT64260eth_isr(void)
        sc->intr_errsts[sc->intr_err_ptr2++]=cause;
        sc->intr_err_ptr2 %=INTR_ERR_SIZE;   /* Till Straumann */
        events |= ERR_EVENT;
-  }  
+  }
 
   /* ETH_IR_RxBuffer_3|ETH_IR_RxError_3 */
   if (cause & 0x880000) {
@@ -200,7 +200,7 @@ static rtems_irq_connect_data GT64260ethIrqData={
         NULL,
 	(rtems_irq_enable) GT64260eth_irq_on,
 	(rtems_irq_disable) GT64260eth_irq_off,
-	(rtems_irq_is_enabled) GT64260eth_irq_is_on, 
+	(rtems_irq_is_enabled) GT64260eth_irq_is_on,
 };
 
 static void GT64260eth_init_hw(struct GTeth_softc *sc)
@@ -217,7 +217,7 @@ static void GT64260eth_init_hw(struct GTeth_softc *sc)
 
   sc->rxq_intrbits=0;
   sc->sc_flags=0;
-  
+
 #ifndef GE_NORX
   GTeth_rx_setup(sc);
 #endif
@@ -248,7 +248,7 @@ static void GT64260eth_init_hw(struct GTeth_softc *sc)
    */
   if (!BSP_install_rtems_irq_handler(&GT64260ethIrqData))
      printk("GT64260eth: unable to install ISR");
-   
+
   /* The ethernet port is ready to transmit/receive */
   outl(sc->sc_pcr | ETH_EPCR_EN, ETH0_EPCR);
 
@@ -319,8 +319,8 @@ static void GT64260eth_ifinit(void *arg)
   }
 
 #ifndef GE_NOHASH
-  /* Mvme5500, the user must initialize the hash table before enabling the 
-   * Ethernet controller 
+  /* Mvme5500, the user must initialize the hash table before enabling the
+   * Ethernet controller
    */
   GTeth_hash_init(sc);
   GTeth_hash_fill(sc);
@@ -360,7 +360,7 @@ int rtems_GT64260eth_driver_attach(struct rtems_bsdnet_ifconfig *config, int att
 
   unit = rtems_bsdnet_parse_driver_name(config, &name);
   if (unit < 0) return 0;
- 
+
   printk("\nEthernet driver name %s unit %d \n",name, unit);
   printk("RTEMS-mvme5500 BSP Copyright (c) 2004, Brookhaven National Lab., Shuchen Kate Feng \n");
   /* Make certain elements e.g. descriptor lists are aligned. */
@@ -481,7 +481,7 @@ int rtems_GT64260eth_driver_attach(struct rtems_bsdnet_ifconfig *config, int att
   /*  ifp->if_watchdog = GTeth_ifwatchdog;*/
 
   if (ifp->if_snd.ifq_maxlen == 0)
-    ifp->if_snd.ifq_maxlen = ifqmaxlen; 
+    ifp->if_snd.ifq_maxlen = ifqmaxlen;
 
   /* create the synchronization semaphore */
   if (RTEMS_SUCCESSFUL != rtems_semaphore_create(
@@ -513,7 +513,7 @@ static void GT64260eth_stats(struct GTeth_softc *sc)
   printf("      Framing Errors:%-8lu\n", sc->stats.frame_errors);
   printf("          Crc Errors:%-8lu\n", sc->stats.crc_errors);
   printf("    Oversized Frames:%-8lu\n", sc->stats.length_errors);
-  printf("         Active Rxqs:%-8u\n",  sc->rxq_active); 
+  printf("         Active Rxqs:%-8u\n",  sc->rxq_active);
   printf("       Tx Interrupts:%-8lu\n", sc->stats.txInterrupts);
 #endif
   printf("Multi-BuffTx Packets:%-8lu\n", sc->stats.txMultiBuffPacket);
@@ -525,7 +525,7 @@ static void GT64260eth_stats(struct GTeth_softc *sc)
   printf("   Transmitt Packets:%-8lu\n", ifp->if_opackets);
   printf("   Transmitt  errors:%-8lu\n", ifp->if_oerrors);
   printf("    Tx/Rx collisions:%-8lu\n", ifp->if_collisions);
-  printf("         Active Txqs:%-8u\n", sc->txq_nactive); 
+  printf("         Active Txqs:%-8u\n", sc->txq_nactive);
 #endif
 }
 
@@ -595,7 +595,7 @@ static int GTeth_ifioctl(struct ifnet *ifp, ioctl_command_t cmd, caddr_t data)
 
 #ifdef GT_DEBUG
   printk("exit ioctl\n");
-#endif	
+#endif
   return error;
 }
 
@@ -610,7 +610,7 @@ static void GTeth_ifstart(struct ifnet *ifp)
   if ((ifp->if_flags & IFF_RUNNING) == 0) {
 #ifdef GT_DEBUG
      printk("IFF_RUNNING==0\n");
-#endif		
+#endif
      return;
   }
 
@@ -644,7 +644,7 @@ static void GTeth_init_rx_ring(struct GTeth_softc *sc)
 
   for (i = 0; i < RX_RING_SIZE; i++, rxd++, nxtaddr += sizeof(*rxd)) {
     struct mbuf *m;
- 
+
     rxd->ed_lencnt= sc->rx_buf_sz <<16;
     rxd->ed_cmdsts = RX_CMD_F|RX_CMD_L|RX_CMD_O|RX_CMD_EI;
 
@@ -653,7 +653,7 @@ static void GTeth_init_rx_ring(struct GTeth_softc *sc)
     m->m_pkthdr.rcvif =  &sc->arpcom.ac_if;
     sc->rxq_mbuf[i] = m;
 
-    /* convert mbuf pointer to data pointer of correct type */	
+    /* convert mbuf pointer to data pointer of correct type */
     rxd->ed_bufptr = (unsigned) mtod(m, void *);
 
     /*
@@ -706,23 +706,23 @@ static int GT64260eth_rx(struct GTeth_softc *sc)
     byteCount = rxd->ed_lencnt & 0xffff;
 
     if (cmdsts & RX_CMD_O) {
-      if (byteCount == 0) 
+      if (byteCount == 0)
          return(0);
 
      /* <Kate Feng> Setting command/status to be zero seems to eliminate
       * the spurious interrupt associated with the GE_FORGOT issue.
       */
-      rxd->ed_cmdsts=0; 
+      rxd->ed_cmdsts=0;
 
 #ifdef GE_FORGOT
-      /* 
+      /*
        * For dignosis purpose only. Not a good practice to turn it on
        */
       printk("Rxq %d %d %d\n", sc->rxq_fi, byteCount,nloops);
 #endif
     }
 
-    /* GT gave the ownership back to the CPU or the length has 
+    /* GT gave the ownership back to the CPU or the length has
      * been rewritten , which means there
      * is new packet in the descriptor/buffer
      */
@@ -762,8 +762,8 @@ static int GT64260eth_rx(struct GTeth_softc *sc)
      MCLGET (m, M_WAIT);
      m->m_pkthdr.rcvif = ifp;
      sc->rxq_mbuf[sc->rxq_fi]= m;
-     /* convert mbuf pointer to data pointer of correct type */	
-     rxd->ed_bufptr = (unsigned) mtod(m, void*); 
+     /* convert mbuf pointer to data pointer of correct type */
+     rxd->ed_bufptr = (unsigned) mtod(m, void*);
      rxd->ed_lencnt = (unsigned long) sc->rx_buf_sz <<16;
      rxd->ed_cmdsts = RX_CMD_F|RX_CMD_L|RX_CMD_O|RX_CMD_EI;
 
@@ -791,7 +791,7 @@ static void GTeth_rx_setup(struct GTeth_softc *sc)
      outl( sc->rxq_desc_busaddr,ETH0_ECRDP3);
 #ifdef GT_DEBUG
      printk("ETH0_EFRDP3 0x%x, ETH0_ECRDP3 0x%x \n", inl(ETH0_EFRDP3),
-	    inl(ETH0_ECRDP3)); 
+	    inl(ETH0_ECRDP3));
 #endif
   }
   sc->sc_intrmask |= sc->rxq_intrbits;
@@ -907,7 +907,7 @@ static int GT64260eth_sendpacket(struct GTeth_softc *sc,struct mbuf *m)
   unsigned intrmask = sc->sc_intrmask;
   unsigned loop=0, index= sc->txq_lo;
 
-  /* 
+  /*
    * The end-of-list descriptor we put on last time is the starting point
    * for this packet.  The GT is supposed to terminate list processing on
    * a NULL nxtptr but that currently is broken so a CPU-owned descriptor
@@ -920,14 +920,14 @@ static int GT64260eth_sendpacket(struct GTeth_softc *sc,struct mbuf *m)
     sc->stats.txSinglMaxLen= MAX(m->m_len, sc->stats.txSinglMaxLen);
   }
   else /* multiple mbufs in this packet */
-  { 
+  {
     struct mbuf *mtp, *mdest;
     volatile unsigned char *pt;
     int len, y;
 
 #ifdef GT_DEBUG
     printk("multi mbufs ");
-#endif    
+#endif
     MGETHDR(mdest, M_WAIT, MT_DATA);
     MCLGET(mdest, M_WAIT);
     pt = (volatile unsigned char *)mdest->m_data;
@@ -935,9 +935,9 @@ static int GT64260eth_sendpacket(struct GTeth_softc *sc,struct mbuf *m)
       loop++;
       if ( (y=(len+mtp->m_len)) > sizeof(union mcluster)) {
 	/* GT64260 allows us to chain the remaining to the next
-         * free descriptors. 
+         * free descriptors.
          */
-        printk("packet size %x > mcluster %x\n", y,sizeof(union mcluster)); 
+        printk("packet size %x > mcluster %x\n", y,sizeof(union mcluster));
 	printk("GT64260eth : packet too large ");
       }
       memcpy((void *)pt,(char *)mtp->m_data, mtp->m_len);
@@ -946,7 +946,7 @@ static int GT64260eth_sendpacket(struct GTeth_softc *sc,struct mbuf *m)
     printk("%d ",mtp->m_len);
 #endif
       len += mtp->m_len;
-      sc->stats.txBuffMaxLen=MAX(mtp->m_len,sc->stats.txBuffMaxLen); 
+      sc->stats.txBuffMaxLen=MAX(mtp->m_len,sc->stats.txBuffMaxLen);
     }
     sc->stats.txMultiMaxLoop=MAX(loop, sc->stats.txMultiMaxLoop);
 #if 0
@@ -961,14 +961,14 @@ static int GT64260eth_sendpacket(struct GTeth_softc *sc,struct mbuf *m)
   }
   if (m->m_len < ET_MINLEN) m->m_len = ET_MINLEN;
 
-  txd->ed_bufptr = (unsigned) mtod(m, void*); 
+  txd->ed_bufptr = (unsigned) mtod(m, void*);
   txd->ed_lencnt = m->m_len << 16;
   /*txd->ed_cmdsts = TX_CMD_L|TX_CMD_GC|TX_CMD_P|TX_CMD_O|TX_CMD_F|TX_CMD_EI;*/
   txd->ed_cmdsts = 0x80c70000;
   while (txd->ed_cmdsts != 0x80c70000);
   memBar();
 
-#ifdef GT_DEBUG 
+#ifdef GT_DEBUG
   printk("len = %d, cmdsts 0x%x ", m->m_len,txd->ed_cmdsts);
 #endif
 
@@ -1042,10 +1042,10 @@ static unsigned GTeth_txq_done(struct GTeth_softc *sc)
 	*/
        nextin = (sc->txq_fi + 1) % TX_RING_SIZE;
 
-       if (sc->txq_desc[nextin].ed_cmdsts & TX_CMD_O) return(0); 
+       if (sc->txq_desc[nextin].ed_cmdsts & TX_CMD_O) return(0);
        printk("Txq%d forgot\n",sc->txq_fi);
     } /* end checking GT64260eth owner */
-    GTeth_txq_free(sc, cmdsts);   
+    GTeth_txq_free(sc, cmdsts);
   }  /* end while */
   if (GTeth_debug>0) printk(")\n");
   return(1);
@@ -1097,7 +1097,7 @@ static void GTeth_tx_start(struct GTeth_softc *sc)
       printk("next desc. @ 0x%x\n",txd->ed_nxtptr);
 #endif
   }
- 
+
   sc->txq_intrbits = ETH_IR_TxEndHigh|ETH_IR_TxBufferHigh;
   sc->txq_esdcmrbits = ETH_ESDCMR_TXDH; /* Start Tx high */
   sc->txq_epsrbits = ETH_EPSR_TxHigh;
@@ -1175,7 +1175,7 @@ static int GTeth_hash_compute(struct GTeth_softc *sc,unsigned char eaddr[ETHER_A
 #ifdef GT_DEBUG
   printk("eaddr= %s add1:%x add0:%x\n", ether_sprintf1(eaddr), add1, add0);
 #endif
-    
+
   /*
    * hashResult is the 15 bits Hash entry address.
    * ethernetADD is a 48 bit number, which is derived from the Ethernet
@@ -1231,8 +1231,8 @@ static int GTeth_hash_compute(struct GTeth_softc *sc,unsigned char eaddr[ETHER_A
   printk(")");
 #endif
 
-  /* 1/2K address filtering (MOTLoad default )? ->16KB memory required 
-   * or 8k address filtering ? -> 256KB memory required 
+  /* 1/2K address filtering (MOTLoad default )? ->16KB memory required
+   * or 8k address filtering ? -> 256KB memory required
    */
   return result & ((sc->sc_pcr & ETH_EPCR_HS_512) ? 0x7ff : 0x7fff);
 }
@@ -1290,7 +1290,7 @@ static int GTeth_hash_entry_op(struct GTeth_softc *sc, enum GTeth_hash_op op,
   for (limit = HSH_LIMIT; limit > 0 ; --limit) {
       /*
        * Does the GT wrap at the end, stop at the, or overrun the
-       * end?  Assume it wraps for now.  Stash a copy of the 
+       * end?  Assume it wraps for now.  Stash a copy of the
        * current hash entry.
        */
       unsigned long long *he_p = &sc->sc_hashtable[hash];
@@ -1336,7 +1336,7 @@ static int GTeth_hash_entry_op(struct GTeth_softc *sc, enum GTeth_hash_op op,
        if (maybe_he_p == NULL && (thishe & HSH_S)) {
 	  maybe_he_p = he_p;
 	  maybe_hash = hash;
-       }		
+       }
        hash = (hash + 1) & (sc->sc_hashmask / sizeof(he));
   }
 
@@ -1425,7 +1425,7 @@ static void GTeth_hash_init(struct GTeth_softc *sc)
 
   if (GTeth_debug>0) printk("GTeth_hash_init(");
   /* MOTLoad defualt : 512 bytes of address filtering, which
-   * requires 16KB of memory 
+   * requires 16KB of memory
    */
 #if 1
   hash_mem = rtems_bsdnet_malloc(HASH_DRAM_SIZE + HASH_ALIGN, M_FREE, M_NOWAIT);
@@ -1453,7 +1453,7 @@ static void GT64260eth_error(struct GTeth_softc *sc)
    * by the ISR, we must disable interrupts here
    */
   if (intr_status) {
-    printk("%s%d: ICR = 0x%x ", 
+    printk("%s%d: ICR = 0x%x ",
 	   ifp->if_name, ifp->if_unit, intr_status);
 #if 1
     if (intr_status & INTR_RX_ERROR) {
@@ -1467,10 +1467,10 @@ static void GT64260eth_error(struct GTeth_softc *sc)
        printk("Txq error,  if_oerrors %d\n",ifp->if_oerrors);
     }
   }
-  else 
+  else
     printk("%s%d: Ghost interrupt ?\n",ifp->if_name,
 	   ifp->if_unit);
-  sc->intr_errsts[sc->intr_err_ptr1++]=0;  
+  sc->intr_errsts[sc->intr_err_ptr1++]=0;
   sc->intr_err_ptr1 %= INTR_ERR_SIZE;   /* Till Straumann */
 }
 #endif
@@ -1483,7 +1483,7 @@ static void GT64260eth_daemon(void *arg)
   struct mbuf	*m=0;
   struct ifnet	*ifp=&sc->arpcom.ac_if;
 
-#if 0	
+#if 0
   /* see comments in GT64260eth_init(); in newer versions of
    * rtems, we hold the network semaphore at this point
    */
@@ -1509,7 +1509,7 @@ static void GT64260eth_daemon(void *arg)
 				RTEMS_WAIT | RTEMS_EVENT_ANY,
 				RTEMS_NO_TIMEOUT,
 				&events);
- 
+
      if (KILL_EVENT & events) break;
 
 #ifndef GE_NORX
@@ -1521,7 +1521,7 @@ static void GT64260eth_daemon(void *arg)
 #endif
 
      /* clean up and try sending packets */
-     do { 
+     do {
 	 if (sc->txq_nactive) GTeth_txq_done(sc);
 
          while (sc->txq_free>0) {
@@ -1529,7 +1529,7 @@ static void GT64260eth_daemon(void *arg)
 	      m=0;
 	      IF_DEQUEUE(&ifp->if_snd,m);
               if (m==0) break;
-              GT64260eth_sendpacket(sc, m); 
+              GT64260eth_sendpacket(sc, m);
            }
            else {
               GTeth_txq_done(sc);
@@ -1548,7 +1548,7 @@ static void GT64260eth_daemon(void *arg)
 
        /* Log errors and other uncommon events. */
 #ifdef GT64260eth_DEBUG
-       if (events & ERR_EVENT) GT64260eth_error(sc); 
+       if (events & ERR_EVENT) GT64260eth_error(sc);
 #endif
   } /* end for(;;) { rtems_bsdnet_event_receive() .....*/
 
@@ -1568,7 +1568,7 @@ static void GT64260eth_daemon(void *arg)
   rtems_bsdnet_semaphore_release();
   rtems_semaphore_release(sc->daemonSync);
 
-  /* Note that I dont use sc->daemonTid here - 
+  /* Note that I dont use sc->daemonTid here -
    * theoretically, that variable could already
    * hold a newly created TID
    */
diff --git a/c/src/lib/libbsp/powerpc/mvme5500/network/if_100MHz/GT64260eth.h b/c/src/lib/libbsp/powerpc/mvme5500/network/if_100MHz/GT64260eth.h
index 52ea42c39e..2703bb423e 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/network/if_100MHz/GT64260eth.h
+++ b/c/src/lib/libbsp/powerpc/mvme5500/network/if_100MHz/GT64260eth.h
@@ -1,8 +1,8 @@
-/* GT64260eth.h 
+/* GT64260eth.h
  *
  * Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc.
  * All rights reserved.
- * 
+ *
  * RTEMS/Mvme5500 port 2004  by S. Kate Feng, <feng1@bnl.gov>,
  * All rights reserved.
  *
@@ -51,7 +51,7 @@
 #define HASH_TABLE_SIZE 16
 #define HASH_DRAM_SIZE  HASH_TABLE_SIZE*1024  /* size of DRAM for hash table */
 #define INTR_ERR_SIZE   16
-		
+
 enum GTeth_txprio {
 	GE_TXPRIO_HI=1,
 	GE_TXPRIO_LO=0,
@@ -83,7 +83,7 @@ struct GTeth_softc {
   unsigned int txq_nintr;       /* number of txq desc. send TX_EVENT */
   unsigned int txq_outptr;	/* where to put next transmit packet */
   unsigned int txq_inptr;       /* start of 1st queued tx packet */
-  unsigned int txq_free;	/* free Tx queue slots. */  
+  unsigned int txq_free;	/* free Tx queue slots. */
   unsigned txq_intrbits;	/* bits to write to EIMR */
   unsigned txq_esdcmrbits;	/* bits to write to ESDCMR */
   unsigned txq_epsrbits;	/* bits to test with EPSR */
@@ -114,7 +114,7 @@ struct GTeth_softc {
   unsigned sc_intrmask;		/* current EIMR value */
   unsigned sc_idlemask;		/* suspended EIMR bits */
   unsigned sc_max_frame_length;	/* maximum frame length */
-  unsigned rx_buf_sz; 
+  unsigned rx_buf_sz;
 
   /* Hash table related members */
   unsigned long long *sc_hashtable;
diff --git a/c/src/lib/libbsp/powerpc/mvme5500/network/if_100MHz/GT64260ethreg.h b/c/src/lib/libbsp/powerpc/mvme5500/network/if_100MHz/GT64260ethreg.h
index efa9ebf0e0..71a59af787 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/network/if_100MHz/GT64260ethreg.h
+++ b/c/src/lib/libbsp/powerpc/mvme5500/network/if_100MHz/GT64260ethreg.h
@@ -268,7 +268,7 @@ struct GTeth_desc {
 #define	ETH_ESMIR_ReadValid		ETH__BIT(27)
 #define	ETH_ESMIR_Busy			ETH__BIT(28)
 
-/* 
+/*
  * Table 597: Port Configuration Register (PCR)
  * 00:00 PM			Promiscuous mode
  *				0: Normal mode (Frames are only received if the
@@ -352,7 +352,7 @@ struct GTeth_desc {
 
 
 
-/* 
+/*
  * Table 598: Port Configuration Extend Register (PCXR)
  * 00:00 IGMP			IGMP Packets Capture Enable
  *				0: IGMP packets are treated as normal Multicast
@@ -449,7 +449,7 @@ struct GTeth_desc {
 
 
 
-/* 
+/*
  * Table 599: Port Command Register (PCMR)
  * 14:00 Reserved
  * 15:15 FJ			Force Jam / Flow Control
@@ -471,7 +471,7 @@ struct GTeth_desc {
 #define	ETH_EPCMR_FJ		ETH__BIT(15)
 
 
-/* 
+/*
  * Table 600: Port Status Register (PSR) -- Read Only
  * 00:00 Speed			Indicates Port Speed (0: 10Mbs, 1: 100Mbs)
  * 01:01 Duplex			Indicates Port Duplex Mode (0: Half, 1: Full)
@@ -506,7 +506,7 @@ struct GTeth_desc {
 #define	ETH_EPSR_TXinProg	ETH__BIT(7)
 
 
-/* 
+/*
  * Table 601: Serial Parameters Register (SPR)
  * 01:00 JAM_LENGTH		Two bits to determine the JAM Length
  *				(in Backpressure) as follows:
@@ -554,13 +554,13 @@ struct GTeth_desc {
 #define	ETH_ESPR_Data_Bilnd_GET(v)	ETH__EXT(v, 17, 5)
 #define	ETH_ESPR_Limit4(v)		ETH__BIT(22)
 
-/* 
+/*
  * Table 602: Hash Table Pointer Register (HTPR)
  * 31:00 HTP			32-bit pointer to the address table.
  *				Bits [2:0] must be set to zero.
  */
 
-/* 
+/*
  * Table 603: Flow Control Source Address Low (FCSAL)
  * 15:0 SA[15:0]		Source Address
  *				The least significant bits of the source
@@ -569,7 +569,7 @@ struct GTeth_desc {
  * 31:16 Reserved
  */
 
-/* 
+/*
  * Table 604: Flow Control Source Address High (FCSAH)
  * 31:0 SA[47:16]		Source Address
  *				The most significant bits of the source address
@@ -578,7 +578,7 @@ struct GTeth_desc {
  */
 
 
-/* 
+/*
  * Table 605: SDMA Configuration Register (SDCR)
  * 01:00 Reserved
  * 05:02 RC			Retransmit Count
@@ -636,7 +636,7 @@ struct GTeth_desc {
 #define	ETH_ESDCR_BSZ_Strings		{ "1 64-bit word", "2 64-bit words", \
 					  "4 64-bit words", "8 64-bit words" }
 
-/* 
+/*
  * Table 606: SDMA Command Register (SDCMR)
  * 06:00 Reserved
  * 07:07 ERD			Enable RX DMA.
@@ -697,7 +697,7 @@ struct GTeth_desc {
 #define	ETH_ESDCMR_TXDL			ETH__BIT(24)
 #define	ETH_ESDCMR_AT			ETH__BIT(31)
 
-/* 
+/*
  * Table 607: Interrupt Cause Register (ICR)
  * 00:00 RxBuffer		Rx Buffer Return
  *				Indicates an Rx buffer returned to CPU ownership
@@ -844,32 +844,32 @@ struct GTeth_desc {
 #define INTR_RX_ERROR            0x801100
 #define INTR_TX_ERROR            0x002c00
 
-/* 
+/*
  * Table 608: Interrupt Mask Register (IMR)
  * 31:00 Various		Mask bits for the Interrupt Cause register.
  */
 
-/* 
+/*
  * Table 609: IP Differentiated Services CodePoint to Priority0 low (DSCP2P0L),
  * 31:00 Priority0_low		The LSB priority bits for DSCP[31:0] entries.
  */
 
-/* 
+/*
  * Table 610: IP Differentiated Services CodePoint to Priority0 high (DSCP2P0H)
  * 31:00 Priority0_high		The LSB priority bits for DSCP[63:32] entries.
  */
 
-/* 
+/*
  * Table 611: IP Differentiated Services CodePoint to Priority1 low (DSCP2P1L)
  * 31:00 Priority1_low		The MSB priority bits for DSCP[31:0] entries.
  */
 
-/* 
+/*
  * Table 612: IP Differentiated Services CodePoint to Priority1 high (DSCP2P1H)
  * 31:00 Priority1_high		The MSB priority bit for DSCP[63:32] entries.
  */
 
-/* 
+/*
  * Table 613: VLAN Priority Tag to Priority (VPT2P)
  * 07:00 Priority0		The LSB priority bits for VLAN Priority[7:0]
  *				entries.
diff --git a/c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/if_wm.c b/c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/if_wm.c
index 761beb0a10..a4653809c4 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/if_wm.c
+++ b/c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/if_wm.c
@@ -6,10 +6,10 @@
  * Acknowledgements:
  * netBSD : Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc.
  *          Jason R. Thorpe for Wasabi Systems, Inc.
- * Intel : NDA document 
+ * Intel : NDA document
  *
  * Some notes from the author, S. Kate Feng :
- * 
+ *
  * 1) The error reporting routine i82544EI_error() employs two pointers
  *    for the error report buffer. One for the ISR and another one for
  *    the error report.
@@ -27,7 +27,7 @@
  *    to WB region", MII mode (PHY) instead of TBI mode.
  * 6) We currently only use 32-bit (instead of 64-bit) DMA addressing.
  * 7) Implementation for Jumbo Frame and TCP checksum is not completed yet.
- *    
+ *
  */
 
 #define BYTE_ORDER BIG_ENDIAN
@@ -52,7 +52,7 @@
 
 #include <rtems/rtems_bsdnet.h>
 #include <rtems/rtems_bsdnet_internal.h>
-#include <rtems/error.h>           
+#include <rtems/error.h>
 #include <errno.h>
 
 #include <rtems/rtems/types.h>
@@ -111,7 +111,7 @@ static int	wm_debug = WM_DEBUG_TX|WM_DEBUG_RX|WM_DEBUG_LINK; /* May 7, 2009 */
 #define TX_EVENT		RTEMS_EVENT_4
 #define ERR_EVENT		RTEMS_EVENT_5
 #define INIT_EVENT              RTEMS_EVENT_6
- 
+
 #define ALL_EVENTS (KILL_EVENT|START_TRANSMIT_EVENT|RX_EVENT|TX_EVENT|ERR_EVENT|INIT_EVENT)
 
 /* <skf> used 64 in 4.8.0, TOD; try 4096 */
@@ -244,7 +244,7 @@ static void i82544EI_irq_on(const rtems_irq_connect_data *irq)
 {
   struct wm_softc *sc;
   unsigned int irqMask=  ICR_TXDW | ICR_LSC | ICR_RXSEQ | ICR_RXDMT0 | ICR_RXO | ICR_RXT0 | ICR_RXCFG;
-  
+
   for (sc= root_i82544EI_dev; sc; sc= sc-> next_module) {
     CSR_WRITE(sc,WMREG_IMS,(CSR_READ(sc,WMREG_IMS)| irqMask) );
     return;
@@ -273,7 +273,7 @@ static rtems_irq_connect_data i82544IrqData={
         (rtems_irq_hdl_param) NULL,
 	(rtems_irq_enable) i82544EI_irq_on,
 	(rtems_irq_disable) i82544EI_irq_off,
-	(rtems_irq_is_enabled) i82544EI_irq_is_on, 
+	(rtems_irq_is_enabled) i82544EI_irq_is_on,
 };
 
 int rtems_i82544EI_driver_attach(struct rtems_bsdnet_ifconfig *config, int attach)
@@ -293,11 +293,11 @@ int rtems_i82544EI_driver_attach(struct rtems_bsdnet_ifconfig *config, int attac
 
   if ( !strncmp((const char *)name,"autoz",5))
      memcpy(name,"gtGHz",5);
-          
-  printk("\nAttaching MVME5500 1GHz NIC%d\n", unit); 
+
+  printk("\nAttaching MVME5500 1GHz NIC%d\n", unit);
   printk("RTEMS-mvme5500 BSP Copyright (c) 2004,2005,2008, Brookhaven National Lab., Shuchen Kate Feng \n");
 
-  /* Make sure certain elements e.g. descriptor lists are aligned.*/ 
+  /* Make sure certain elements e.g. descriptor lists are aligned.*/
   softc_mem = rtems_bsdnet_malloc(sizeof(*sc) + SOFTC_ALIGN, M_FREE, M_NOWAIT);
 
   /* Check for the very unlikely case of no memory. */
@@ -321,22 +321,22 @@ int rtems_i82544EI_driver_attach(struct rtems_bsdnet_ifconfig *config, int attac
   if ( pci_mem_find(b,d,f,PCI_MAPREG_START, &sc->sc_membase, &sc->sc_memsize))
      rtems_panic("i82544EI: unable to map memory space\n");
 
-#ifdef WM_DEBUG 
+#ifdef WM_DEBUG
   printk("Memory base addr 0x%x\n", sc->sc_membase);
 #endif
   BSP_1GHz_membase= sc->sc_membase;
 
 #ifdef WM_DEBUG
   printk("Memory base addr 0x%x\n", sc->sc_membase);
-  printk("txdesc[0] addr:0x%x, rxdesc[0] addr:0x%x, sizeof sc %d\n",&sc->sc_txdescs[0], &sc->sc_rxdescs[0], sizeof(*sc));      
+  printk("txdesc[0] addr:0x%x, rxdesc[0] addr:0x%x, sizeof sc %d\n",&sc->sc_txdescs[0], &sc->sc_rxdescs[0], sizeof(*sc));
 #endif
 
 
-  sc->sc_ctrl=CSR_READ(sc,WMREG_CTRL);  
+  sc->sc_ctrl=CSR_READ(sc,WMREG_CTRL);
   /*
    * Determine a few things about the bus we're connected to.
    */
-  reg = CSR_READ(sc,WMREG_STATUS); 
+  reg = CSR_READ(sc,WMREG_STATUS);
   if (reg & STATUS_BUS64) sc->sc_flags |= WM_F_BUS64;
   sc->sc_bus_speed = (reg & STATUS_PCI66) ? 66 : 33;
 #ifdef WM_DEBUG
@@ -360,7 +360,7 @@ int rtems_i82544EI_driver_attach(struct rtems_bsdnet_ifconfig *config, int attac
    * Read the Ethernet address from the EEPROM.
    */
   if (wm_read_eeprom(sc, EEPROM_OFF_MACADDR,
-	    sizeof(myea) / sizeof(myea[0]), myea)) 
+	    sizeof(myea) / sizeof(myea[0]), myea))
      rtems_panic("i82544ei 1GHZ ethernet: unable to read Ethernet address");
 
   enaddr[0] = myea[0] & 0xff;
@@ -409,11 +409,11 @@ int rtems_i82544EI_driver_attach(struct rtems_bsdnet_ifconfig *config, int attac
    * media structures accordingly.
    */
   if ((CSR_READ(sc, WMREG_STATUS) & STATUS_TBIMODE) != 0) {
-    /* 1000BASE-X : fiber  (TBI mode) 
+    /* 1000BASE-X : fiber  (TBI mode)
        wm_tbi_mediainit(sc); */
   } else {   /* 1000BASE-T : copper (internal PHY mode), for the mvme5500 */
 	   wm_gmii_mediainit(sc);
-  }  
+  }
 
   ifp = &sc->arpcom.ac_if;
   /* set this interface's name and unit */
@@ -421,13 +421,13 @@ int rtems_i82544EI_driver_attach(struct rtems_bsdnet_ifconfig *config, int attac
   ifp->if_name = name;
   ifp->if_softc = sc;
   ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
-#ifdef RTEMS_ETHERMTU_JUMBO 
+#ifdef RTEMS_ETHERMTU_JUMBO
   sc->arpcom.ec_capabilities |= ETHERCAP_JUMBO_MTU;
   ifp->if_mtu = config->mtu ? config->mtu : ETHERMTU_JUMBO;
 #else
   ifp->if_mtu = config->mtu ? config->mtu : ETHERMTU;
 #endif
-#ifdef RTEMS_CKSUM_OFFLOAD 
+#ifdef RTEMS_CKSUM_OFFLOAD
   /* < skf> The following is really not related to jumbo frame
   sc->arpcom.ec_capabilities |= ETHERCAP_VLAN_MTU;*/
   ifp->if_capabilities |= IFCAP_CSUM_IPv4_Tx | IFCAP_CSUM_IPv4_Rx |
@@ -481,7 +481,7 @@ static void wm_reset(struct wm_softc *sc)
   * 82544 has a Packet Buffer of 64K.
   * Default allocation : PBA=40K for Rx, leaving 24K for Tx.
   * Default for jumbo: PBA=48K for Rx, leaving 16K for Tx.
-  */  
+  */
   sc->sc_pba = sc->arpcom.ac_if.if_mtu > 8192 ? PBA_40K : PBA_48K;
   CSR_WRITE(sc, WMREG_PBA, sc->sc_pba);
 
@@ -499,7 +499,7 @@ static void wm_reset(struct wm_softc *sc)
 
   sc->sc_ctrl_ext = CSR_READ(sc,WMREG_CTRL_EXT);
   sc->sc_ctrl_ext |= CTRL_EXT_EE_RST;
-  CSR_WRITE(sc, WMREG_CTRL_EXT, sc->sc_ctrl_ext);  
+  CSR_WRITE(sc, WMREG_CTRL_EXT, sc->sc_ctrl_ext);
   CSR_READ(sc, WMREG_STATUS);
   /* Wait for EEPROM reload */
   rtems_bsp_delay(2000);
@@ -523,7 +523,7 @@ i82544EI_ifstart(struct ifnet *ifp)
   if ((ifp->if_flags & IFF_RUNNING) == 0) {
 #ifdef WM_DEBUG
      printk("IFF_RUNNING==0\n");
-#endif		
+#endif
      return;
   }
 
@@ -549,7 +549,7 @@ static void i82544EI_stats(struct wm_softc *sc)
   printf("       Tx Interrupts:%-8lu\n", sc->stats.txInterrupts);
   printf("   Transmitt Packets:%-8u\n", CSR_READ(sc,WMREG_GPTC));
   printf("   Transmitt  errors:%-8lu\n", ifp->if_oerrors);
-  printf("         Active Txqs:%-8lu\n", sc->txq_nactive); 
+  printf("         Active Txqs:%-8lu\n", sc->txq_nactive);
   printf("          collisions:%-8u\n", CSR_READ(sc,WMREG_COLC));
   printf("          Crc Errors:%-8u\n", CSR_READ(sc,WMREG_CRCERRS));
   printf("  Link Status Change:%-8lu\n", sc->stats.linkStatusChng);
@@ -654,16 +654,16 @@ static void i82544EI_sendpacket(struct wm_softc *sc, struct mbuf *m)
     sc->txq_free--;
   }
   else /* multiple mbufs in this packet */
-  { 
+  {
     struct mbuf *mtp, *mdest;
     volatile unsigned char *pt;
     int len, y, loop=0;
 
 #ifdef WM_DEBUG_TX
     printk("multi mbufs ");
-#endif 
+#endif
     mtp = m;
-    while ( mtp) { 
+    while ( mtp) {
       MGETHDR(mdest, M_WAIT, MT_DATA);
       MCLGET(mdest, M_WAIT);
       pt = (volatile unsigned char *)mdest->m_data;
@@ -673,12 +673,12 @@ static void i82544EI_sendpacket(struct wm_softc *sc, struct mbuf *m)
          * the length of each descriptor can be up to 16288 bytes.
          * For packets which fill more than one buffer ( >2k), we
          * chain them together.
-         * <Kate Feng> : This effective for packets > 2K 
+         * <Kate Feng> : This effective for packets > 2K
          * The other way is effective for packets < 2K
          */
         if ( ((y=(len+mtp->m_len)) > sizeof(union mcluster))) {
           printk(" >%d, use next descriptor\n", sizeof(union mcluster));
-	  break; 
+	  break;
         }
         memcpy((void *)pt,(char *)mtp->m_data, mtp->m_len);
         pt += mtp->m_len;
@@ -692,16 +692,16 @@ static void i82544EI_sendpacket(struct wm_softc *sc, struct mbuf *m)
       sc->txs_lastdesc = sc->txq_next;
       sc->txq_next = WM_NEXTTX(sc->txq_next);
       sc->txq_nactive ++;
-      if (sc->txq_free) 
+      if (sc->txq_free)
          sc->txq_free--;
       else
          rtems_panic("i8254EI : no more free descriptors");
     } /* end for while */
     /* free old mbuf chain */
-    m_freem(m); 
+    m_freem(m);
     m=0;
   }  /* end  multiple mbufs */
-   
+
   DPRINTF(WM_DEBUG_TX,("%s: TX: desc %d: cmdlen 0x%08x\n", sc->dv_xname,
 	 sc->txs_lastdesc, le32toh(sc->sc_txdescs[sc->txs_lastdesc].wtx_cmdlen)));
   DPRINTF(WM_DEBUG_TX,("status 0x%08x\n",sc->sc_txdescs[sc->txq_fi].wtx_fields.wtxu_status));
@@ -724,9 +724,9 @@ static void i82544EI_txq_free(struct wm_softc *sc, uint8_t status)
 {
   struct ifnet *ifp = &sc->arpcom.ac_if;
 
-  /* We might use the statistics registers instead of variables 
+  /* We might use the statistics registers instead of variables
    * to keep tack of the network statistics
-   */ 
+   */
 
   /* statistics */
   ifp->if_opackets++;
@@ -734,7 +734,7 @@ static void i82544EI_txq_free(struct wm_softc *sc, uint8_t status)
   if (status & (WTX_ST_EC|WTX_ST_LC)) {
        ifp->if_oerrors++;
 
-     if (status & WTX_ST_LC)  
+     if (status & WTX_ST_LC)
         printf("%s: late collision\n", sc->dv_xname);
      else if (status & WTX_ST_EC) {
         ifp->if_collisions += 16;
@@ -768,23 +768,23 @@ static void i82544EI_txq_done(struct wm_softc *sc)
   }
 }
 
-static void wm_init_rxdesc(struct wm_softc *sc, int x)	
-{			
-  wiseman_rxdesc_t *__rxd = &(sc)->sc_rxdescs[(x)];		
+static void wm_init_rxdesc(struct wm_softc *sc, int x)
+{
+  wiseman_rxdesc_t *__rxd = &(sc)->sc_rxdescs[(x)];
   struct mbuf *m;
 
   m = sc->rxs_mbuf[x];
-		
-  __rxd->wrx_addr.wa_low=htole32(mtod(m, void*));  
-  __rxd->wrx_addr.wa_high = 0;				        
-  __rxd->wrx_len = 0;                                             
-  __rxd->wrx_cksum = 0;                                           
-  __rxd->wrx_status = 0;	 					
-  __rxd->wrx_errors = 0;                                          
-  __rxd->wrx_special = 0;                                         
-  /* Receive Descriptor Tail: add Rx desc. to H/W free list */    
-  CSR_WRITE(sc,WMREG_RDT, (x)); 			        	
-} 
+
+  __rxd->wrx_addr.wa_low=htole32(mtod(m, void*));
+  __rxd->wrx_addr.wa_high = 0;
+  __rxd->wrx_len = 0;
+  __rxd->wrx_cksum = 0;
+  __rxd->wrx_status = 0;
+  __rxd->wrx_errors = 0;
+  __rxd->wrx_special = 0;
+  /* Receive Descriptor Tail: add Rx desc. to H/W free list */
+  CSR_WRITE(sc,WMREG_RDT, (x));
+}
 
 static void i82544EI_rx(struct wm_softc *sc)
 {
@@ -851,7 +851,7 @@ static void i82544EI_rx(struct wm_softc *sc)
     ether_input (ifp, eh, m);
     /* Pass it on. */
     ifp->if_ipackets++;
-    
+
     give_it_back:
     /* Add a new receive buffer to the ring.*/
     if (wm_add_rxbuf(sc, i) != 0) {
@@ -937,7 +937,7 @@ static int i82544EI_init_hw(struct wm_softc *sc)
   CSR_WRITE(sc,WMREG_TDLEN, sizeof(sc->sc_txdescs));
   CSR_WRITE(sc,WMREG_TDH, 0);
   CSR_WRITE(sc,WMREG_TDT, 0);
-  CSR_WRITE(sc,WMREG_TIDV, 0 ); 
+  CSR_WRITE(sc,WMREG_TIDV, 0 );
   /* CSR_WRITE(sc,WMREG_TADV, 128);  not for 82544 */
 
   CSR_WRITE(sc,WMREG_TXDCTL, TXDCTL_PTHRESH(0) |
@@ -968,7 +968,7 @@ static int i82544EI_init_hw(struct wm_softc *sc)
   }
 #endif
 
-  TxDescCmd |= WTX_CMD_EOP|WTX_CMD_IFCS|WTX_CMD_RS; 
+  TxDescCmd |= WTX_CMD_EOP|WTX_CMD_IFCS|WTX_CMD_RS;
 
   /* Initialize the transmit job descriptors. */
   for (i = 0; i < NTXDESC; i++) {
@@ -976,7 +976,7 @@ static int i82544EI_init_hw(struct wm_softc *sc)
       sc->sc_txdescs[i].wtx_fields.wtxu_options=cksumfields;
       sc->sc_txdescs[i].wtx_addr.wa_high = 0;
       sc->sc_txdescs[i].wtx_addr.wa_low = 0;
-      sc->sc_txdescs[i].wtx_cmdlen = htole32(TxDescCmd); 
+      sc->sc_txdescs[i].wtx_cmdlen = htole32(TxDescCmd);
   }
 
   /*
@@ -989,7 +989,7 @@ static int i82544EI_init_hw(struct wm_softc *sc)
   CSR_WRITE(sc,WMREG_RDLEN, sizeof(sc->sc_rxdescs));
   CSR_WRITE(sc,WMREG_RDH, 0);
   CSR_WRITE(sc,WMREG_RDT, 0);
-  CSR_WRITE(sc,WMREG_RDTR, 0 |RDTR_FPD); 
+  CSR_WRITE(sc,WMREG_RDTR, 0 |RDTR_FPD);
   /* CSR_WRITE(sc, WMREG_RADV, 256);  not for 82544.  */
 
   for (i = 0; i < NRXDESC; i++) {
@@ -1049,7 +1049,7 @@ static int i82544EI_init_hw(struct wm_softc *sc)
   CSR_WRITE(sc,WMREG_CTRL_EXT, sc->sc_ctrl_ext);
 #endif
 
-  /* MOTLoad : WMREG_RXCSUM (0x5000)= 0, no Rx checksum offloading */ 
+  /* MOTLoad : WMREG_RXCSUM (0x5000)= 0, no Rx checksum offloading */
 #ifdef RTEMS_CKSUM_OFFLOAD
   /*
    * Set up checksum offload parameters.
@@ -1094,7 +1094,7 @@ static int i82544EI_init_hw(struct wm_softc *sc)
    */
   sc->sc_tctl = TCTL_EN | TCTL_PSP | TCTL_CT(TX_COLLISION_THRESHOLD) |
 	    TCTL_COLD(TX_COLLISION_DISTANCE_FDX) |
-            TCTL_RTLC /* retransmit on late collision */; 
+            TCTL_RTLC /* retransmit on late collision */;
 
   /*
    * Set up the receive control register; we actually program
@@ -1185,7 +1185,7 @@ static void i82544EI_ifinit(void *arg)
   sc->daemonTid = rtems_bsdnet_newproc(i82544EI_TASK_NAME,4096,i82544EI_daemon,arg);
 
   /* ...all done! */
-  sc->arpcom.ac_if.if_flags |= IFF_RUNNING; 
+  sc->arpcom.ac_if.if_flags |= IFF_RUNNING;
 
 #ifdef WM_DEBUG
   printk(")");
@@ -1271,7 +1271,7 @@ static void wm_stop(struct ifnet *ifp, int disable)
 
 #ifdef WM_DEBUG
   printk("wm_stop(");
-#endif  
+#endif
   /* Stop the transmit and receive processes. */
   CSR_WRITE(sc,WMREG_TCTL, 0);
   CSR_WRITE(sc,WMREG_RCTL, 0);
@@ -1283,7 +1283,7 @@ static void wm_stop(struct ifnet *ifp, int disable)
   ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
 #ifdef WM_DEBUG
   printk(")\n");
-#endif  
+#endif
 }
 
 /*
@@ -1341,7 +1341,7 @@ static void wm_eeprom_recvbits(struct wm_softc *sc, uint32_t *valp, int nbits)
  *
  * Read a word from the EEPROM using the MicroWire protocol.
  *
- * (The 82544EI Gigabit Ethernet Controller is compatible with 
+ * (The 82544EI Gigabit Ethernet Controller is compatible with
  * most MicroWire interface, serial EEPROM devices.)
  */
 static int wm_read_eeprom_uwire(struct wm_softc *sc, int word, int wordcnt, uint16_t *data)
@@ -1510,7 +1510,7 @@ static void wm_set_filter(struct wm_softc *sc)
 
 #ifdef WM_DEBUG
   printk("wm_set_filter(");
-#endif  
+#endif
   mta_reg = WMREG_CORDOVA_MTA;
   sc->sc_rctl &= ~(RCTL_BAM | RCTL_UPE | RCTL_MPE);
 
@@ -1578,7 +1578,7 @@ static void wm_set_filter(struct wm_softc *sc)
 
 #ifdef WM_DEBUG
   printk("RCTL 0x%x)\n", CSR_READ(sc,WMREG_RCTL));
-#endif  
+#endif
 }
 
 static void i82544EI_error(struct wm_softc *sc)
@@ -1596,9 +1596,9 @@ static void i82544EI_error(struct wm_softc *sc)
 	      intr_status, ifp->if_ierrors);
     }
   }
-  else 
+  else
     printk("%s%d: Ghost interrupt ?\n",ifp->if_name,ifp->if_unit);
-  sc->if_errsts[sc->if_err_ptr1]=0;  
+  sc->if_errsts[sc->if_err_ptr1]=0;
   if ((++sc->if_err_ptr1)==IF_ERR_BUFSZE) sc->if_err_ptr1=0; /* Till Straumann */
 }
 
@@ -1643,7 +1643,7 @@ static void i82544EI_daemon(void *arg)
      if (events & RX_EVENT)  i82544EI_rx(sc); /* in ISR instead */
 
      /* clean up and try sending packets */
-     do { 
+     do {
 	i82544EI_txq_done(sc);
 
         while (sc->txq_free>0) {
@@ -1651,7 +1651,7 @@ static void i82544EI_daemon(void *arg)
 	      m=0;
 	      IF_DEQUEUE(&ifp->if_snd,m);
               if (m==0) break;
-              i82544EI_sendpacket(sc, m); 
+              i82544EI_sendpacket(sc, m);
            }
            else {
 	      i82544EI_txq_done(sc);
@@ -1669,7 +1669,7 @@ static void i82544EI_daemon(void *arg)
      ifp->if_flags &= ~IFF_OACTIVE;
 
      /* Log errors and other uncommon events. */
-     if (events & ERR_EVENT) i82544EI_error(sc); 
+     if (events & ERR_EVENT) i82544EI_error(sc);
      /* Rx overrun */
      if ( events & INIT_EVENT) {
         printk("Warnning, Rx overrun.  Make sure the old mbuf was free\n");
@@ -1695,7 +1695,7 @@ static void i82544EI_daemon(void *arg)
   rtems_bsdnet_semaphore_release();
   rtems_semaphore_release(sc->daemonSync);
 
-  /* Note that I dont use sc->daemonTid here - 
+  /* Note that I dont use sc->daemonTid here -
    * theoretically, that variable could already
    * hold a newly created TID
    */
@@ -1732,7 +1732,7 @@ static void wm_gmii_mediainit(struct wm_softc *sc)
 
 #if 1
   /* <skf> May 2009 : The value that should be programmed into IPGT is 10 */
-  sc->sc_tipg = TIPG_IPGT(10)+TIPG_IPGR1(8)+TIPG_IPGR2(6); 
+  sc->sc_tipg = TIPG_IPGT(10)+TIPG_IPGR1(8)+TIPG_IPGR2(6);
 #else
   sc->sc_tipg = TIPG_1000T_DFLT; /* 0x602008 */
 #endif
diff --git a/c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/if_wmreg.h b/c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/if_wmreg.h
index f1615e8cb7..3e21c62581 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/if_wmreg.h
+++ b/c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/if_wmreg.h
@@ -732,7 +732,7 @@ struct livengood_tcpip_ctxdesc {
 #define ICH_GFPREG_BASE_MASK       0x1FFF
 #define ICH_FLASH_LINEAR_ADDR_MASK 0x00FFFFFF
 
-/* start of Kate Feng added */ 
+/* start of Kate Feng added */
 #define WMREG_GPTC      0x4080  /* Good packets transmitted count */
 #define WMREG_GPRC      0x4074  /* Good packets received count */
 #define WMREG_CRCERRS   0x4000  /* CRC Error Count */
diff --git a/c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/pci_map.c b/c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/pci_map.c
index 7594fe9841..26b143ea1a 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/pci_map.c
+++ b/c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/pci_map.c
@@ -8,7 +8,7 @@
  * All rights reserved.
  *
  * This code is derived from software contributed to The NetBSD Foundation
- * by Charles M. Hannum; by William R. Studenmund; by Jason R. Thorpe. 
+ * by Charles M. Hannum; by William R. Studenmund; by Jason R. Thorpe.
  *
  */
 
@@ -114,7 +114,7 @@ int pci_get_capability(int b, int d, int f, int capid,int *offset,uint32_t *valu
   uint32_t reg, ofs;
 
   /*  i82544EI PCI_CAPLISTPTR_REG */
-  pci_read_config_dword(b,d,f,PCI_CAPLISTPTR_REG, &reg);   
+  pci_read_config_dword(b,d,f,PCI_CAPLISTPTR_REG, &reg);
   ofs = PCI_CAPLIST_PTR(reg);
   while (ofs != 0) {
 #ifdef DIAGNOSTIC