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| author | Eric Norum <WENorum@lbl.gov> | 2005-10-20 18:38:26 +0000 |
|---|---|---|
| committer | Eric Norum <WENorum@lbl.gov> | 2005-10-20 18:38:26 +0000 |
| commit | cc2fcc1655fb5e0b6d9faefa2e1c8f7c0f4376fe (patch) | |
| tree | dc8535e4fe9ac154e0c2ca37a4c9a5d0bb399d28 /c/src/lib/libbsp/powerpc/motorola_powerpc/include | |
| parent | Cosmetics (diff) | |
| download | rtems-cc2fcc1655fb5e0b6d9faefa2e1c8f7c0f4376fe.tar.bz2 | |
Numerous changes and cleanups to support MVME2100.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/motorola_powerpc/include')
| -rw-r--r-- | c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp.h b/c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp.h index 6e189f08be..a1d73541e2 100644 --- a/c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp.h +++ b/c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp.h @@ -38,8 +38,8 @@ #define _ISA_MEM_BASE CHRP_ISA_MEM_BASE /* address of our ram on the PCI bus */ #define PCI_DRAM_OFFSET CHRP_PCI_DRAM_OFFSET -#define PCI_MEM_BASE 0x80000000 -#define PCI_MEM_BASE_ADJUSTMENT 0 +#define PCI_MEM_BASE 0 +#define PCI_MEM_WIN0 0x80000000 #else #define _IO_BASE PREP_ISA_IO_BASE @@ -48,7 +48,7 @@ #define PCI_DRAM_OFFSET PREP_PCI_DRAM_OFFSET /* offset of pci memory as seen from the CPU */ #define PCI_MEM_BASE PREP_ISA_MEM_BASE -#define PCI_MEM_BASE_ADJUSTMENT PREP_ISA_MEM_BASE +#define PCI_MEM_WIN0 0 #endif |