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authorRalf Corsepius <ralf.corsepius@rtems.org>2009-11-30 03:49:08 +0000
committerRalf Corsepius <ralf.corsepius@rtems.org>2009-11-30 03:49:08 +0000
commit3495c57d11b6e39e2c8f8c9deb53a0b7b3a7b596 (patch)
tree50a66b31574167e158722ffb56e25c2ea9deb011 /c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.c
parentWhitespace removal. (diff)
downloadrtems-3495c57d11b6e39e2c8f8c9deb53a0b7b3a7b596.tar.bz2
Whitespace removal.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.c')
-rw-r--r--c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.c b/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.c
index 0e440984b6..1ac160302d 100644
--- a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.c
+++ b/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.c
@@ -218,8 +218,8 @@ int C_dispatch_irq_handler (BSP_Exception_frame *frame, unsigned int excNum)
ppc_cached_irq_mask |= (1 << (31 - BSP_CPM_INTERRUPT));
((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask = ppc_cached_irq_mask;
}
- /*
- * make sure, that the masking operations in
+ /*
+ * make sure, that the masking operations in
* ICTL and MSR are executed in order
*/
asm volatile("sync":::"memory");
@@ -232,8 +232,8 @@ int C_dispatch_irq_handler (BSP_Exception_frame *frame, unsigned int excNum)
_CPU_MSR_SET(msr);
- /*
- * make sure, that the masking operations in
+ /*
+ * make sure, that the masking operations in
* ICTL and MSR are executed in order
*/
asm volatile("sync":::"memory");