Whitespace removal.

6 files changed, 50 insertions, 50 deletions

diff --git a/c/src/lib/libbsp/powerpc/haleakala/dlentry/dlentry.S b/c/src/lib/libbsp/powerpc/haleakala/dlentry/dlentry.S
index 9801bf3239..05f60fd71e 100644
--- a/c/src/lib/libbsp/powerpc/haleakala/dlentry/dlentry.S
+++ b/c/src/lib/libbsp/powerpc/haleakala/dlentry/dlentry.S
@@ -36,7 +36,7 @@
  *  Further changes to derive for the PPC405CR/GP/GPr/EX/EXr
  *  by Michael Hamel ADInstruments Ltd 2008
  *
- * 
+ *
  *  Id: dlentry.S,v 1.2 2000/08/02 16:30:57 joel Exp
  */
 
@@ -44,7 +44,7 @@
 #warning The call is "void boot_card(const char* cmdline);"
 #warning You need to pass a NULL.
 #warning Please check and remove these warnings.
-	
+
 #include <rtems/asm.h>
 
 /*
@@ -82,7 +82,7 @@
 			PUBLIC_VAR (start)
 			PUBLIC_VAR (download_entry)
 			PUBLIC_VAR (__rtems_entry_point)
-		
+
 SYM(start):
 SYM(download_entry):
 SYM(__rtems_entry_point):
@@ -95,7 +95,7 @@ SYM(__rtems_entry_point):
 /*---------------------------------------------------------------------------
  * Parameters from linker
  *--------------------------------------------------------------------------*/
- 
+
 base_addr:
 toc_pointer:
 		.long	s.got
@@ -125,10 +125,10 @@ text_length:
 
 			/* Initialise procesor registers generally */
 			bl		init405
-			
+
 			/* Clear .bss and .sbss */
 			bl		bssclr
-			
+
 			/*-------------------------------------------------------------------
 			 * C_setup.
 			 *------------------------------------------------------------------*/
@@ -141,9 +141,9 @@ text_length:
 			stw		r3, 12(r1)
 
 			bl		__eabi				/* Initialise EABI: sets up r2 & r13 */
-			
+
 			li		r3, 0			/* command line */
-			
+
 			b       SYM (boot_card) 	 /* call the first C routine */
 
 /*---------------------------------------------------------------------------
@@ -175,11 +175,11 @@ clear_sbss:	stwu	r0,4(r2)
  * Generic 405 register setup
  *--------------------------------------------------------------------------*/
 init405:
-			li		r0, 0	
+			li		r0, 0
 			mtmsr	r0
 			mticcr	r0
 			mtdccr	r0
-						
+
 			li		r3,0x7FFC	# 405EX-specific
 			mtsgr	r3			# Clear guarded mode on all storage except PCIe region
 
@@ -201,13 +201,13 @@ dcloop:		dccci	0,r3		# invalidate line
 			mtdcwr	r0			# Select write-back caching
 			lis		r3,0xC000	# Enable 0000 0000 to 0FFF FFFF
 			# mtdccr	r3			# Enable data cache
-			
+
 			mtevpr	r0
 			mtesr	r0
 			mtxer	r0
-			
+
 			lwarx   r3,r0,r0		# get some data/set resv bit
-			stwcx.	r3,r0,r0		# store out and clear resv bit	
+			stwcx.	r3,r0,r0		# store out and clear resv bit
 
 			lis		r3,0xDEAD
 			ori		r3,r3,0xBEEF	# Make distintive uninitialised value
diff --git a/c/src/lib/libbsp/powerpc/haleakala/include/bsp.h b/c/src/lib/libbsp/powerpc/haleakala/include/bsp.h
index 558abc55e5..f1a52a0490 100644
--- a/c/src/lib/libbsp/powerpc/haleakala/include/bsp.h
+++ b/c/src/lib/libbsp/powerpc/haleakala/include/bsp.h
@@ -72,7 +72,7 @@ extern "C" {
 
   /* Network Defines */
   #define RTEMS_BSP_NETWORK_DRIVER_NAME     "eth0"
-  
+
   struct rtems_bsdnet_ifconfig;
   int rtems_emac_driver_attach(struct rtems_bsdnet_ifconfig* config, int attaching);
   #define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_emac_driver_attach
@@ -91,7 +91,7 @@ extern "C" {
     rtems_vector_number vector,                   /* vector number      */
     int                 type                      /* RTEMS or RAW intr  */
   );
-  
+
 #endif /* ASM */
 
 #ifdef __cplusplus
diff --git a/c/src/lib/libbsp/powerpc/haleakala/irq/irq.c b/c/src/lib/libbsp/powerpc/haleakala/irq/irq.c
index 736fde0e52..e6263389d4 100644
--- a/c/src/lib/libbsp/powerpc/haleakala/irq/irq.c
+++ b/c/src/lib/libbsp/powerpc/haleakala/irq/irq.c
@@ -69,11 +69,11 @@ static inline int IsUICIRQ(const rtems_irq_number irqLine)
 static void WriteIState(void)
 /* Write the gEnabledInts state masked by gIntInhibited to the hardware */
 {
-	PPC_SET_DEVICE_CONTROL_REGISTER(UIC0_ER, 
+	PPC_SET_DEVICE_CONTROL_REGISTER(UIC0_ER,
 					gEnabledInts[0] & ~gIntInhibited[0]);
-	PPC_SET_DEVICE_CONTROL_REGISTER(UIC1_ER, 
+	PPC_SET_DEVICE_CONTROL_REGISTER(UIC1_ER,
 					gEnabledInts[1] & ~gIntInhibited[1]);
-	PPC_SET_DEVICE_CONTROL_REGISTER(UIC2_ER, 
+	PPC_SET_DEVICE_CONTROL_REGISTER(UIC2_ER,
 					gEnabledInts[2] & ~gIntInhibited[2]);
 }
 
@@ -96,7 +96,7 @@ BSP_disable_irq_at_pic(const rtems_irq_number irq)
 		uint32_t oldState;
 		int		 iword = irq>>5;
 		uint32_t mask = (0x80000000 >> (irq & 0x1F));
-		
+
 		oldState = gEnabledInts[iword] & mask;
 		gEnabledInts[iword] &= ~mask;
 		WriteIState();
@@ -109,14 +109,14 @@ int
 BSP_setup_the_pic(rtems_irq_global_settings* config)
 {
 	int i;
-	
+
 	dflt_entry     = config->defaultEntry;
 	rtems_hdl_tblP = config->irqHdlTbl;
 	for (i=0; i<kUICWords; i++)
 		gIntInhibited[i] = 0;
-		
+
 	/* disable all interrupts */
-	PPC_SET_DEVICE_CONTROL_REGISTER (UIC2_ER, 0x00000000);	
+	PPC_SET_DEVICE_CONTROL_REGISTER (UIC2_ER, 0x00000000);
 	/* Set Critical / Non Critical interrupts */
 	PPC_SET_DEVICE_CONTROL_REGISTER (UIC2_CR, 0x00000000);
 	/* Set Interrupt Polarities */
@@ -153,7 +153,7 @@ BSP_setup_the_pic(rtems_irq_global_settings* config)
 	PPC_SET_DEVICE_CONTROL_REGISTER (UIC0_VR, 0x00000001);
 	/* clear all interrupts */
 	PPC_SET_DEVICE_CONTROL_REGISTER (UIC0_SR, 0xffffffff);
-	
+
 	return 1;
 }
 
@@ -164,8 +164,8 @@ BSP_setup_the_pic(rtems_irq_global_settings* config)
  *
  * No support for critical interrupts here yet
  */
- 
-int 
+
+int
 C_dispatch_irq_handler( BSP_Exception_frame* frame, unsigned int excNum )
 {
 	if (excNum == ASM_EXT_VECTOR) {
@@ -180,15 +180,15 @@ C_dispatch_irq_handler( BSP_Exception_frame* frame, unsigned int excNum )
 		gIntInhibited[0] |= active[0];
 		gIntInhibited[1] |= active[1];
 		gIntInhibited[2] |= active[2];
-		
+
 		/*  ...and update the hardware so the active interrupts are disabled */
 		WriteIState();
-		
+
 		/* Loop, calling bsp_irq_dispatch_list for each active interrupt */
 		while ((active[0] | active[1] | active[2]) != 0) {
 			uint32_t index = -1;
 			uint32_t bit, bmask;
-			
+
 			/* Find an active interrupt, searching 0..2, bit 0..bit 31 (IBM order) */
 			do {
 				index++;
@@ -201,17 +201,17 @@ C_dispatch_irq_handler( BSP_Exception_frame* frame, unsigned int excNum )
 			/* Write a 1-bit to the appropriate status register to clear it */
 			bmask = 0x80000000 >> bit;
 			switch (index) {
-			case 0: 
+			case 0:
 			  PPC_SET_DEVICE_CONTROL_REGISTER(UIC0_SR, bmask);
 			  break;
-			case 1: 
+			case 1:
 			  PPC_SET_DEVICE_CONTROL_REGISTER(UIC1_SR, bmask);
 			  break;
-			case 2: 
+			case 2:
 			  PPC_SET_DEVICE_CONTROL_REGISTER(UIC2_SR, bmask);
 			  break;
 			}
-			
+
 			/* Clear in the active record and gIntInhibited */
 			active[index] &= ~bmask;
 			gIntInhibited[index] &= ~bmask;
@@ -220,20 +220,20 @@ C_dispatch_irq_handler( BSP_Exception_frame* frame, unsigned int excNum )
 		/* Update the hardware again so the interrupts we have handled are unmasked */
 		WriteIState();
 		return 0;
-		
+
 	} else if (excNum == ASM_DEC_VECTOR) {		/* 0x1000 remapped by C_dispatch_dec_handler_bookE  */
 		bsp_irq_dispatch_list(rtems_hdl_tblP, BSP_PIT, dflt_entry.hdl);
 		return 0;
-		
+
 	} else if (excNum == ASM_BOOKE_FIT_VECTOR) {		/* 0x1010 mapped to 0x13 by ppc_get_vector_addr */
 		bsp_irq_dispatch_list(rtems_hdl_tblP, BSP_FIT, dflt_entry.hdl);
 		return 0;
-		
+
 	} else if (excNum == ASM_BOOKE_WDOG_VECTOR) {		/* 0x1020 mapped to 0x14 by ppc_get_vector_addr */
 		bsp_irq_dispatch_list(rtems_hdl_tblP, BSP_WDOG, dflt_entry.hdl);
 		return 0;
-		
-	} else 
+
+	} else
 		return -1; /* unhandled interrupt, panic time */
 }
 
diff --git a/c/src/lib/libbsp/powerpc/haleakala/irq/irq.h b/c/src/lib/libbsp/powerpc/haleakala/irq/irq.h
index 908fe4bf9b..d8395a609b 100644
--- a/c/src/lib/libbsp/powerpc/haleakala/irq/irq.h
+++ b/c/src/lib/libbsp/powerpc/haleakala/irq/irq.h
@@ -23,7 +23,7 @@
 #ifdef __cplusplus
 extern "C" {
 #endif
-	
+
 	/* Define UIC interrupt numbers; IRQs that cause an external interrupt that needs further decode.
 	   These are arbitrary but it makes things easier if they match the CPU interrupt numbers */
 
@@ -103,7 +103,7 @@ extern "C" {
 	#define	BSP_UIC_EIPKP_SLAVE		(BSP_UIC1_IRQ_LOWEST_OFFSET + 7)
 	#define	BSP_UIC_GPT_TIMER5		(BSP_UIC1_IRQ_LOWEST_OFFSET + 8)
 	#define	BSP_UIC_GPT_TIMER6		(BSP_UIC1_IRQ_LOWEST_OFFSET + 9)
-	
+
 	#define	BSP_UIC_GPT_TIMER0		(BSP_UIC1_IRQ_LOWEST_OFFSET + 16)
 	#define	BSP_UIC_GPT_TIMER1		(BSP_UIC1_IRQ_LOWEST_OFFSET + 17)
 	#define	BSP_UIC_IRQ7			(BSP_UIC1_IRQ_LOWEST_OFFSET + 18)
@@ -127,7 +127,7 @@ extern "C" {
 	#define	BSP_UIC_PCIe0INTC		(BSP_UIC2_IRQ_LOWEST_OFFSET + 2)
 	#define	BSP_UIC_PCIe0INTD		(BSP_UIC2_IRQ_LOWEST_OFFSET + 3)
 	#define	BSP_UIC_IRQ3			(BSP_UIC2_IRQ_LOWEST_OFFSET + 4)
-	
+
 	#define	BSP_UIC_USBOTG			(BSP_UIC2_IRQ_LOWEST_OFFSET + 30)
 
 	#define	BSP_UIC_IRQ_NUMBER			(95)
@@ -143,7 +143,7 @@ extern "C" {
 
 	#define BSP_PIT				BSP_PROCESSOR_IRQ_LOWEST_OFFSET	/* Required by ppc403/clock.c */
 	#define	BSP_FIT				BSP_PROCESSOR_IRQ_LOWEST_OFFSET + 1
-	#define	BSP_WDOG			BSP_PROCESSOR_IRQ_LOWEST_OFFSET + 2 
+	#define	BSP_WDOG			BSP_PROCESSOR_IRQ_LOWEST_OFFSET + 2
 
 	#define BSP_PROCESSOR_IRQ_NUMBER	    (3)
 	#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET	(BSP_UIC_IRQ_MAX_OFFSET + 1)
@@ -154,10 +154,10 @@ extern "C" {
 	#define BSP_IRQ_NUMBER		 	(BSP_PROCESSOR_IRQ_MAX_OFFSET + 1)
 	#define BSP_LOWEST_OFFSET		(BSP_UIC_IRQ_LOWEST_OFFSET)
 	#define BSP_MAX_OFFSET			(BSP_IRQ_NUMBER - 1)
-	
+
 	extern void BSP_rtems_irq_mng_init(unsigned cpuId);		// Implemented in irq_init.c
 	#include <bsp/irq_supp.h>
-	
+
 	#ifdef __cplusplus
 	}
 	#endif
diff --git a/c/src/lib/libbsp/powerpc/haleakala/irq/irq_init.c b/c/src/lib/libbsp/powerpc/haleakala/irq/irq_init.c
index cafe6f6d7a..1e801c8431 100644
--- a/c/src/lib/libbsp/powerpc/haleakala/irq/irq_init.c
+++ b/c/src/lib/libbsp/powerpc/haleakala/irq/irq_init.c
@@ -57,7 +57,7 @@ static rtems_irq_prio irqPrioTable[BSP_IRQ_NUMBER]={
 void BSP_rtems_irq_mng_init(unsigned cpuId)
 {
   int i;
-  
+
   /*
    * re-init the rtemsIrq table
    */
@@ -82,8 +82,8 @@ void BSP_rtems_irq_mng_init(unsigned cpuId)
       "Unable to initialize RTEMS interrupt management!!! System locked\n"
     );
   }
-  
-  #ifdef TRACE_IRQ_INIT  
+
+  #ifdef TRACE_IRQ_INIT
     printk("RTEMS IRQ management is now operational\n");
   #endif
 }
diff --git a/c/src/lib/libbsp/powerpc/haleakala/startup/bspstart.c b/c/src/lib/libbsp/powerpc/haleakala/startup/bspstart.c
index cf37168e03..9ca78b959b 100644
--- a/c/src/lib/libbsp/powerpc/haleakala/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/haleakala/startup/bspstart.c
@@ -182,8 +182,8 @@ void bsp_start( void )
   EarlyUARTInit(115200);
 
   /*
-   * Get CPU identification dynamically. Note that the get_ppc_cpu_type() 
-   * function store the result in global variables 
+   * Get CPU identification dynamically. Note that the get_ppc_cpu_type()
+   * function store the result in global variables
    * so that it can be used later...
    */
   myCpu       = get_ppc_cpu_type();
@@ -200,9 +200,9 @@ void bsp_start( void )
   bsp_timer_internal_clock  = TRUE;
   bsp_timer_average_overhead = 2;
   bsp_timer_least_valid = 3;
-  
+
   /*
-   * Initialize default raw exception handlers. 
+   * Initialize default raw exception handlers.
    */
   sc = ppc_exc_initialize(
     PPC_INTERRUPT_DISABLE_MASK_DEFAULT,