Whitespace removal.

12 files changed, 99 insertions, 99 deletions

diff --git a/c/src/lib/libbsp/powerpc/gen83xx/console/config.c b/c/src/lib/libbsp/powerpc/gen83xx/console/config.c
index 39c7899cb6..ad36676fa3 100644
--- a/c/src/lib/libbsp/powerpc/gen83xx/console/config.c
+++ b/c/src/lib/libbsp/powerpc/gen83xx/console/config.c
@@ -23,7 +23,7 @@
 /* derived from: */
 /*
  *  This file contains the TTY driver table for the EP1A
- * 
+ *
  *  COPYRIGHT (c) 1989-1999.
  *  On-Line Applications Research Corporation (OAR).
  *
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/console/console.c b/c/src/lib/libbsp/powerpc/gen83xx/console/console.c
index 15fe80acb5..52ee30ec09 100644
--- a/c/src/lib/libbsp/powerpc/gen83xx/console/console.c
+++ b/c/src/lib/libbsp/powerpc/gen83xx/console/console.c
@@ -56,7 +56,7 @@
 console_data	Console_Port_Data[NUM_CONSOLE_PORTS];
 unsigned long	Console_Port_Count;
 rtems_device_minor_number  Console_Port_Minor;
-bool Console_Is_Initialized = false;		
+bool Console_Is_Initialized = false;
 /* PAGE
  *
  *  console_open
@@ -92,9 +92,9 @@ rtems_device_driver console_open(
 	Callbacks.pollRead      = c->deviceRead;
 	Callbacks.write         = c->deviceWrite;
 	Callbacks.setAttributes = c->deviceSetAttributes;
-	Callbacks.stopRemoteTx  = 
+	Callbacks.stopRemoteTx  =
 		Console_Port_Tbl[minor].pDeviceFlow->deviceStopRemoteTx;
-	Callbacks.startRemoteTx = 
+	Callbacks.startRemoteTx =
 		Console_Port_Tbl[minor].pDeviceFlow->deviceStartRemoteTx;
 	Callbacks.outputUsesInterrupts = c->deviceOutputUsesInterrupts;
 	status = rtems_termios_open ( major, minor, arg, &Callbacks);
@@ -105,7 +105,7 @@ rtems_device_driver console_open(
 
 	return status;
 }
- 
+
 rtems_device_driver console_close(
   rtems_device_major_number major,
   rtems_device_minor_number minor,
@@ -123,7 +123,7 @@ rtems_device_driver console_close(
 
 	return rtems_termios_close (arg);
 }
- 
+
 rtems_device_driver console_read(
   rtems_device_major_number major,
   rtems_device_minor_number minor,
@@ -132,7 +132,7 @@ rtems_device_driver console_read(
 {
   return rtems_termios_read (arg);
 }
- 
+
 rtems_device_driver console_write(
   rtems_device_major_number major,
   rtems_device_minor_number minor,
@@ -141,7 +141,7 @@ rtems_device_driver console_write(
 {
   return rtems_termios_write (arg);
 }
- 
+
 rtems_device_driver console_control(
   rtems_device_major_number major,
   rtems_device_minor_number minor,
@@ -177,7 +177,7 @@ rtems_device_driver console_initialize(
     minor++)
   {
     /*
-     * transfer the real internal bus frequency into the 
+     * transfer the real internal bus frequency into the
      * console port table
      */
     Console_Port_Tbl[minor].ulClock = BSP_bus_frequency;
@@ -202,7 +202,7 @@ rtems_device_driver console_initialize(
      */
     rtems_fatal_error_occurred(RTEMS_IO_ERROR);
   }
-	
+
   Console_Port_Minor=minor;
 
   /*
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/console/ns16550cfg.c b/c/src/lib/libbsp/powerpc/gen83xx/console/ns16550cfg.c
index 2a2ab64138..3275835c86 100644
--- a/c/src/lib/libbsp/powerpc/gen83xx/console/ns16550cfg.c
+++ b/c/src/lib/libbsp/powerpc/gen83xx/console/ns16550cfg.c
@@ -37,7 +37,7 @@
 #include <rtems.h>
 #include <bsp.h>
 #include "console.h"
-                                                            
+
 typedef struct uart_reg
 {
   volatile unsigned char reg;
@@ -50,7 +50,7 @@ uint8_t Read_ns16550_register(
 {
   struct uart_reg *p = (struct uart_reg *)ulCtrlPort;
   uint8_t  ucData;
-  ucData = p[ucRegNum].reg;  
+  ucData = p[ucRegNum].reg;
   asm volatile("sync");
   return ucData;
 }
@@ -62,6 +62,6 @@ void  Write_ns16550_register(
 )
 {
   struct uart_reg *p = (struct uart_reg *)ulCtrlPort;
-  p[ucRegNum].reg = ucData; 
+  p[ucRegNum].reg = ucData;
   asm volatile("sync");
 }
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/i2c/i2c_init.c b/c/src/lib/libbsp/powerpc/gen83xx/i2c/i2c_init.c
index c47359e431..88ebe35b93 100644
--- a/c/src/lib/libbsp/powerpc/gen83xx/i2c/i2c_init.c
+++ b/c/src/lib/libbsp/powerpc/gen83xx/i2c/i2c_init.c
@@ -47,7 +47,7 @@ static mpc83xx_i2c_desc_t mpc83xx_i2c_bus_tbl[2] = {
       .irq_number = BSP_IPIC_IRQ_I2C2,
       .base_frq = 0 /* will be set during initiailization */
     }
-  } 
+  }
 };
 
 rtems_libi2c_bus_t *mpc83xx_i2c_bus_descriptor[2] = {
@@ -89,7 +89,7 @@ rtems_status_code bsp_register_i2c
    * I2C1 is clocked with TSEC 1
    */
   if (((mpc83xx.clk.sccr >> (31-1)) & 0x03) > 0) {
-    mpc83xx_i2c_bus_tbl[0].softc.base_frq = 
+    mpc83xx_i2c_bus_tbl[0].softc.base_frq =
       (BSP_bus_frequency
        /((mpc83xx.clk.sccr >> (31-1)) & 0x03));
   }
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/include/bsp.h b/c/src/lib/libbsp/powerpc/gen83xx/include/bsp.h
index 2fddd48c6b..bb6dc4c7f3 100644
--- a/c/src/lib/libbsp/powerpc/gen83xx/include/bsp.h
+++ b/c/src/lib/libbsp/powerpc/gen83xx/include/bsp.h
@@ -36,7 +36,7 @@
 
 #endif /* MPC8313ERDB */
 
-#include <libcpu/powerpc-utility.h> 
+#include <libcpu/powerpc-utility.h>
 
 #include <bsp/hwreg_vals.h>
 
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/include/hwreg_vals.h b/c/src/lib/libbsp/powerpc/gen83xx/include/hwreg_vals.h
index 7c43be8832..f5786812b6 100644
--- a/c/src/lib/libbsp/powerpc/gen83xx/include/hwreg_vals.h
+++ b/c/src/lib/libbsp/powerpc/gen83xx/include/hwreg_vals.h
@@ -40,7 +40,7 @@
  * clocking infos
  */
 #define BSP_CLKIN_FRQ 66000000L
-#define RCFG_SYSPLL_MF 4 
+#define RCFG_SYSPLL_MF 4
 #define RCFG_COREPLL_MF 4
 
 /*
@@ -80,7 +80,7 @@
  * clocking infos
  */
 #define BSP_CLKIN_FRQ 30000000L
-#define RCFG_SYSPLL_MF 11 
+#define RCFG_SYSPLL_MF 11
 #define RCFG_COREPLL_MF 4
 /*
  * Reset configuration words
@@ -115,7 +115,7 @@
 
 #endif
 
-#if defined(MPC8349EAMDS) 
+#if defined(MPC8349EAMDS)
 /**************************
  * for Freescale MPC8349EAMDS
  */
@@ -126,7 +126,7 @@
 
 /*
  * Local Access Windows
- * FIXME: decode bit settings 
+ * FIXME: decode bit settings
  */
 #define LBLAWBAR0_VAL  0xFE000000
 #define LBLAWAR0_VAL   0x80000016
@@ -138,7 +138,7 @@
 #define DDRLAWAR0_VAL  0x8000001B
 /*
  * Local Bus (Memory) Controller
- * FIXME: decode bit settings 
+ * FIXME: decode bit settings
  */
 #define BR0_VAL 0xFE001001
 #define OR0_VAL 0xFF806FF7
@@ -148,7 +148,7 @@
 #define OR2_VAL 0xFC006901
 /*
  * SDRAM registers
- * FIXME: decode bit settings 
+ * FIXME: decode bit settings
  */
 #define MRPTR_VAL 0x20000000
 #define LSRT_VAL  0x32000000
@@ -157,7 +157,7 @@
 
 /*
  * DDR-SDRAM registers
- * FIXME: decode bit settings 
+ * FIXME: decode bit settings
  */
 #define CS2_BNDS_VAL                 0x00000007
 #define CS3_BNDS_VAL                 0x0008000F
@@ -201,7 +201,7 @@
 
 /*
  * Local Access Windows
- * FIXME: decode bit settings 
+ * FIXME: decode bit settings
  */
 
 #define LBLAWBAR0_VAL  bsp_rom_start
@@ -212,7 +212,7 @@
 #define DDRLAWAR0_VAL  0x8000001B
 /*
  * Local Bus (Memory) Controller
- * FIXME: decode bit settings 
+ * FIXME: decode bit settings
  */
 #define BR0_VAL (0xFE000000 | 0x01001)
 #define OR0_VAL 0xFE000E54
@@ -238,7 +238,7 @@
 
 /*
  * DDR-SDRAM registers
- * FIXME: decode bit settings 
+ * FIXME: decode bit settings
  */
 #define DDRCDR_VAL                   0x00000001
 #define CS0_BNDS_VAL                 0x0000000F
@@ -273,8 +273,8 @@
 /* value of input clock divider (derived from pll mode reg) */
 #define BSP_SYSPLL_CKID (((mpc83xx.clk.spmr>>(31-8))&0x01)+1)
 /* value of system pll (derived from pll mode reg) */
-#define BSP_SYSPLL_MF    ((mpc83xx.clk.spmr>>(31-7))&0x0f) 
+#define BSP_SYSPLL_MF    ((mpc83xx.clk.spmr>>(31-7))&0x0f)
 /* value of system pll (derived from pll mode reg) */
-#define BSP_COREPLL_MF   ((mpc83xx.clk.spmr>>(31-15))&0x7f) 
+#define BSP_COREPLL_MF   ((mpc83xx.clk.spmr>>(31-15))&0x7f)
 
 #endif /* __GEN83xx_HWREG_VALS_h */
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/include/irq.h b/c/src/lib/libbsp/powerpc/gen83xx/include/irq.h
index eb2602c703..3d6794bff0 100644
--- a/c/src/lib/libbsp/powerpc/gen83xx/include/irq.h
+++ b/c/src/lib/libbsp/powerpc/gen83xx/include/irq.h
@@ -26,7 +26,7 @@
 #include <rtems/irq-extension.h>
 
 /*
- * the following definitions specify the indices used 
+ * the following definitions specify the indices used
  * to interface the interrupt handler API
  */
 
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/irq/irq.c b/c/src/lib/libbsp/powerpc/gen83xx/irq/irq.c
index e9a14c9d35..77702229dc 100644
--- a/c/src/lib/libbsp/powerpc/gen83xx/irq/irq.c
+++ b/c/src/lib/libbsp/powerpc/gen83xx/irq/irq.c
@@ -291,7 +291,7 @@ static const uint8_t mpc83xx_ipic_mask_position_table [MPC83XX_IPIC_VECTOR_NUMBE
 };
 
 /*
- * this array will be filled with mask values needed 
+ * this array will be filled with mask values needed
  * to temporarily disable all IRQ soures with lower or same
  * priority of the current source (whose vector is the array index)
  */
@@ -493,8 +493,8 @@ rtems_status_code mpc83xx_ipic_calc_prio2mask( void)
  */
 rtems_status_code mpc83xx_ipic_initialize( void)
 {
-	/* 
-	 * mask off all interrupts 
+	/*
+	 * mask off all interrupts
 	 */
 	mpc83xx.ipic.simsr [0] = 0;
 	mpc83xx.ipic.simsr [1] = 0;
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/network/network.c b/c/src/lib/libbsp/powerpc/gen83xx/network/network.c
index a4e8f432f2..66c1199389 100644
--- a/c/src/lib/libbsp/powerpc/gen83xx/network/network.c
+++ b/c/src/lib/libbsp/powerpc/gen83xx/network/network.c
@@ -87,8 +87,8 @@ int BSP_tsec_attach
 
     if (unitNumber == 1) {
       /*
-       * init system I/O configuration registers 
-       * to ensure proper pin functions 
+       * init system I/O configuration registers
+       * to ensure proper pin functions
        */
       mpc83xx.syscon.sicrh = mpc83xx.syscon.sicrh & ~0x1F800000;
       /*
@@ -99,8 +99,8 @@ int BSP_tsec_attach
     }
     if (unitNumber == 2) {
       /*
-       * init system I/O configuration registers 
-       * to ensure proper pin functions 
+       * init system I/O configuration registers
+       * to ensure proper pin functions
        */
       mpc83xx.syscon.sicrh = mpc83xx.syscon.sicrh & ~0x007f8000;
       /*
@@ -116,7 +116,7 @@ int BSP_tsec_attach
     /*
      * Nothing special needed for TSEC1 operation
      */
-#endif    
+#endif
   }
   /*
    * add MAC address into config->hardware_adderss
@@ -131,7 +131,7 @@ int BSP_tsec_attach
     /* we expect it htere from the boot loader */
     reg_ptr = &mpc83xx.tsec[unitNumber - 1];
     config->hardware_address = hw_addr[unitNumber-1];
-    
+
     hw_addr[unitNumber-1][5] = (reg_ptr->macstnaddr[0] >> 24) & 0xff;
     hw_addr[unitNumber-1][4] = (reg_ptr->macstnaddr[0] >> 16) & 0xff;
     hw_addr[unitNumber-1][3] = (reg_ptr->macstnaddr[0] >>  8) & 0xff;
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/spi/spi_init.c b/c/src/lib/libbsp/powerpc/gen83xx/spi/spi_init.c
index ac01a754fd..3778f7c413 100644
--- a/c/src/lib/libbsp/powerpc/gen83xx/spi/spi_init.c
+++ b/c/src/lib/libbsp/powerpc/gen83xx/spi/spi_init.c
@@ -104,13 +104,13 @@ static rtems_status_code bsp_spi_sel_addr
    * GPIO1[24] is SPI_A0
    * GPIO1[25] is SPI_A1
    * GPIO1[26] is SPI_A2
-   * set pins to address 
+   * set pins to address
    */
-  mpc83xx.gpio[0].gpdat = 
+  mpc83xx.gpio[0].gpdat =
     (mpc83xx.gpio[0].gpdat & ~(0x7  << (31-26)))
     |                         (addr << (31-26));
   /*
-   * GPIO1[27] is high-active strobe 
+   * GPIO1[27] is high-active strobe
    */
   mpc83xx.gpio[0].gpdat |= (1 << (31- 27));
 
@@ -154,7 +154,7 @@ static rtems_status_code bsp_spi_send_start_dummy
 #elif defined( HSC_CM01)
 
   /*
-   * GPIO1[27] is high-active strobe 
+   * GPIO1[27] is high-active strobe
    * set it to inactive/ low
    */
   mpc83xx.gpio[0].gpdat &= ~(0x1 << (31-27));
@@ -204,7 +204,7 @@ static rtems_status_code bsp_spi_send_stop
 
   /*
    * deselect device
-   * GPIO1[27] is high-active strobe 
+   * GPIO1[27] is high-active strobe
    */
   mpc83xx.gpio[0].gpdat &= ~(1 << (31- 27));
 
@@ -351,7 +351,7 @@ rtems_status_code bsp_register_spi
    * GPIO1[24] is SPI_A0
    * GPIO1[25] is SPI_A1
    * GPIO1[26] is SPI_A2
-   * GPIO1[27] is high-active strobe 
+   * GPIO1[27] is high-active strobe
    * set pins to be output, low
    */
   mpc83xx.gpio[0].gpdat &= ~(0xf << (31-27));
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/start/start.S b/c/src/lib/libbsp/powerpc/gen83xx/start/start.S
index 8dec6a1822..ace422bb44 100644
--- a/c/src/lib/libbsp/powerpc/gen83xx/start/start.S
+++ b/c/src/lib/libbsp/powerpc/gen83xx/start/start.S
@@ -16,10 +16,10 @@
 +-----------------------------------------------------------------+
 | this file contains the startup assembly code                    |
 \*===============================================================*/
-/* $Id$ */   
+/* $Id$ */
 
 
-#include <libcpu/powerpc-utility.h> 
+#include <libcpu/powerpc-utility.h>
 #include <rtems/powerpc/cache.h>
 #include <bsp.h>
 #include <mpc83xx/mpc83xx.h>
@@ -27,7 +27,7 @@
 .macro SET_IMM_REGW base, reg2, offset, value
 	LA \reg2, \value
 	stw \reg2,\offset(\base)
-.endm 
+.endm
 
 #define REP8(l) l ; l; l; l; l; l; l; l;
 
@@ -37,7 +37,7 @@
 #if defined(RESET_CONF_WRD_L)
 .section ".resconf","ax"
 PUBLIC_VAR (reset_conf_words)
-reset_conf_words:	
+reset_conf_words:
 	REP8( .byte ((RESET_CONF_WRD_L >> 24) & 0xff))
 	REP8( .byte ((RESET_CONF_WRD_L >> 16) & 0xff))
 	REP8( .byte ((RESET_CONF_WRD_L >>  8) & 0xff))
@@ -51,10 +51,10 @@ reset_conf_words:
 
 .section ".vectors","ax"
 PUBLIC_VAR (reset_vec)
-reset_vec:	
+reset_vec:
 	bl rom_entry
-	
-.section ".entry"  
+
+.section ".entry"
 PUBLIC_VAR (start)
 start:
 
@@ -84,7 +84,7 @@ copy_uboot_board_info:
 #endif /* HAS_UBOOT */
 
 	/*
-	 * basic CPU setup:	
+	 * basic CPU setup:
 	 * init MSR
 	 */
 	mfmsr	r30
@@ -93,18 +93,18 @@ copy_uboot_board_info:
 	mtmsr	r30 				/* Set RI/ME, Clr EE in MSR */
 
 	b start_rom_skip
-	
+
 PUBLIC_VAR (rom_entry)
 rom_entry:
 	/*
-	 * basic CPU setup:	
+	 * basic CPU setup:
 	 * init MSR
 	 */
 	mfmsr	r30
 	SETBITS r30, r29, MSR_ME|MSR_RI
 	CLRBITS r30, r29, MSR_IP|MSR_EE
 	mtmsr	r30 				/* Set RI/ME, Clr EE in MSR */
-	
+
 	/*
 	 * ROM startup: remap IMMR to 0xE0000000
 	 * use special sequence from MPC8349EA RM Rev 1, 5.2.4.1.1 "Updating IMMRBAR"
@@ -147,14 +147,14 @@ rom_entry:
 	mtlr	r29
 	blr                     /* now further execution in upper ROM */
 
-start_code_in_rom:	
+start_code_in_rom:
 
 #ifdef LBLAWBAR0_VAL
 	SET_IMM_REGW r31,r30,LBLAWBAR0_OFF,LBLAWBAR0_VAL
 #endif
 #ifdef LBLAWAR0_VAL
 	SET_IMM_REGW r31,r30,LBLAWAR0_OFF,LBLAWAR0_VAL
-#endif	
+#endif
 #ifdef LBLAWBAR1_VAL
 	SET_IMM_REGW r31,r30,LBLAWBAR1_OFF,LBLAWBAR1_VAL
 #endif
@@ -232,7 +232,7 @@ start_code_in_rom:
 	 */
 #ifdef MRPTR_VAL
 	SET_IMM_REGW r31,r30,MRPTR_OFF,MRPTR_VAL
-#endif	
+#endif
 	/*
 	 * ROM startup: init SDRAM
 	 */
@@ -357,7 +357,7 @@ start_rom_skip:
 start_rom_skip1:
 	mflr r20
 	LA   r30,start_rom_skip1
-	sub. r20,r20,r30	
+	sub. r20,r20,r30
 	/*
 	 * execution address offset == 0?
 	 * then do not relocate code and data
@@ -367,24 +367,24 @@ start_rom_skip1:
 	 * ROM or relocatable startup: copy startup code to SDRAM
 	 */
 	/* get start address of text section in RAM */
-	LA	r29, bsp_section_text_start  
+	LA	r29, bsp_section_text_start
 	/* get start address of text section in ROM (add reloc offset) */
-	add	r30, r20, r29    
+	add	r30, r20, r29
 	/* get size of startup code */
 	LA	r28, end_reloc_startup
 	LA	r31, bsp_section_text_start
 	sub	28,r28,r31
 	/* copy startup code from ROM to RAM location */
-	bl	copy_image      
-	
+	bl	copy_image
+
 	/*
 	 * ROM startup: jump to code copy in  SDRAM
 	 */
 	/* get compile time address of label */
-	LA	r29, copy_rest_of_text 
+	LA	r29, copy_rest_of_text
 	mtlr	r29
 	blr                     /* now further execution RAM */
-copy_rest_of_text:	
+copy_rest_of_text:
 #ifdef LCRR_VAL
 	SET_IMM_REGW r31,r30,LCRR_OFF,LCRR_VAL
 #endif
@@ -394,27 +394,27 @@ copy_rest_of_text:
 	/* get start address of rest of code in RAM */
 	LA	r29, end_reloc_startup
 	/* get start address of text section in ROM (add reloc offset) */
-	add	r30, r20, r29    
+	add	r30, r20, r29
 	/* get size of rest of code */
 	LA	r28, bsp_section_text_start
 	LA	r31, bsp_section_text_size
 	add	r28,r28,r31
 	sub	r28,r28,r29
 	bl	copy_image      /* copy text section from ROM to RAM location */
-	
+
 	/*
 	 * ROM or relocatable startup: copy data to SDRAM
 	 */
 	/* get start address of data section in RAM */
-	LA	r29, bsp_section_data_start 
+	LA	r29, bsp_section_data_start
 	/* get start address of data section in ROM (add reloc offset) */
-	add	r30, r20, r29    
+	add	r30, r20, r29
 	/* get size of RAM image */
-	LA	r28, bsp_section_data_size  
+	LA	r28, bsp_section_data_size
 	/* copy initialized data section from ROM to RAM location */
-	bl	copy_image       
+	bl	copy_image
 
-start_code_in_ram:	
+start_code_in_ram:
 
 	/*
 	 * ROM/RAM startup: clear bss in SDRAM
@@ -427,8 +427,8 @@ start_code_in_ram:
 	 */
 
 	/* Set stack pointer (common for RAM/ROM startup) */
-	LA	r1, bsp_section_text_start  
-        addi    r1, r1, -0x10 /* Set up stack pointer = beginning of text section - 0x10 */     
+	LA	r1, bsp_section_text_start
+        addi    r1, r1, -0x10 /* Set up stack pointer = beginning of text section - 0x10 */
 
 	/* Create NULL */
 	li r0, 0
@@ -451,12 +451,12 @@ start_code_in_ram:
         xor r3, r3, r3
 
         bl      SYM (boot_card)  /* Call the first C routine */
-	
+
 twiddle:
 	/* We don't expect to return from boot_card but if we do */
 	/* wait here for watchdog to kick us into hard reset     */
-	b	twiddle          
-						
+	b	twiddle
+
 copy_image:
 	mr	r27, r28
 	srwi	r28, r28, 2
@@ -466,13 +466,13 @@ copy_image:
 	sub     r27, r27, r28			/* maybe some residual bytes */
 copy_image_word:
 	lswi	r28, r30, 0x04
-	
+
 	stswi   r28, r29, 0x04			/* do word copy ROM -> RAM */
-	
+
 
 	addi    r30, r30, 0x04			/* increment source pointer */
 	addi    r29, r29, 0x04			/* increment destination pointer */
-	
+
 	bdnz	copy_image_word			/* decrement ctr and branch if not 0 */
 
 	cmpwi	r27, 0x00			/* copy image finished ? */
@@ -480,19 +480,19 @@ copy_image_word:
 	mtctr   r27				/* reload counter for residual bytes */
 copy_image_byte:
 	lswi	r28, r30, 0x01
-	
+
 	stswi   r28, r29, 0x01			/* do byte copy ROM -> RAM */
-	
-	
+
+
 	addi    r30, r30, 0x01			/* increment source pointer */
 	addi    r29, r29, 0x01			/* increment destination pointer */
-	
+
 	bdnz	copy_image_byte			/* decrement ctr and branch if not 0 */
-	
+
 copy_image_end:
 	blr
 
-	
+
 /**
  * @fn int mpc83xx_zero_4( void *dest, size_t n)
  *
@@ -542,7 +542,7 @@ mpc83xx_zero_4_tail:
 	stwx	r0, r3, r8
 	addi	r8, r8, 16
 	bdnz	mpc83xx_zero_4_tail
-	
+
 	/* Return */
 	blr
 
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/startup/cpuinit.c b/c/src/lib/libbsp/powerpc/gen83xx/startup/cpuinit.c
index d3f04d26c7..44c3439e90 100644
--- a/c/src/lib/libbsp/powerpc/gen83xx/startup/cpuinit.c
+++ b/c/src/lib/libbsp/powerpc/gen83xx/startup/cpuinit.c
@@ -110,18 +110,18 @@ static void calc_dbat_regvals(
   while ((end_addr & block_mask) != (base_addr & block_mask)) {
     block_mask <<= 1;
   }
-  
-  bat_ptr->batu.bepi = base_addr >> (32 - 15); 
+
+  bat_ptr->batu.bepi = base_addr >> (32 - 15);
   bat_ptr->batu.bl   = ~(block_mask >> (28 - 11));
   bat_ptr->batu.vs   = 1;
   bat_ptr->batu.vp   = 1;
-  
-  bat_ptr->batl.brpn = base_addr  >> (32 - 15); 
-  bat_ptr->batl.w    = flg_w; 
-  bat_ptr->batl.i    = flg_i; 
-  bat_ptr->batl.m    = flg_m; 
-  bat_ptr->batl.g    = flg_g; 
-  bat_ptr->batl.pp   = flg_bpp; 
+
+  bat_ptr->batl.brpn = base_addr  >> (32 - 15);
+  bat_ptr->batl.w    = flg_w;
+  bat_ptr->batl.i    = flg_i;
+  bat_ptr->batl.m    = flg_m;
+  bat_ptr->batl.g    = flg_g;
+  bat_ptr->batl.pp   = flg_bpp;
 }
 
 static void clear_mmu_regs( void)
@@ -132,7 +132,7 @@ static void clear_mmu_regs( void)
   for (i = 0;i < 16;i++) {
     asm volatile( "mtsrin %0, %1\n" : : "r" (i * 0x1000), "r" (i << (31 - 3)));
   }
-  
+
   /* Clear TLBs */
   for (i = 0;i < 32;i++) {
     asm volatile( "tlbie %0\n" : : "r" (i << (31 - 19)));
@@ -151,7 +151,7 @@ void cpu_init( void)
   PPC_CLEAR_SPECIAL_PURPOSE_REGISTER_BITS( HID0, HID0_ILOCK | HID0_DLOCK);
   PPC_SET_SPECIAL_PURPOSE_REGISTER_BITS( HID0, HID0_ICFI | HID0_DCI);
   PPC_CLEAR_SPECIAL_PURPOSE_REGISTER_BITS( HID0, HID0_ICFI | HID0_DCI);
-  
+
   /*
    * Set up IBAT registers in MMU
    */
@@ -301,7 +301,7 @@ void cpu_init( void)
   ppc_set_machine_state_register( msr);
 
   /*
-   * In HID0: 
+   * In HID0:
    *  - Enable dynamic power management
    *  - Enable machine check interrupts
    */