compilable release of virtex/gen83xx/gen5200 powerpc adaptations. Merged many different versions of new exception handling code to shared sources.

4 files changed, 420 insertions, 0 deletions

diff --git a/c/src/lib/libbsp/powerpc/gen83xx/include/bsp.h b/c/src/lib/libbsp/powerpc/gen83xx/include/bsp.h
new file mode 100644
index 0000000000..edd2c8a728
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/gen83xx/include/bsp.h
@@ -0,0 +1,220 @@
+/*===============================================================*\
+| Project: RTEMS generic MPC83xx BSP                              |
++-----------------------------------------------------------------+
+|                    Copyright (c) 2007                           |
+|                    Embedded Brains GmbH                         |
+|                    Obere Lagerstr. 30                           |
+|                    D-82178 Puchheim                             |
+|                    Germany                                      |
+|                    rtems@embedded-brains.de                     |
++-----------------------------------------------------------------+
+| The license and distribution terms for this file may be         |
+| found in the file LICENSE in this distribution or at            |
+|                                                                 |
+| http://www.rtems.com/license/LICENSE.                           |
+|                                                                 |
++-----------------------------------------------------------------+
+| this file contains board specific definitions                   |
+\*===============================================================*/
+
+#ifndef __GEN83xx_BSP_h
+#define __GEN83xx_BSP_h
+
+/*
+ * distinguish board characteristics
+ */
+/*
+ * for Freescale MPC8349 EAMDS
+ */
+#if defined(MPC8349EAMDS)
+/*
+ * two DUART channels supported
+ */
+#define GEN83xx_DUART_AVAIL_MASK 0x03
+
+/* we need the low level initialization in start.S*/
+#define NEED_LOW_LEVEL_INIT
+/*
+ * clocking infos
+ */
+#define BSP_CLKIN_FRQ 66000000L
+#define BSP_SYSPLL_MF 4 /* FIXME: derive from clock register */
+
+/*
+ * address range definitions
+ */
+/* ROM definitions (2 MB) */
+#define	ROM_START	0xFFE00000
+#define ROM_SIZE        0x00200000
+#define	ROM_END		(ROM_START+ROM_SIZE-1)
+#define	BOOT_START      ROM_START
+#define	BOOT_END        ROM_END
+
+/* SDRAM definitions (256 MB) */
+#define	RAM_START       0x00000000
+#define RAM_SIZE        0x10000000
+#define	RAM_END		(RAM_START+RAM_SIZE-1)
+
+/* working internal memory map base address */
+#define	IMMRBAR         0xE0000000
+
+/*
+ * working values for various registers, used in start/start.S
+ */
+/*
+ * Local Access Windows
+ * FIXME: decode bit settings 
+ */
+#define LBLAWBAR0_VAL  0xFE000000
+#define LBLAWAR0_VAL   0x80000016
+#define LBLAWBAR1_VAL  0xF8000000
+#define LBLAWAR1_VAL   0x8000000E
+#define LBLAWBAR2_VAL  0xF0000000
+#define LBLAWAR2_VAL   0x80000019
+#define DDRLAWBAR0_VAL 0x00000000
+#define DDRLAWAR0_VAL  0x8000001B
+/*
+ * Local Bus (Memory) Controller
+ * FIXME: decode bit settings 
+ */
+#define BR0_VAL 0xFE001001
+#define OR0_VAL 0xFF806FF7
+#define BR1_VAL 0xF8000801
+#define OR1_VAL 0xFFFFE8F0
+#define BR2_VAL 0xF0001861
+#define OR2_VAL 0xFC006901
+/*
+ * SDRAM registers
+ * FIXME: decode bit settings 
+ */
+#define MRPTR_VAL 0x20000000
+#define LSRT_VAL  0x32000000
+#define LSDMR_VAL 0x4062D733
+#define LCRR_VAL  0x80000004
+
+/*
+ * DDR-SDRAM registers
+ * FIXME: decode bit settings 
+ */
+#define CS2_BNDS_VAL                 0x00000007
+#define CS3_BNDS_VAL                 0x0008000F
+#define CS2_CONFIG_VAL               0x80000101
+#define CS3_CONFIG_VAL               0x80000101
+#define TIMING_CFG_1_VAL             0x36333321
+#define TIMING_CFG_2_VAL             0x00000800
+#define DDR_SDRAM_CFG_VAL            0xC2000000
+#define DDR_SDRAM_MODE_VAL           0x00000022
+#define DDR_SDRAM_INTTVL_VAL         0x045B0100
+#define DDR_SDRAM_CLK_CNTL_VAL       0x00000000
+
+#else
+#error "board type not defined"
+#endif
+
+#ifndef ASM
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "bspopts.h"
+
+#include <rtems.h>
+#include <rtems/console.h>
+#include <rtems/clockdrv.h>
+#include <bsp/irq.h>
+#include <bsp/vectors.h>
+
+/*
+ * Network driver configuration
+ */
+struct rtems_bsdnet_ifconfig;
+extern int rtems_mpc83xx_tsec_driver_attach_detach (struct rtems_bsdnet_ifconfig *config, int attaching);
+#define RTEMS_BSP_NETWORK_DRIVER_NAME	"tsec1"
+#define RTEMS_BSP_NETWORK_DRIVER_ATTACH	rtems_mpc83xx_tsec_driver_attach_detach
+
+/* miscellaneous stuff assumed to exist */
+
+extern rtems_configuration_table BSP_Configuration;
+/*
+ * We need to decide how much memory will be non-cacheable. This
+ * will mainly be memory that will be used in DMA (network and serial
+ * buffers).
+ */
+/*
+ *  Stuff for Time Test 27
+ */
+#define MUST_WAIT_FOR_INTERRUPT 0
+
+/*
+ *  Device Driver Table Entries
+ */
+
+/*
+ * NOTE: Use the standard Console driver entry
+ */
+#define BSP_UART1_MINOR 0
+#define BSP_UART2_MINOR 1
+
+/*
+ * NOTE: Use the standard Clock driver entry
+ */
+
+/*
+ * indicate, that BSP has no IDE driver
+ */
+#undef RTEMS_BSP_HAS_IDE_DRIVER
+
+/*
+ * How many libio files we want
+ */
+#define BSP_LIBIO_MAX_FDS       20
+
+/* misc macros */
+#define BSP_ARRAY_CNT(arr) (sizeof(arr)/sizeof(arr[0]))
+
+/* functions */
+
+void bsp_cleanup(void);
+
+/* console modes (only termios) */
+#ifdef  PRINTK_MINOR
+#undef  PRINTK_MINOR
+#endif
+#define PRINTK_MINOR BSP_UART1_MINOR
+
+#define SINGLE_CHAR_MODE
+#define UARTS_USE_TERMIOS_INT   1
+
+/*
+ *  Convert decrement value to tenths of microsecnds (used by
+ *  shared timer driver).
+ *
+ *    + CPU has a csb_clock bus,
+ *    + There are 4 bus cycles per click
+ *    + We return value in 1/10 microsecond units.
+ *   Modified following equation to integer equation to remove
+ *   floating point math.
+ *   (int) ((float)(_value) / ((XLB_CLOCK/1000000 * 0.1) / 4.0))
+ */
+#define BSP_CSB_CLK_FRQ (BSP_CLKIN_FRQ * BSP_SYSPLL_MF)
+#define BSP_Convert_decrementer( _value ) \
+  (int) (((_value) * 4000) / (BSP_CSB_CLK_FRQ/10000))
+
+/*
+ * Network driver configuration
+ */
+struct rtems_bsdnet_ifconfig;
+extern int BSP_tsec_attach(struct rtems_bsdnet_ifconfig *config,int attaching);
+#define RTEMS_BSP_NETWORK_DRIVER_NAME	"tsec1"
+#define RTEMS_BSP_NETWORK_DRIVER_ATTACH	BSP_tsec_attach
+
+#define RTEMS_BSP_NETWORK_DRIVER_NAME2	"tsec2"
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ASM */
+
+#endif /* GEN83xx */
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/include/bspopts.h.in b/c/src/lib/libbsp/powerpc/gen83xx/include/bspopts.h.in
new file mode 100644
index 0000000000..c24d8acab5
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/gen83xx/include/bspopts.h.in
@@ -0,0 +1,24 @@
+/* include/bspopts.h.in.  Generated from configure.ac by autoheader.  */
+
+/* If defined, the data cache will be enabled after address translation is
+   turned on. */
+#undef DATA_CACHE_ENABLE
+
+/* If defined, the instruction cache will be enabled after address translation
+   is turned on. */
+#undef INSTRUCTION_CACHE_ENABLE
+
+/* Define to the address where bug reports for this package should be sent. */
+#undef PACKAGE_BUGREPORT
+
+/* Define to the full name of this package. */
+#undef PACKAGE_NAME
+
+/* Define to the full name and version of this package. */
+#undef PACKAGE_STRING
+
+/* Define to the one symbol short name of this package. */
+#undef PACKAGE_TARNAME
+
+/* Define to the version of this package. */
+#undef PACKAGE_VERSION
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/include/coverhd.h b/c/src/lib/libbsp/powerpc/gen83xx/include/coverhd.h
new file mode 100644
index 0000000000..0ca6b55d64
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/gen83xx/include/coverhd.h
@@ -0,0 +1,113 @@
+/*  coverhd.h
+ *
+ *  This include file has defines to represent the overhead associated
+ *  with calling a particular directive from C.  These are used in the
+ *  Timing Test Suite to ignore the overhead required to pass arguments
+ *  to directives.  On some CPUs and/or target boards, this overhead
+ *  is significant and makes it difficult to distinguish internal
+ *  RTEMS execution time from that used to call the directive.
+ *  This file should be updated after running the C overhead timing
+ *  test.  Once this update has been performed, the RTEMS Time Test
+ *  Suite should be rebuilt to account for these overhead times in the
+ *  timing results.
+ *
+ *  NOTE:  If these are all zero, then the times reported include
+ *         all calling overhead including passing of arguments.
+ *
+ *  COPYRIGHT (c) 1989-1999.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.com/license/LICENSE.
+ *
+ *  coverhd.h,v 1.2 2003/09/04 18:52:27 joel Exp
+ */
+
+#ifndef __COVERHD_h
+#define __COVERHD_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE      0
+#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE        0
+#define CALLING_OVERHEAD_TASK_CREATE               0
+#define CALLING_OVERHEAD_TASK_IDENT                0
+#define CALLING_OVERHEAD_TASK_START                0
+#define CALLING_OVERHEAD_TASK_RESTART              0
+#define CALLING_OVERHEAD_TASK_DELETE               0
+#define CALLING_OVERHEAD_TASK_SUSPEND              0
+#define CALLING_OVERHEAD_TASK_RESUME               0
+#define CALLING_OVERHEAD_TASK_SET_PRIORITY         0
+#define CALLING_OVERHEAD_TASK_MODE                 0
+#define CALLING_OVERHEAD_TASK_GET_NOTE             0
+#define CALLING_OVERHEAD_TASK_SET_NOTE             0
+#define CALLING_OVERHEAD_TASK_WAKE_WHEN            2
+#define CALLING_OVERHEAD_TASK_WAKE_AFTER           0
+#define CALLING_OVERHEAD_INTERRUPT_CATCH           0
+#define CALLING_OVERHEAD_CLOCK_GET                 2
+#define CALLING_OVERHEAD_CLOCK_SET                 2
+#define CALLING_OVERHEAD_CLOCK_TICK                0
+
+#define CALLING_OVERHEAD_TIMER_CREATE              0
+#define CALLING_OVERHEAD_TIMER_IDENT               0
+#define CALLING_OVERHEAD_TIMER_DELETE              0
+#define CALLING_OVERHEAD_TIMER_FIRE_AFTER          0
+#define CALLING_OVERHEAD_TIMER_FIRE_WHEN           2
+#define CALLING_OVERHEAD_TIMER_RESET               0
+#define CALLING_OVERHEAD_TIMER_CANCEL              0
+#define CALLING_OVERHEAD_SEMAPHORE_CREATE          0
+#define CALLING_OVERHEAD_SEMAPHORE_IDENT           0
+#define CALLING_OVERHEAD_SEMAPHORE_DELETE          0
+#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN          0
+#define CALLING_OVERHEAD_SEMAPHORE_RELEASE         0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE      0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT       0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE      0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND        0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT      0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST   0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE     0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH       0
+
+#define CALLING_OVERHEAD_EVENT_SEND                0
+#define CALLING_OVERHEAD_EVENT_RECEIVE             0
+#define CALLING_OVERHEAD_SIGNAL_CATCH              0
+#define CALLING_OVERHEAD_SIGNAL_SEND               0
+#define CALLING_OVERHEAD_PARTITION_CREATE          0
+#define CALLING_OVERHEAD_PARTITION_IDENT           0
+#define CALLING_OVERHEAD_PARTITION_DELETE          0
+#define CALLING_OVERHEAD_PARTITION_GET_BUFFER      0
+#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER   0
+#define CALLING_OVERHEAD_REGION_CREATE             0
+#define CALLING_OVERHEAD_REGION_IDENT              0
+#define CALLING_OVERHEAD_REGION_DELETE             0
+#define CALLING_OVERHEAD_REGION_GET_SEGMENT        0
+#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT     0
+#define CALLING_OVERHEAD_PORT_CREATE               0
+#define CALLING_OVERHEAD_PORT_IDENT                0
+#define CALLING_OVERHEAD_PORT_DELETE               0
+#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 0
+#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 0
+
+#define CALLING_OVERHEAD_IO_INITIALIZE             0
+#define CALLING_OVERHEAD_IO_OPEN                   0
+#define CALLING_OVERHEAD_IO_CLOSE                  0
+#define CALLING_OVERHEAD_IO_READ                   0
+#define CALLING_OVERHEAD_IO_WRITE                  0
+#define CALLING_OVERHEAD_IO_CONTROL                0
+#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED      0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE     0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT      0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE     0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL     0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD     0
+#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE  0
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/c/src/lib/libbsp/powerpc/gen83xx/include/tm27.h b/c/src/lib/libbsp/powerpc/gen83xx/include/tm27.h
new file mode 100644
index 0000000000..2c85c3156e
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/gen83xx/include/tm27.h
@@ -0,0 +1,63 @@
+/*
+ *  tm27.h
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.com/license/LICENSE.
+ *
+ *  tm27.h,v 1.2 2004/04/23 04:47:38 ralf Exp
+ */
+
+#ifndef _RTEMS_TMTEST27
+#error "This is an RTEMS internal file you must not include directly."
+#endif
+
+#ifndef __tm27_h
+#define __tm27_h
+
+#include <bsp/irq.h>
+
+/*
+ *  Stuff for Time Test 27
+ */
+
+#define MUST_WAIT_FOR_INTERRUPT 1
+
+void nullFunc() {}
+
+static rtems_irq_connect_data clockIrqData = {BSP_DECREMENTER,
+                                              0,
+                                              (rtems_irq_enable)nullFunc,
+                                              (rtems_irq_disable)nullFunc,
+                                              (rtems_irq_is_enabled) nullFunc};
+void Install_tm27_vector(void (*_handler)())
+{
+  clockIrqData.hdl = _handler;
+  if (!BSP_install_rtems_irq_handler (&clockIrqData)) {
+        printk("Error installing clock interrupt handler!\n");
+        rtems_fatal_error_occurred(1);
+  }
+}
+
+#define Cause_tm27_intr()  \
+  do { \
+    uint32_t   _clicks = 8; \
+    asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
+  } while (0)
+
+#define Clear_tm27_intr() \
+  do { \
+    uint32_t   _clicks = 0xffffffff; \
+    asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
+  } while (0)
+
+#define Lower_tm27_intr() \
+  do { \
+    uint32_t   _msr = 0; \
+    _ISR_Set_level( 0 ); \
+    asm volatile( "mfmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
+    _msr |=  0x8002; \
+    asm volatile( "mtmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
+  } while (0)
+
+#endif