Converted to use shared

        exception and interrupt code.

3 files changed, 123 insertions, 114 deletions

diff --git a/c/src/lib/libbsp/powerpc/gen5200/startup/bspclean.c b/c/src/lib/libbsp/powerpc/gen5200/startup/bspclean.c
index fa9e0dd497..94311c4b68 100644
--- a/c/src/lib/libbsp/powerpc/gen5200/startup/bspclean.c
+++ b/c/src/lib/libbsp/powerpc/gen5200/startup/bspclean.c
@@ -14,7 +14,8 @@
 #include <rtems.h>
 #include <rtems/bspIo.h>
 #include <bsp.h>
-#include <mpc5200.h>
+#include <bsp/mpc5200.h>
+#include <bsp/bootcard.h>
 
 extern int mpc5200_uart_pollRead(int minor);
 
diff --git a/c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c b/c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c
index 7794185a6a..bbbc3bae79 100644
--- a/c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c
@@ -96,42 +96,31 @@
 
 #warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
 
-#include <bsp.h>
+#include <string.h>
 
 #include <rtems/libio.h>
 #include <rtems/libcsupport.h>
-#include <rtems/powerpc/powerpc.h>
 #include <rtems/score/thread.h>
 
-#include <rtems/bspIo.h>
-#include <libcpu/cpuIdent.h>
-#include <libcpu/spr.h>
-#include "../irq/irq.h"
+#include <libcpu/powerpc-utility.h>
+#include <libcpu/raw_exception.h>
 
-#include <string.h>
+#include <bsp.h>
+#include <bsp/bootcard.h>
+#include <bsp/ppc_exc_bspsupp.h>
+
+#include <bsp/irq.h>
 
 #if defined(HAS_UBOOT)
 bd_t *uboot_bdinfo_ptr = (bd_t *)1; /* will be overwritten from startup code */
 bd_t uboot_bdinfo_copy;             /* will be overwritten with copy of bdinfo */
 #endif
 
-SPR_RW(SPRG1)
-
-extern unsigned long intrStackPtr;
-
 /*
  *  Driver configuration parameters
  */
 uint32_t   bsp_clicks_per_usec;
 
-/*
- *  Use the shared implementations of the following routines.
- *  Look in rtems/c/src/lib/libbsp/shared/bsplibc.c.
- */
-void bsp_libc_init( void *, uint32_t, int );
-extern void initialize_exceptions(void);
-extern void cpu_init(void);
-
 void BSP_panic(char *s)
   {
   printk("%s PANIC %s\n",_RTEMS_version, s);
@@ -144,48 +133,23 @@ void _BSP_Fatal_error(unsigned int v)
   __asm__ __volatile ("sc");
   }
 
-/*
- *  Function:   bsp_pretasking_hook
- *  Created:    95/03/10
- *
- *  Description:
- *      BSP pretasking hook.  Called just before drivers are initialized.
- *      Used to setup libc and install any BSP extensions.
- *
- *  NOTES:
- *      Must not use libc (to do io) from here, since drivers are
- *      not yet initialized.
- *
- */
-
-void
-bsp_pretasking_hook(void)
+void bsp_get_work_area(
+  void   **work_area_start,
+  size_t  *work_area_size,
+  void   **heap_start,
+  size_t  *heap_size)
 {
-  /*
-   *  These are assigned addresses in the linkcmds file for the BSP. This
-   *  approach is better than having these defined as manifest constants and
-   *  compiled into the kernel, but it is still not ideal when dealing with
-   *  multiprocessor configuration in which each board as a different memory
-   *  map. A better place for defining these symbols might be the makefiles.
-   *  Consideration should also be given to developing an approach in which
-   *  the kernel and the application can be linked and burned into ROM
-   *  independently of each other.
-   */
-
-#if defined(HAS_UBOOT)
-    extern unsigned char _HeapStart;
-
-    bsp_libc_init( &_HeapStart, 
-		   uboot_bdinfo_ptr->bi_memstart 
-		   + uboot_bdinfo_ptr->bi_memsize 
-		   - (uint32_t)&_HeapStart
-		   , 0 );
-#else
-    extern unsigned char _HeapStart;
-    extern unsigned char _HeapEnd;
-
-    bsp_libc_init( &_HeapStart, &_HeapEnd - &_HeapStart, 0 );
-#endif
+#ifdef HAS_UBOOT
+  char *ram_end = (char *) uboot_bdinfo_ptr->bi_memstart +
+                                 uboot_bdinfo_ptr->bi_memsize;
+#else /* HAS_UBOOT */
+  char *ram_end = bsp_ram_end;
+#endif /* HAS_UBOOT */
+
+  *work_area_start = bsp_work_area_start;
+  *work_area_size = ram_end - bsp_work_area_start;
+  *heap_start = BSP_BOOTCARD_HEAP_USES_WORK_AREA;
+  *heap_size = BSP_BOOTCARD_HEAP_SIZE_DEFAULT;
 }
 
 void bsp_predriver_hook(void)
@@ -219,10 +183,8 @@ void bsp_predriver_hook(void)
 
 void bsp_start(void)
 {
-  extern void *_WorkspaceBase;
   ppc_cpu_id_t myCpu;
   ppc_cpu_revision_t myCpuRevision;
-  register unsigned char* intrStack;
 
   /*
    * Get CPU identification dynamically. Note that the get_ppc_cpu_type()
@@ -246,22 +208,8 @@ void bsp_start(void)
 
   cpu_init();
 
-  /*
-   * Initialize some SPRG registers related to irq handling
-   */
-
-  intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE);
-
-  _write_SPRG1((unsigned int)intrStack);
-
  bsp_clicks_per_usec    = (IPB_CLOCK/1000000);
 
- /*
-  * Install our own set of exception vectors
-  */
-
-  initialize_exceptions();
-
   /*
    * Enable instruction and data caches. Do not force writethrough mode.
    */
@@ -272,21 +220,18 @@ void bsp_start(void)
     rtems_cache_enable_data();
   #endif
 
-  /*
-   *  Need to "allocate" the memory for the RTEMS Workspace and
-   *  tell the RTEMS configuration where it is.  This memory is
-   *  not malloc'ed.  It is just "pulled from the air".
-   */
-  Configuration.work_space_start = (void *)&_WorkspaceBase;
-  #ifdef SHOW_MORE_INIT_SETTINGS
-    printk( "workspace=%p\n", Configuration.work_space_start );
-    printk( "workspace size=%d\n", Configuration.work_space_size );
-  #endif
-
-  /*
-   * Initalize RTEMS IRQ system
-   */
-  BSP_rtems_irq_mng_init(0);
+  /* Initialize exception handler */
+  ppc_exc_cache_wb_check = 0;
+  ppc_exc_initialize(
+    PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
+    (uint32_t) bsp_interrupt_stack_start,
+    (uint32_t) bsp_interrupt_stack_size
+  );
+
+  /* Initalize interrupt support */
+  if (bsp_interrupt_initialize() != RTEMS_SUCCESSFUL) {
+    BSP_panic( "Cannot intitialize interrupt support\n");
+  }
 
   /*
    *  If the BSP was built with IRQ benchmarking enabled,
diff --git a/c/src/lib/libbsp/powerpc/gen5200/startup/cpuinit.c b/c/src/lib/libbsp/powerpc/gen5200/startup/cpuinit.c
index 19a22f8619..ed78e7d247 100644
--- a/c/src/lib/libbsp/powerpc/gen5200/startup/cpuinit.c
+++ b/c/src/lib/libbsp/powerpc/gen5200/startup/cpuinit.c
@@ -117,30 +117,73 @@ void cpu_init_bsp(void)
 {
   BAT dbat;
 
-  calc_dbat_regvals(&dbat,RAM_START,RAM_SIZE,1,0,0,0,BPP_RW);
+  calc_dbat_regvals(
+    &dbat,
+    (uint32_t) bsp_ram_start,
+    (uint32_t) bsp_ram_size,
+    true,
+    false,
+    false,
+    false,
+    BPP_RW
+  );
   SET_DBAT(0,dbat.batu,dbat.batl);
 
-  calc_dbat_regvals(&dbat,ROM_START,ROM_SIZE,1,0,0,0,BPP_RX);
+  calc_dbat_regvals(
+    &dbat,
+    (uint32_t) bsp_rom_start,
+    (uint32_t) bsp_rom_size,
+    true,
+    false,
+    false,
+    false,
+    BPP_RX
+  );
   SET_DBAT(1,dbat.batu,dbat.batl);
 
-  calc_dbat_regvals(&dbat,MBAR,128*1024,1,1,1,1,BPP_RW);
+  calc_dbat_regvals(
+    &dbat,
+    (uint32_t) MBAR,
+    128 * 1024,
+    false,
+    true,
+    false,
+    true,
+    BPP_RW
+  );
   SET_DBAT(2,dbat.batu,dbat.batl);
 
-  calc_dbat_regvals(&dbat,DPRAM_START,128*1024,1,1,1,1,BPP_RW);
+  calc_dbat_regvals(
+    &dbat,
+    (uint32_t) bsp_dpram_start,
+    128 * 1024,
+    false,
+    true,
+    false,
+    true,
+    BPP_RW
+  );
   SET_DBAT(3,dbat.batu,dbat.batl);
 }
 #elif defined (HAS_UBOOT)
 void cpu_init_bsp(void)
 {
   BAT dbat;
+  uint32_t start = 0;
   
   /*
    * Program BAT0 for RAM
    */
-  calc_dbat_regvals(&dbat,
-		    uboot_bdinfo_ptr->bi_memstart,
-		    uboot_bdinfo_ptr->bi_memsize,
-		    1,0,0,0,BPP_RW);
+  calc_dbat_regvals(
+    &dbat,
+    uboot_bdinfo_ptr->bi_memstart,
+    uboot_bdinfo_ptr->bi_memsize,
+    true,
+    false,
+    false,
+    false,
+    BPP_RW
+  );
   SET_DBAT(0,dbat.batu,dbat.batl);
 
   /*
@@ -150,33 +193,53 @@ void cpu_init_bsp(void)
    * U-Boot that lies about the starting address of Flash.  This check
    * corrects that.
    */
-  if ( (uboot_bdinfo_ptr->bi_flashstart + uboot_bdinfo_ptr->bi_flashsize) <
-	uboot_bdinfo_ptr->bi_flashstart ) {
-    uint32_t start = 0 - uboot_bdinfo_ptr->bi_flashsize;
-    calc_dbat_regvals(&dbat,
-		      start, uboot_bdinfo_ptr->bi_flashsize, 1,0,0,0,BPP_RX);
+  if ((uboot_bdinfo_ptr->bi_flashstart + uboot_bdinfo_ptr->bi_flashsize)
+    < uboot_bdinfo_ptr->bi_flashstart) {
+    start = 0 - uboot_bdinfo_ptr->bi_flashsize;
   } else {
-    calc_dbat_regvals(&dbat,
-		      uboot_bdinfo_ptr->bi_flashstart,
-		      uboot_bdinfo_ptr->bi_flashsize,
-		      1,0,0,0,BPP_RX);
+    start = uboot_bdinfo_ptr->bi_flashstart;
   }
+  calc_dbat_regvals(
+    &dbat,
+    start,
+    uboot_bdinfo_ptr->bi_flashsize,
+    true,
+    false,
+    false,
+    false,
+    BPP_RX
+  );
   SET_DBAT(1,dbat.batu,dbat.batl);
 
   /*
    * Program BAT2 for the MBAR
    */
-  calc_dbat_regvals(&dbat,MBAR,128*1024,1,1,1,1,BPP_RW);
+  calc_dbat_regvals(
+    &dbat,
+    (uint32_t) MBAR,
+    128 * 1024,
+    false,
+    true,
+    false,
+    true,
+    BPP_RW
+  );
   SET_DBAT(2,dbat.batu,dbat.batl);
 
   /*
    * If there is SRAM, program BAT3 for that memory
    */
   if (uboot_bdinfo_ptr->bi_sramsize != 0) {
-    calc_dbat_regvals(&dbat,
-		      uboot_bdinfo_ptr->bi_sramstart,
-		      uboot_bdinfo_ptr->bi_sramsize,
-		      0,1,1,1,BPP_RW);
+    calc_dbat_regvals(
+      &dbat,
+      uboot_bdinfo_ptr->bi_sramstart,
+      uboot_bdinfo_ptr->bi_sramsize,
+      false,
+      true,
+      true,
+      true,
+      BPP_RW
+    );
     SET_DBAT(3,dbat.batu,dbat.batl);
   }
 }