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authorJennifer Averett <Jennifer.Averett@OARcorp.com>2005-04-28 14:05:14 +0000
committerJennifer Averett <Jennifer.Averett@OARcorp.com>2005-04-28 14:05:14 +0000
commit0329aae1b2cd18215ac8d19cbb1a69f502eddd71 (patch)
tree84188ee210ca807c9af4393c93684ff491a789ee /c/src/lib/libbsp/powerpc/ep1a/vme/vmeconfig.c
parent2005-04-27 Ralf Corsepius <ralf.corsepius@rtems.org> (diff)
downloadrtems-0329aae1b2cd18215ac8d19cbb1a69f502eddd71.tar.bz2
2005-04-28 Jennifer Averett <jennifer.averett@oarcorp.com>
* acinclude.m4: Initial release of ep1a bsp * ep1a/Makefile.am, ep1a/bsp_specs, ep1a/configure.ac, ep1a/console/alloc360.c, ep1a/console/console.c, ep1a/console/console.h, ep1a/console/init68360.c, ep1a/console/m68360.h, ep1a/console/mc68360_scc.c, ep1a/console/ns16550cfg.c, ep1a/console/ns16550cfg.h, ep1a/console/rsPMCQ1.c, ep1a/console/rsPMCQ1.h, ep1a/include/bsp.h, ep1a/irq/irq.c, ep1a/irq/irq_init.c, ep1a/pci/no_host_bridge.c, ep1a/start/start.S, ep1a/startup/bspstart.c, ep1a/startup/linkcmds, ep1a/vme/vmeconfig.c: New files.
Diffstat (limited to '')
-rw-r--r--c/src/lib/libbsp/powerpc/ep1a/vme/vmeconfig.c142
1 files changed, 142 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/powerpc/ep1a/vme/vmeconfig.c b/c/src/lib/libbsp/powerpc/ep1a/vme/vmeconfig.c
new file mode 100644
index 0000000000..4f0c633526
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/ep1a/vme/vmeconfig.c
@@ -0,0 +1,142 @@
+/*
+ * COPYRIGHT (c) 1989-1999.
+ * On-Line Applications Research Corporation (OAR).
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ *
+ * $Id$
+ */
+
+/* Standard VME bridge configuration for VGM type boards */
+
+/* Author: Till Straumann <strauman@slac.stanford.edu>, 3/2002 */
+
+#include <bsp.h>
+#include <bsp/VME.h>
+#include <bsp/irq.h>
+#include <libcpu/bat.h>
+#include <libcpu/spr.h>
+#include <bsp/motorola.h>
+
+/* Use a weak alias for the VME configuration.
+ * This permits individual applications to override
+ * this routine.
+ * They may even create an 'empty'
+ *
+ * void BSP_vme_config(void) {}
+ *
+ * which will avoid linking in the Universe driver
+ * at all :-).
+ */
+
+void BSP_vme_config(void) __attribute__ (( weak, alias("__BSP_default_vme_config") ));
+
+SPR_RO(DBAT0U)
+
+extern unsigned32 VME_Slot1;
+
+void
+__BSP_default_vme_config(void)
+{
+union {
+ struct _BATU bat;
+ unsigned long batbits;
+} dbat0u;
+
+ vmeUniverseInit();
+ vmeUniverseReset();
+
+ /* setup a PCI area to map the VME bus */
+
+ dbat0u.batbits = _read_DBAT0U();
+
+ /* map VME address ranges */
+ vmeUniverseMasterPortCfg(
+ 0,
+ VME_AM_EXT_SUP_DATA,
+ _VME_A32_WIN0_ON_VME,
+ _VME_A32_WIN0_ON_PCI,
+ 0x0F000000);
+ vmeUniverseMasterPortCfg(
+ 1,
+ VME_AM_STD_SUP_DATA,
+ 0x00000000,
+ _VME_A24_ON_PCI,
+ 0x00ff0000);
+ vmeUniverseMasterPortCfg(
+ 2,
+ VME_AM_SUP_SHORT_IO,
+ 0x00000000,
+ _VME_A16_ON_PCI,
+ 0x00010000);
+
+#ifdef _VME_DRAM_OFFSET
+#if 0
+ if (VME_Slot1){
+ /* map our memory to VME */
+printk("vmeUniverseSlavePortCfg length of 0x%x\n", BSP_mem_size);
+ vmeUniverseSlavePortCfg(
+ 0,
+ VME_AM_EXT_SUP_DATA,
+ _VME_DRAM_32_OFFSET1,
+ PCI_DRAM_OFFSET,
+ BSP_mem_size);
+printk("vmeUniverseSlavePortCfg length of 0x%x\n", _VME_A24_SIZE);
+ vmeUniverseSlavePortCfg(
+ 1,
+ VME_AM_STD_SUP_DATA,
+ _VME_DRAM_24_OFFSET1,
+ PCI_DRAM_OFFSET,
+ _VME_A24_SIZE);
+printk("vmeUniverseSlavePortCfg length of 0x%x\n", _VME_A16_SIZE);
+ vmeUniverseSlavePortCfg(
+ 2,
+ VME_AM_SUP_SHORT_IO,
+ _VME_DRAM_16_OFFSET1,
+ PCI_DRAM_OFFSET,
+ _VME_A16_SIZE);
+ }
+ else {
+printk("vmeUniverseSlavePortCfg length of 0x%x\n", BSP_mem_size);
+ vmeUniverseSlavePortCfg(
+ 0,
+ VME_AM_EXT_SUP_DATA,
+ _VME_DRAM_32_OFFSET2,
+ PCI_DRAM_OFFSET,
+ BSP_mem_size);
+printk("vmeUniverseSlavePortCfg length of 0x%x\n", _VME_A24_SIZE);
+ vmeUniverseSlavePortCfg(
+ 1,
+ VME_AM_STD_SUP_DATA,
+ _VME_DRAM_24_OFFSET2,
+ PCI_DRAM_OFFSET,
+ _VME_A24_SIZE);
+printk("vmeUniverseSlavePortCfg length of 0x%x\n", _VME_A16_SIZE);
+ vmeUniverseSlavePortCfg(
+ 2,
+ VME_AM_SUP_SHORT_IO,
+ _VME_DRAM_16_OFFSET2,
+ PCI_DRAM_OFFSET,
+ _VME_A16_SIZE);
+ }
+#endif
+
+ /* make sure the host bridge PCI master is enabled */
+ vmeUniverseWriteReg(
+ vmeUniverseReadReg(UNIV_REGOFF_PCI_CSR) | UNIV_PCI_CSR_BM,
+ UNIV_REGOFF_PCI_CSR);
+#endif
+
+
+ /* stdio is not yet initialized; the driver will revert to printk */
+ vmeUniverseMasterPortsShow(0);
+ vmeUniverseSlavePortsShow(0);
+
+ /* install the VME insterrupt manager */
+ vmeUniverseInstallIrqMgr(0,5,1,6);
+ if (vmeUniverse0PciIrqLine<0)
+ BSP_panic("Unable to get interrupt line info from PCI config");
+ _BSP_vme_bridge_irq=BSP_PCI_IRQ_LOWEST_OFFSET+vmeUniverse0PciIrqLine;
+}