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authorThomas Doerfler <Thomas.Doerfler@embedded-brains.de>2008-07-11 10:01:37 +0000
committerThomas Doerfler <Thomas.Doerfler@embedded-brains.de>2008-07-11 10:01:37 +0000
commita86f3aac965e39414f19d7e67ed50400583cd598 (patch)
tree24692c56d9b7480af4482d4ac5930d099c3396b1 /c/src/lib/libbsp/powerpc/ep1a/startup
parentadded variant to gen68360 BSP (diff)
downloadrtems-a86f3aac965e39414f19d7e67ed50400583cd598.tar.bz2
adapted powerpc BSPs to new exception code
Diffstat (limited to 'c/src/lib/libbsp/powerpc/ep1a/startup')
-rw-r--r--c/src/lib/libbsp/powerpc/ep1a/startup/bspstart.c38
1 files changed, 13 insertions, 25 deletions
diff --git a/c/src/lib/libbsp/powerpc/ep1a/startup/bspstart.c b/c/src/lib/libbsp/powerpc/ep1a/startup/bspstart.c
index 798bceae68..b39b1ff391 100644
--- a/c/src/lib/libbsp/powerpc/ep1a/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/ep1a/startup/bspstart.c
@@ -14,6 +14,8 @@
* $Id$
*/
+#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
+
#include <string.h>
#include <rtems/libio.h>
@@ -45,7 +47,6 @@ unsigned int rsPMCQ1Init();
uint32_t bsp_clicks_per_usec;
-SPR_RW(SPRG0)
SPR_RW(SPRG1)
uint8_t LightIdx = 0;
@@ -327,8 +328,8 @@ void Read_ep1a_config_registers( ppc_cpu_id_t myCpu ) {
void bsp_start( void )
{
unsigned char *stack;
- register uint32_t intrStack;
- register uint32_t *intrStackPtr;
+ uint32_t intrStackStart;
+ uint32_t intrStackSize;
unsigned char *work_space_start;
ppc_cpu_id_t myCpu;
ppc_cpu_revision_t myCpuRevision;
@@ -373,32 +374,19 @@ ShowBATS();
*((uint32_t *)stack) = 0;
/*
- * Initialize the interrupt related settings
- * SPRG1 = software managed IRQ stack
- *
- * This could be done latter (e.g in IRQ_INIT) but it helps to understand
- * some settings below...
+ * Initialize the interrupt related settings.
*/
- intrStack = ((uint32_t) __rtems_end) +
- INIT_STACK_SIZE + rtems_configuration_get_interrupt_stack_size() -
- PPC_MINIMUM_STACK_FRAME_SIZE;
-
- /* make sure it's properly aligned */
- intrStack &= ~(CPU_STACK_ALIGNMENT-1);
-
- /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
- intrStackPtr = (uint32_t*) intrStack;
- *intrStackPtr = 0;
-
- _write_SPRG1((unsigned int)intrStack);
-
- /* signal them that we have fixed PR288 - eventually, this should go away */
- _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
+ intrStackStart = (uint32_t) __rtems_end + INIT_STACK_SIZE;
+ intrStackSize = rtems_configuration_get_interrupt_stack_size();
/*
- * Initialize default raw exception hanlders. See vectors/vectors_init.c
+ * Initialize default raw exception hanlders.
*/
- initialize_exceptions();
+ ppc_exc_initialize(
+ PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
+ intrStackStart,
+ intrStackSize
+ );
/*
* Init MMU block address translation to enable hardware