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authorJoel Sherrill <joel.sherrill@OARcorp.com>1998-08-14 15:24:09 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>1998-08-14 15:24:09 +0000
commit7ba7108101eb14151ea1aed54365c7d376a92493 (patch)
tree2ada4614b5de69860a6571356a7186f5b222a9c4 /c/src/lib/libbsp/powerpc/dmv177/include/bsp.h
parentAdded information on caching. (diff)
downloadrtems-7ba7108101eb14151ea1aed54365c7d376a92493.tar.bz2
Changed tm27 clear interrupt macro on all PPC BSPs except the papyrus.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/dmv177/include/bsp.h')
-rw-r--r--c/src/lib/libbsp/powerpc/dmv177/include/bsp.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/powerpc/dmv177/include/bsp.h b/c/src/lib/libbsp/powerpc/dmv177/include/bsp.h
index 5bb9e4c1ce..f99211f8d3 100644
--- a/c/src/lib/libbsp/powerpc/dmv177/include/bsp.h
+++ b/c/src/lib/libbsp/powerpc/dmv177/include/bsp.h
@@ -81,6 +81,11 @@ extern "C" {
#define Clear_tm27_intr() \
do { \
unsigned32 _clicks = 0xffffffff; \
+ unsigned32 _msr = 0; \
+ _ISR_Set_level( 0 ); \
+ asm volatile( "mfmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
+ _msr &= ~0x8000; \
+ asm volatile( "mtmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
} while (0)