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author | Jennifer Averett <jennifer.averett@OARcorp.com> | 2012-04-04 08:39:46 -0500 |
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committer | Joel Sherrill <joel.sherrill@oarcorp.com> | 2012-04-04 08:43:08 -0500 |
commit | 0c0181dee26d64835f0cd4f47ef81f681ea553e8 (patch) | |
tree | 2f8aef096fa1ed345176328b805d9bb8394fd2f8 /c/src/lib/libbsp/mips/shared/irq/interruptmask.c | |
parent | bsp/mpc55xx: Add and use chip features (diff) | |
download | rtems-0c0181dee26d64835f0cd4f47ef81f681ea553e8.tar.bz2 |
PR 1993 - Convert MIPS to PIC IRQ model
Diffstat (limited to '')
-rw-r--r-- | c/src/lib/libbsp/mips/shared/irq/interruptmask.c | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/mips/shared/irq/interruptmask.c b/c/src/lib/libbsp/mips/shared/irq/interruptmask.c new file mode 100644 index 0000000000..f4e384180b --- /dev/null +++ b/c/src/lib/libbsp/mips/shared/irq/interruptmask.c @@ -0,0 +1,31 @@ +/** + * @file + * + */ + +/* + * COPYRIGHT (c) 1989-2012. + * On-Line Applications Research Corporation (OAR). + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.com/license/LICENSE. + * + * $Id$ + */ + +#include <rtems.h> + +/* + * This function returns a mask value which is used to select the bits + * in the processor status register that can be set to enable interrupts. + * The mask value should not include the 2 software interrupt enable bits. + */ + +uint32_t mips_interrupt_mask( void ) +{ + uint32_t interrupt_mask; + + interrupt_mask = 0x0000fc00; + return(interrupt_mask); +} |