diff options
| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-01-12 13:28:27 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-01-12 13:28:27 +0000 |
| commit | 4d6b3b66e1001e60dc2cf11ad76638da6b0d10bb (patch) | |
| tree | 2cf6db30201f75be3281660cdf35c47a292c2f7c /c/src/lib/libbsp/mips/jmr3904/timer/timer.c | |
| parent | changed version to ss-20010109 (diff) | |
| download | rtems-4d6b3b66e1001e60dc2cf11ad76638da6b0d10bb.tar.bz2 | |
2001-01-12 Joel Sherrill <joel@OARcorp.com>
* include/bsp.h, timer/timer.c: Updated so timer appears to
work and support tm27. I would prefer to time a software
interrupt rather than an use an extra timer though.
Diffstat (limited to '')
| -rw-r--r-- | c/src/lib/libbsp/mips/jmr3904/timer/timer.c | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/c/src/lib/libbsp/mips/jmr3904/timer/timer.c b/c/src/lib/libbsp/mips/jmr3904/timer/timer.c index f2fddab5ea..5a4375fe5e 100644 --- a/c/src/lib/libbsp/mips/jmr3904/timer/timer.c +++ b/c/src/lib/libbsp/mips/jmr3904/timer/timer.c @@ -26,21 +26,21 @@ void Timer_initialize() * it run long enough and accurate enough not to require an interrupt. * but if it ever does generate an interrupt, we will simply fault. * - * NOTE: This is identical to the clock driver initialization + * NOTE: This is similar to the clock driver initialization * with the exception that the divider is disabled and * the compare register is set to the maximum value. */ - TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_CCDR, 0x3 ); - TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_TRR, 0x0 ); - TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_CPRA, 0xFFFFFFFF ); - TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_TISR, 0x00 ); - TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_ITMR, 0x8001 ); - TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_TCR, 0xc0 ); - *((volatile unsigned32 *) 0xFFFFC01C) = 0x00000700; + TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_CCDR, 0x3 ); + TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_TRR, 0x0 ); + TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_CPRA, 0xFFFFFFFF ); + TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_TISR, 0x00 ); + TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_ITMR, 0x8001 ); + TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_TCR, 0x20 ); + TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_TCR, 0xe0 ); } -#define AVG_OVERHEAD 0 /* It typically takes 24 instructions */ +#define AVG_OVERHEAD 0 /* It typically takes N instructions */ /* to start/stop the timer. */ #define LEAST_VALID 1 /* Don't trust a value lower than this */ /* tx39 simulator can count instructions. :) */ @@ -49,8 +49,8 @@ int Read_timer() { rtems_unsigned32 total; - TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_TCR, 0x03 ); - total = TX3904_TIMER_READ( TX3904_TIMER0_BASE, TX3904_TIMER_TRR ); + TX3904_TIMER_WRITE( TX3904_TIMER1_BASE, TX3904_TIMER_TCR, 0x03 ); + total = TX3904_TIMER_READ( TX3904_TIMER1_BASE, TX3904_TIMER_TRR ); if ( Timer_driver_Find_average_overhead == 1 ) return total; /* in one microsecond units */ |