2002-02-27 Greg Menke <gregory.menke@gsfc.nasa.gov>

	* start/start.S: Added kseg1 test to enable cache flush code
	* bsp_specs: Added -qnostartfile to disable including bsp's start.o
	* startup/bspstart.c: Made clear_cache actually work, tweaked cpu
	init to only turn on whats needed.
	* startup/gdb-support.c: Added calls to uart 2 for gdb stub I/O and
	a handy init function.

3 files changed, 196 insertions, 87 deletions

diff --git a/c/src/lib/libbsp/mips/genmongoosev/startup/bspstart.c b/c/src/lib/libbsp/mips/genmongoosev/startup/bspstart.c
index 06eb3d6652..15f4922d9f 100644
--- a/c/src/lib/libbsp/mips/genmongoosev/startup/bspstart.c
+++ b/c/src/lib/libbsp/mips/genmongoosev/startup/bspstart.c
@@ -27,6 +27,7 @@
 
 
 
+
 /*
  *  The original table from the application and our copy of it with
  *  some changes.
@@ -87,69 +88,88 @@ void bsp_pretasking_hook(void)
 
 void bsp_start( void )
 {
-  extern int WorkspaceBase;
-  extern void mips_install_isr_entries();
-
-  /* Configure Number of Register Caches */
-
-  Cpu_table.pretasking_hook = bsp_pretasking_hook;  /* init libc, etc. */
-  Cpu_table.postdriver_hook = bsp_postdriver_hook;
-  Cpu_table.interrupt_stack_size = 4096;
-
-  /* HACK -- tied to value linkcmds */
-  if ( BSP_Configuration.work_space_size > (4096*1024) )
-     _sys_exit( 1 );
-
-  BSP_Configuration.work_space_start = (void *) &WorkspaceBase;
-
-  /* mask off any interrupts */
-  MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_FUNCTION_INTERRUPT_MASK_REGISTER, 0 );
-
-  MONGOOSEV_WRITE( MONGOOSEV_WATCHDOG, 0xA0 );
-
-  /* reset the config register & clear any pending peripheral interrupts */
-  MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_COMMAND_REGISTER, 0 );
-  MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_COMMAND_REGISTER, MONGOOSEV_UART_CMD_RESET_BOTH_PORTS );
-  MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_COMMAND_REGISTER, 0 );
-
-  /* reset both timers */
-  MONGOOSEV_WRITE_REGISTER( MONGOOSEV_TIMER1_BASE, MONGOOSEV_TIMER_INITIAL_COUNTER_REGISTER, 0xffffffff );
-  MONGOOSEV_WRITE_REGISTER( MONGOOSEV_TIMER1_BASE, MONGOOSEV_TIMER_CONTROL_REGISTER, 0);
+   extern void _sys_exit(int);
+   extern int WorkspaceBase;
+   extern void mips_install_isr_entries();
+   extern void mips_gdb_stub_install(void);
+   
+   /* Configure Number of Register Caches */
+
+   Cpu_table.pretasking_hook = bsp_pretasking_hook;  /* init libc, etc. */
+   Cpu_table.postdriver_hook = bsp_postdriver_hook;
+   Cpu_table.interrupt_stack_size = 4096;
+
+   /* HACK -- tied to value linkcmds */
+   if ( BSP_Configuration.work_space_size > (4096*1024) )
+      _sys_exit( 1 );
+
+   BSP_Configuration.work_space_start = (void *) &WorkspaceBase;
+
+   /* mask off any interrupts */
+   MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_FUNCTION_INTERRUPT_MASK_REGISTER, 0 );
+
+   /* reset the config register & clear any pending peripheral interrupts */
+   MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_COMMAND_REGISTER, 0 );
+   MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_COMMAND_REGISTER, MONGOOSEV_UART_CMD_RESET_BOTH_PORTS );
+   MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_COMMAND_REGISTER, 0 );
+
+   /* reset both timers */
+   MONGOOSEV_WRITE_REGISTER( MONGOOSEV_TIMER1_BASE, MONGOOSEV_TIMER_INITIAL_COUNTER_REGISTER, 0xffffffff );
+   MONGOOSEV_WRITE_REGISTER( MONGOOSEV_TIMER1_BASE, MONGOOSEV_TIMER_CONTROL_REGISTER, 0);
+
+   MONGOOSEV_WRITE_REGISTER( MONGOOSEV_TIMER2_BASE, MONGOOSEV_TIMER_INITIAL_COUNTER_REGISTER, 0xffffffff );
+   MONGOOSEV_WRITE_REGISTER( MONGOOSEV_TIMER2_BASE, MONGOOSEV_TIMER_CONTROL_REGISTER, 0);
+
+   /* clear any pending interrupts */
+   MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_STATUS_REGISTER, 0xffffffff );
+
+   /* clear any writable bits in the cause register */
+   mips_set_cause( 0 );
+
+   /* set interrupt mask, but globally off. */
+
+   /*
+   **  Bit 15 | Bit 14 | Bit 13 | Bit 12 | Bit 11 | Bit 10 | Bit  9 | Bit  8 |
+   **  periph | unused |  FPU   | unused | timer2 | timer1 | swint1 | swint2 |
+   **  extern |        |        |        |        |        |        |        |
+   **
+   **    1        0        1        0        0        1        0        0
+   **
+   **    0x8C00   Enable only internal Mongoose V timers.
+   **    0xA400   Enable Peripherial ints, FPU and timer1
+   **    0x0400   Timer1 only
+   */
+
+   /* mips_set_sr( (SR_CU0 | SR_CU1 | 0xA400) ); */
+
+   /* to start up, only enable coprocessor 0 & timer int. per-task
+   ** processor settings will be applied as they are created, this 
+   ** is just to configure the processor for startup
+   */
+   mips_set_sr( (SR_CU0 | 0x400) );
+
+   mips_install_isr_entries();
+}
 
-  MONGOOSEV_WRITE_REGISTER( MONGOOSEV_TIMER2_BASE, MONGOOSEV_TIMER_INITIAL_COUNTER_REGISTER, 0xffffffff );
-  MONGOOSEV_WRITE_REGISTER( MONGOOSEV_TIMER2_BASE, MONGOOSEV_TIMER_CONTROL_REGISTER, 0);
 
-  /* clear any pending interrupts */
-  MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_STATUS_REGISTER, 0xffffffff );
 
-  /* clear any writable bits in the cause register */
-  mips_set_cause( 0 );
 
-  /* set interrupt mask, but globally off. */
+void clear_cache( void )
+{
+   extern void promCopyIcacheFlush(void);       /* from start.S */
+   extern void promCopyDcacheFlush(void);
 
-  /*
-  **  Bit 15 | Bit 14 | Bit 13 | Bit 12 | Bit 11 | Bit 10 | Bit  9 | Bit  8 |
-  **  periph | unused |  FPU   | unused | timer2 | timer1 | swint1 | swint2 |
-  **  extern |        |        |        |        |        |        |        |
-  **
-  **    1        0        1        0        0        1        0        0
-  **
-  **    0x8C00   Enable only internal Mongoose V timers.
-  **    0xA400   Enable Peripherial ints, FPU and timer1
-  */
+   promCopyIcacheFlush();
+   promCopyDcacheFlush();
+}
 
-  mips_set_sr( (SR_CU0 | SR_CU1 | 0xA400) );
 
-  mips_install_isr_entries();
-}
 
 
-void clear_cache( void *address, size_t n )
-{
-}
+/*
+ 
+//Structure filled in by get_mem_info.
 
-/* Structure filled in by get_mem_info.  Only the size field is
-   actually used (to clear bss), so the others aren't even filled in.  */
 
 struct s_mem
 {
@@ -159,11 +179,14 @@ struct s_mem
 };
 
 
-
 extern unsigned32 _RamSize;
 
 void get_mem_info ( struct s_mem *mem )
 {
    mem->size = (unsigned32)&_RamSize;
+   mem->icsize = MONGOOSEV_IC_SIZE;
+   mem->dcsize = MONGOOSEV_DC_SIZE;
 }
 
+*/
+
diff --git a/c/src/lib/libbsp/mips/genmongoosev/startup/gdb-support.c b/c/src/lib/libbsp/mips/genmongoosev/startup/gdb-support.c
index b27c0ab99e..5aebbb936a 100644
--- a/c/src/lib/libbsp/mips/genmongoosev/startup/gdb-support.c
+++ b/c/src/lib/libbsp/mips/genmongoosev/startup/gdb-support.c
@@ -13,16 +13,103 @@
 
 #include <rtems.h>
 #include <rtems/bspIo.h>
+#include <libcpu/mongoose-v.h>
+
+#include <rtems/libio.h>
+
+
+
+/*
+
+We're going to call right down into the uart driver because we're
+operating within an exception.  if things are broken because something
+bad happened, this may be our last chance to debug before RTEMS goes
+mad, so we won't rely on the I/O subsystem to be operating.  This is a
+little messy, but at least we're not talking right to the hardware.
+
+*/
+
+extern int mg5uart_set_attributes(int minor,const struct termios *t);
+extern int mg5uart_open(int major,int minor, void *arg);
+extern int mg5uart_close(int major,int minor, void *arg);
+extern void mg5uart_write_polled(int minor, char c );
+extern int mg5uart_inbyte_nonblocking_polled(int minor);
+
+
+extern void mips_gdb_stub_install(void);
+
+
+static int debugUartEnabled = 0;
+
+
+
+int mg5rdbgOpenGDBuart(int breakoninit)
+{
+   struct termios t;
+   memset(&t,0,sizeof(struct termios));
+
+   if( mg5uart_open(0,1,NULL) != RTEMS_SUCCESSFUL )
+   {
+      printf("gdbstub: Failed to open UART port 2\n");
+      return -1;
+   }
+
+   t.c_cflag |= B19200;
+   t.c_cflag |= CS8;
+   if( mg5uart_set_attributes(1,&t) != 0 )
+   {
+      printf("gdbstub: Failed to configure UART 2 for 19200N82\n");
+      return -1;
+   }
+
+   debugUartEnabled  = -1;
+
+   /* set up vectoring for gdb */
+   mips_gdb_stub_install();
+
+   printf("gdbstub: Remote GDB stub listening on UART 2 at 19200N82\n");
+
+   if( breakoninit ) 
+   {
+      /* 
+         break to gdb.  We'll wait there for the operator to get their gdb
+         going, then they can 'continue' or do whatever.
+      */
+      mips_break(0);
+   }
+
+   printf("gdbstub: User code running\n");
+
+   return RTEMS_SUCCESSFUL;
+}
+
+
+void mg5rdbgCloseGDBuart(void)
+{
+   mg5uart_close(0,1,NULL);
+   debugUartEnabled  = 0;
+}
+
+
 
 
 char getDebugChar (void)
 {
-  return 0;
+   if( debugUartEnabled )
+   {
+      int rv;
+
+      while( (rv = mg5uart_inbyte_nonblocking_polled(1)) < 0 );
+      return (char)rv;
+   }
+
+   return 0;
 }
 
+
 void putDebugChar (char c)
 {
-  /* big hack */
-  printk( "%c" );
+   if( debugUartEnabled )
+      return mg5uart_write_polled(1,c);
 }
 
diff --git a/c/src/lib/libbsp/mips/genmongoosev/startup/linkcmds b/c/src/lib/libbsp/mips/genmongoosev/startup/linkcmds
index ed9b3116d4..79f888b2bc 100644
--- a/c/src/lib/libbsp/mips/genmongoosev/startup/linkcmds
+++ b/c/src/lib/libbsp/mips/genmongoosev/startup/linkcmds
@@ -21,7 +21,6 @@ ClockRate = DEFINED(ClockRate) ? ClockRate : 12000000;
 
 MEMORY
 {
-   romstore : ORIGIN = 0xbfc40000, LENGTH = 4M
    ram      : ORIGIN = 0x80020000, LENGTH = 4M
 }
 
@@ -42,7 +41,8 @@ SECTIONS
       *(.rel.dyn)
       PROVIDE (__runtime_reloc_stop = .);
       *(.fini)
-    } >ram  AT>romstore
+      *(.gcc_except_table)
+    } >ram  
 
   .ctors    : 
   {
@@ -66,7 +66,7 @@ SECTIONS
     KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
     KEEP (*(SORT(.ctors.*)))
     KEEP (*(.ctors))
-  } >ram  AT>romstore
+  } >ram  
 
   .dtors    : 
   {
@@ -77,9 +77,9 @@ SECTIONS
 
     etext  =  .;
     _etext  =  .;
-  } >ram  AT>romstore
+  } >ram  
+
 
-/*    . = .; */
 
   .rdata : 
   {
@@ -87,7 +87,7 @@ SECTIONS
     *(.rodata)
     *(.rodata.*)
     *(.gnu.linkonce.r*)
-  } >ram  AT>romstore
+  } >ram  
 
   .data : 
   {
@@ -96,7 +96,7 @@ SECTIONS
     *(.data)
     *(.data.*)
     *(.gnu.linkonce.d*)
-  } >ram  AT>romstore
+  } >ram  
 
 
   .lit8 : 
@@ -106,29 +106,28 @@ SECTIONS
     _gp = . + 0x8000;
     __global = _gp;
     *(.lit8)
-  } >ram  AT>romstore
+  } >ram  
 
   .lit4 : 
   {
     *(.lit4)
-  } >ram  AT>romstore 
+  } >ram   
 
   .sdata :   
   {
     *(.sdata)
     *(.sdata.*)
     *(.gnu.linkonce.s*)
-  } >ram  AT>romstore
+  } >ram  
 
   .sbss : 
   {
-  . = ALIGN(4);
    edata  =  .;
    _edata  =  .;
    _fbss = .;
     *(.sbss)
     *(.scommon)
-  } >ram  AT>romstore 
+  } >ram   
 
 
   .bss : 
@@ -148,7 +147,7 @@ SECTIONS
     WorkspaceBase = .;
     end = .;
     _end = .;
-  } >ram  AT>romstore 
+  } >ram   
 
 
 /* 
@@ -158,29 +157,29 @@ SECTIONS
 */
 
   /* DWARF 1 */
-  .debug          0 : { *(.debug) } AT>romstore
-  .line           0 : { *(.line) } AT>romstore
+  .debug          0 : { *(.debug) } 
+  .line           0 : { *(.line) } 
 
   /* GNU DWARF 1 extensions */
-  .debug_srcinfo  0 : { *(.debug_srcinfo) } AT>romstore
-  .debug_sfnames  0 : { *(.debug_sfnames) } AT>romstore
+  .debug_srcinfo  0 : { *(.debug_srcinfo) } 
+  .debug_sfnames  0 : { *(.debug_sfnames) } 
 
   /* DWARF 1.1 and DWARF 2 */
-  .debug_aranges  0 : { *(.debug_aranges) } AT>romstore
-  .debug_pubnames 0 : { *(.debug_pubnames) } AT>romstore
+  .debug_aranges  0 : { *(.debug_aranges) } 
+  .debug_pubnames 0 : { *(.debug_pubnames) } 
 
   /* DWARF 2 */
-  .debug_info     0 : { *(.debug_info) }    AT>romstore
-  .debug_abbrev   0 : { *(.debug_abbrev) }  AT>romstore
-  .debug_line     0 : { *(.debug_line) }    AT>romstore
-  .debug_frame    0 : { *(.debug_frame)}    AT>romstore
-  .debug_str      0 : { *(.debug_str) }     AT>romstore
-  .debug_loc      0 : { *(.debug_loc) }     AT>romstore
-  .debug_macinfo  0 : { *(.debug_macinfo) } AT>romstore
+  .debug_info     0 : { *(.debug_info) }    
+  .debug_abbrev   0 : { *(.debug_abbrev) }  
+  .debug_line     0 : { *(.debug_line) }    
+  .debug_frame    0 : { *(.debug_frame)}    
+  .debug_str      0 : { *(.debug_str) }     
+  .debug_loc      0 : { *(.debug_loc) }     
+  .debug_macinfo  0 : { *(.debug_macinfo) } 
 
   /* SGI/MIPS DWARF 2 extensions */
-  .debug_weaknames 0 : { *(.debug_weaknames) } AT>romstore
-  .debug_funcnames 0 : { *(.debug_funcnames) } AT>romstore
-  .debug_typenames 0 : { *(.debug_typenames) } AT>romstore
-  .debug_varnames  0 : { *(.debug_varnames) }  AT>romstore
+  .debug_weaknames 0 : { *(.debug_weaknames) } 
+  .debug_funcnames 0 : { *(.debug_funcnames) } 
+  .debug_typenames 0 : { *(.debug_typenames) } 
+  .debug_varnames  0 : { *(.debug_varnames) }  
 }