diff options
author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-04-20 10:19:28 +0200 |
---|---|---|
committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-04-20 13:08:36 +0200 |
commit | fbcd7c8fa65eb695e96a62ea1c1ac7a024fa9dfc (patch) | |
tree | a17e285cf22cd49cd42e8b3ad562febc3987d566 /c/src/lib/libbsp/m68k | |
parent | bsps: Move console drivers to bsps (diff) | |
download | rtems-fbcd7c8fa65eb695e96a62ea1c1ac7a024fa9dfc.tar.bz2 |
bsps: Move start files to bsps
This patch is a part of the BSP source reorganization.
Update #3285.
Diffstat (limited to 'c/src/lib/libbsp/m68k')
29 files changed, 16 insertions, 5250 deletions
diff --git a/c/src/lib/libbsp/m68k/av5282/Makefile.am b/c/src/lib/libbsp/m68k/av5282/Makefile.am index 4ad8a6a915..9081d18356 100644 --- a/c/src/lib/libbsp/m68k/av5282/Makefile.am +++ b/c/src/lib/libbsp/m68k/av5282/Makefile.am @@ -8,7 +8,7 @@ dist_project_lib_DATA = startup/bsp_specs noinst_PROGRAMS = -start.$(OBJEXT): start/start.S +start.$(OBJEXT): ../../../../../../bsps/m68k/av5282/start/start.S $(CPPASCOMPILE) -o $@ -c $< project_lib_DATA = start.$(OBJEXT) diff --git a/c/src/lib/libbsp/m68k/av5282/start/start.S b/c/src/lib/libbsp/m68k/av5282/start/start.S deleted file mode 100644 index 5075851245..0000000000 --- a/c/src/lib/libbsp/m68k/av5282/start/start.S +++ /dev/null @@ -1,393 +0,0 @@ -/* - * uC5282 startup code - * - * This file contains the entry point for the application. - * The name of this entry point is compiler dependent. - * It jumps to the BSP which is responsible for performing - * all initialization. - */ - -/* - * COPYRIGHT (c) 1989-2014. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#include <bsp.h> -#include <rtems/asm.h> - -#define SRAM_SIZE (64*1024) -#define DEFAULT_IPSBAR 0x40000000 - -BEGIN_CODE -#define INITIAL_STACK __SRAMBASE+SRAM_SIZE-4 - - PUBLIC (INTERRUPT_VECTOR) -SYM(INTERRUPT_VECTOR): - .long INITIAL_STACK | 0: Initial 'SSP' - .long start | 1: Initial PC - .long SYM(_uhoh) | 2: Bus error - .long SYM(_uhoh) | 3: Address error - .long SYM(_uhoh) | 4: Illegal instruction - .long SYM(_uhoh) | 5: Zero division - .long SYM(_uhoh) | 6: CHK, CHK2 instruction - .long SYM(_uhoh) | 7: TRAPcc, TRAPV instructions - .long SYM(_uhoh) | 8: Privilege violation - .long SYM(_uhoh) | 9: Trace - .long SYM(_uhoh) | 10: Line 1010 emulator - .long SYM(_uhoh) | 11: Line 1111 emulator - .long SYM(_uhoh) | 12: Hardware breakpoint - .long SYM(_uhoh) | 13: Reserved for coprocessor violation - .long SYM(_uhoh) | 14: Format error - .long SYM(_uhoh) | 15: Uninitialized interrupt - .long SYM(_uhoh) | 16: Unassigned, reserved - .long SYM(_uhoh) | 17: - .long SYM(_uhoh) | 18: - .long SYM(_uhoh) | 19: - .long SYM(_uhoh) | 20: - .long SYM(_uhoh) | 21: - .long SYM(_uhoh) | 22: - .long SYM(_uhoh) | 23: - .long SYM(_spuriousInterrupt) | 24: Spurious interrupt - .long SYM(_uhoh) | 25: Level 1 interrupt autovector - .long SYM(_uhoh) | 26: Level 2 interrupt autovector - .long SYM(_uhoh) | 27: Level 3 interrupt autovector - .long SYM(_uhoh) | 28: Level 4 interrupt autovector - .long SYM(_uhoh) | 29: Level 5 interrupt autovector - .long SYM(_uhoh) | 30: Level 6 interrupt autovector - .long SYM(_uhoh) | 31: Level 7 interrupt autovector - .long SYM(_uhoh) | 32: Trap instruction (0-15) - .long SYM(_uhoh) | 33: - .long SYM(_uhoh) | 34: - .long SYM(_uhoh) | 35: - .long SYM(_uhoh) | 36: - .long SYM(_uhoh) | 37: - .long SYM(_uhoh) | 38: - .long SYM(_uhoh) | 39: - .long SYM(_uhoh) | 40: - .long SYM(_uhoh) | 41: - .long SYM(_uhoh) | 42: - .long SYM(_uhoh) | 43: - .long SYM(_uhoh) | 44: - .long SYM(_uhoh) | 45: - .long SYM(_uhoh) | 46: - .long SYM(_uhoh) | 47: - .long SYM(_uhoh) | 48: Reserved for coprocessor - .long SYM(_uhoh) | 49: - .long SYM(_uhoh) | 50: - .long SYM(_uhoh) | 51: - .long SYM(_uhoh) | 52: - .long SYM(_uhoh) | 53: - .long SYM(_uhoh) | 54: - .long SYM(_uhoh) | 55: - .long SYM(_uhoh) | 56: - .long SYM(_uhoh) | 57: - .long SYM(_uhoh) | 58: - .long SYM(_uhoh) | 59: Unassigned, reserved - .long SYM(_uhoh) | 60: - .long SYM(_uhoh) | 61: - .long SYM(_uhoh) | 62: - .long SYM(_uhoh) | 63: - .long SYM(_spuriousInterrupt) | 64: User spurious handler - .long SYM(_uhoh) | 65: - .long SYM(_uhoh) | 66: - .long SYM(_uhoh) | 67: - .long SYM(_uhoh) | 68: - .long SYM(_uhoh) | 69: - .long SYM(_uhoh) | 70: - .long SYM(_uhoh) | 71: - .long SYM(_uhoh) | 72: - .long SYM(_uhoh) | 73: - .long SYM(_uhoh) | 74: - .long SYM(_uhoh) | 75: - .long SYM(_uhoh) | 76: - .long SYM(_uhoh) | 77: - .long SYM(_uhoh) | 78: - .long SYM(_uhoh) | 79: - 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.long SYM(_uhoh) | 237: - .long SYM(_uhoh) | 238: - .long SYM(_uhoh) | 239: - .long SYM(_uhoh) | 240: - .long SYM(_uhoh) | 241: - .long SYM(_uhoh) | 242: - .long SYM(_uhoh) | 243: - .long SYM(_uhoh) | 244: - .long SYM(_uhoh) | 245: - .long SYM(_uhoh) | 246: - .long SYM(_uhoh) | 247: - .long SYM(_uhoh) | 248: - .long SYM(_uhoh) | 249: - .long SYM(_uhoh) | 250: - .long SYM(_uhoh) | 251: - .long SYM(_uhoh) | 252: - .long SYM(_uhoh) | 253: - .long SYM(_uhoh) | 254: - .long SYM(_uhoh) | 255: - -/* - * Default trap handler - * With an oscilloscope you can see AS* stop - */ -.align 4 - PUBLIC (_uhoh) -SYM(_uhoh): - nop | Leave spot for breakpoint - stop #0x2700 | Stop with interrupts disabled - bra.w SYM(_uhoh) | Stuck forever - -.align 4 - PUBLIC (_spuriousInterrupt) -SYM(_spuriousInterrupt): - addql #1,SYM(_M68kSpuriousInterruptCount) - rte -/*************************************************************************** - Function : start - - Description : setup the internal SRAM for use and setup the INITIAL STACK ptr. - Also enable the internal peripherals - ***************************************************************************/ -.align 4 - PUBLIC (start) -SYM(start): - move.w #0x0000,d0 | Turn off watchdog timer - move.w d0, (0x40140000) - move.w #0x2000,d0 | Set system frequency to 58960000 - move.w d0, (0x40120000) - move.w #0x2700,sr | Disable interrupts - - move.l #__SRAMBASE+1,d0 | Enable the MCF5282 internal SRAM - movec d0,%rambar | ...so we have a stack - move.l #(INITIAL_STACK),sp | Overwrite the fake stack pointer - - /* - * If we're being started by the debugger, and the debugger has - * moved the IPSBAR, we're doomed........ - */ - move.l #__IPSBAR+1,d0 | Enable the MCF5282 internal peripherals - move.l d0,DEFAULT_IPSBAR - - /* - * Remainder of the startup code is handled by C code - */ - jmp SYM(Init5282) | Start C code (which never returns) - -/*************************************************************************** - Function : CopyDataClearBSSAndStart - - Description : Copy DATA segment, Copy SRAM segment, clear BSS segment, - start C program. Assume that DATA and BSS sizes are multiples of 4. - ***************************************************************************/ -.align 4 - - PUBLIC (CopyDataClearBSSAndStart) -SYM(CopyDataClearBSSAndStart): - lea SYM(_data_dest_start),a0 | Get start of DATA in RAM - lea SYM(_data_src_start),a2 | Get start of DATA in ROM - cmpl a0,a2 | Are they the same? - beq.s NODATACOPY | Yes, no copy necessary - lea SYM(_data_dest_end),a1 | Get end of DATA in RAM - bra.s DATACOPYLOOPTEST | Branch into copy loop -DATACOPYLOOP: - movel a2@+,a0@+ | Copy word from ROM to RAM -DATACOPYLOOPTEST: - cmpl a1,a0 | Done? - bcs.s DATACOPYLOOP | No, skip -NODATACOPY: - -/* Now, clear BSS */ - lea _clear_start,a0 | Get start of BSS - lea _clear_end,a1 | Get end of BSS - clrl d0 | Value to set - bra.s ZEROLOOPTEST | Branch into clear loop -ZEROLOOP: - movel d0,a0@+ | Clear a word -ZEROLOOPTEST: - cmpl a1,a0 | Done? - bcs.s ZEROLOOP | No, skip - - - /* - * Right : Now we're ready to boot RTEMS - */ - clrl d0 | Pass in null to all boot_card() params - movel d0,a7@- | command line - jsr SYM(boot_card) | Call C boot_card function to startup RTEMS - movel a7@+,d0 -MULTI_TASK_EXIT: - nop - nop - trap #14 - bra MULTI_TASK_EXIT - -END_CODE - - .align 2 -BEGIN_DATA_DCL - .align 2 - PUBLIC (_M68kSpuriousInterruptCount) -SYM (_M68kSpuriousInterruptCount): - .long 0 -END_DATA_DCL - -END - diff --git a/c/src/lib/libbsp/m68k/csb360/Makefile.am b/c/src/lib/libbsp/m68k/csb360/Makefile.am index 3fd41e5d4c..91812aeec2 100644 --- a/c/src/lib/libbsp/m68k/csb360/Makefile.am +++ b/c/src/lib/libbsp/m68k/csb360/Makefile.am @@ -8,7 +8,7 @@ dist_project_lib_DATA = startup/bsp_specs -start.$(OBJEXT): start/start.S +start.$(OBJEXT): ../../../../../../bsps/m68k/csb360/start/start.S $(CPPASCOMPILE) -o $@ -c $< project_lib_DATA = start.$(OBJEXT) diff --git a/c/src/lib/libbsp/m68k/csb360/start/start.S b/c/src/lib/libbsp/m68k/csb360/start/start.S deleted file mode 100644 index 299c8dad32..0000000000 --- a/c/src/lib/libbsp/m68k/csb360/start/start.S +++ /dev/null @@ -1,413 +0,0 @@ -/* - * CSB360 startup code - * - * This file contains the entry point for the application. - * The name of this entry point is compiler dependent. - * It jumps to the BSP which is responsible for performing - * all initialization. - */ - -/* - * Copyright (C) 2004 Cogent Computer Systems - * Author: Jay Monkman <jtm@lopingdog.com> - * - * Based on start.S from mcf520elite BSP: - * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia - * Author: Victor V. Vengerov <vvv@oktet.ru> - * - * Based on work: - * David Fiddes, D.J@fiddes.surfaid.org - * http://www.calm.hw.ac.uk/davidf/coldfire/ - * - * COPYRIGHT (c) 1989-1998. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#include <rtems/asm.h> -#include <bsp.h> - -BEGIN_CODE - -/* Initial stack situated in on-chip static memory */ -#define INITIAL_STACK BSP_MEM_ADDR_SRAM+BSP_MEM_SIZE_SRAM-4 - - PUBLIC (INTERRUPT_VECTOR) -SYM(INTERRUPT_VECTOR): - .long INITIAL_STACK | 00: initial SSP - .long start | 01: Initial PC - .long _unexp_exception | 02: Access Error - .long _unexp_exception | 03: Address Error - .long _unexp_exception | 04: Illegal Instruction - .long _reserved_int | 05: Reserved - .long _reserved_int | 06: Reserved - .long _reserved_int | 07: Reserved - .long _unexp_exception | 08: Priveledge Violation - .long _unexp_exception | 09: Trace - .long _unexp_exception | 0A: Unimplemented A-Line - .long _unexp_exception | 0B: Unimplemented F-Line - .long _unexp_exception | 0C: Debug interrupt - .long _reserved_int | 0D: Reserved - .long _unexp_exception | 0E: Format error - .long _unexp_exception | 0F: Uninitialized interrupt - .long _reserved_int | 10: Reserved - .long _reserved_int | 11: Reserved - .long _reserved_int | 12: Reserved - .long _reserved_int | 13: Reserved - .long _reserved_int | 14: Reserved - .long _reserved_int | 15: Reserved - .long _reserved_int | 16: Reserved - .long _reserved_int | 17: Reserved - .long _spurious_int | 18: Spurious interrupt - .long _avec1_int | 19: Autovector Level 1 - .long _avec2_int | 1A: Autovector Level 2 - .long _avec3_int | 1B: Autovector Level 3 - .long _avec4_int | 1C: Autovector Level 4 - .long _avec5_int | 1D: Autovector Level 5 - .long _avec6_int | 1E: Autovector Level 6 - .long _avec7_int | 1F: Autovector Level 7 - .long _unexp_exception | 20: TRAP #0 - .long _unexp_exception | 21: TRAP #1 - .long _unexp_exception | 22: TRAP #2 - .long _unexp_exception | 23: TRAP #3 - .long _unexp_exception | 24: TRAP #4 - .long _unexp_exception | 25: TRAP #5 - .long _unexp_exception | 26: TRAP #6 - .long _unexp_exception | 27: TRAP #7 - .long _unexp_exception | 28: TRAP #8 - .long _unexp_exception | 29: TRAP #9 - .long _unexp_exception | 2A: TRAP #10 - .long _unexp_exception | 2B: TRAP #11 - .long _unexp_exception | 2C: TRAP #12 - .long _unexp_exception | 2D: TRAP #13 - .long _unexp_exception | 2E: TRAP #14 - .long _unexp_exception | 2F: TRAP #15 - .long _reserved_int | 30: Reserved - .long _reserved_int | 31: Reserved - .long _reserved_int | 32: Reserved - .long _reserved_int | 33: Reserved - .long _reserved_int | 34: Reserved - .long _reserved_int | 35: Reserved - .long _reserved_int | 36: Reserved - .long _reserved_int | 37: Reserved - .long _reserved_int | 38: Reserved - .long _reserved_int | 39: Reserved - .long _reserved_int | 3A: Reserved - .long _reserved_int | 3B: Reserved - .long _reserved_int | 3C: Reserved - .long _reserved_int | 3D: Reserved - .long _reserved_int | 3E: Reserved - .long _reserved_int | 3F: Reserved - - .long _unexp_int | 40-FF: User defined interrupts - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - - .long _unexp_int | 50: - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - - .long _unexp_int | 60: - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - - .long _unexp_int | 70: - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - - .long _unexp_int | 80: - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - - .long _unexp_int | 90: - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - - .long _unexp_int | A0: - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - - .long _unexp_int | B0: - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - - .long _unexp_int | C0: - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - - .long _unexp_int | D0: - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - - .long _unexp_int | E0: - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - - .long _unexp_int | F0: - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - - PUBLIC(start) -SYM(start): - move.w #0x2700,sr | First turn off all interrupts! - - move.l #(BSP_RAMBAR + MCF5272_RAMBAR_V), d0 - movec d0,rambar0 | ...so we have a stack - - move.l #(INITIAL_STACK),sp | Set up stack again (may be we are - | going here from monitor or with - | BDM interface assistance) - - /* - * Remainder of the startup code is handled by C code - */ - jmp SYM(init5272) | Start C code (which never returns) - -/*************************************************************************** - Function : clear_bss - - Description : clear BSS segment - ***************************************************************************/ - PUBLIC (clear_bss) -SYM(clear_bss): - lea clear_start,a0 | Get start of BSS - lea clear_end,a1 | Get end of BSS - clrl d0 | Value to set - bra.s ZEROLOOPTEST | Branch into clear loop -ZEROLOOP: - movel d0,a0@+ | Clear a word -ZEROLOOPTEST: - cmpl a1,a0 | Done? - bcs.s ZEROLOOP | No, skip - - rts - - - - - PUBLIC (start_csb360) -SYM(start_csb360): - /* - * Right : Now we're ready to boot RTEMS - */ - clrl d0 | Pass in null to all boot_card() params - movel d0,a7@- | command line - jsr SYM(boot_card) | Call C boot_card function to startup RTEMS - - - -# Wait forever -_stop: - nop - stop #0x2700 - jmp _stop - -# The following labelled nops is a placeholders for breakpoints -_unexp_exception: - nop - jmp _stop - -_unexp_int: - nop - jmp _stop - -_reserved_int: - nop - jmp _stop - -_spurious_int: - nop - jmp _stop - -_avec1_int: - nop - jmp _unexp_int - -_avec2_int: - nop - jmp _unexp_int - -_avec3_int: - nop - jmp _unexp_int - -_avec4_int: - nop - jmp _unexp_int - -_avec5_int: - nop - jmp _unexp_int - -_avec6_int: - nop - jmp _unexp_int - -_avec7_int: - nop - jmp _unexp_int - - -END_CODE - -END - diff --git a/c/src/lib/libbsp/m68k/gen68340/Makefile.am b/c/src/lib/libbsp/m68k/gen68340/Makefile.am index ab20c9dda3..7bf172e820 100644 --- a/c/src/lib/libbsp/m68k/gen68340/Makefile.am +++ b/c/src/lib/libbsp/m68k/gen68340/Makefile.am @@ -8,7 +8,7 @@ dist_project_lib_DATA = startup/bsp_specs noinst_PROGRAMS = -start.$(OBJEXT): start/start.S +start.$(OBJEXT): ../../../../../../bsps/m68k/gen68340/start/start.S $(CPPASCOMPILE) -o $@ -c $< project_lib_DATA = start.$(OBJEXT) diff --git a/c/src/lib/libbsp/m68k/gen68340/start/start.S b/c/src/lib/libbsp/m68k/gen68340/start/start.S deleted file mode 100644 index 794c6d75b6..0000000000 --- a/c/src/lib/libbsp/m68k/gen68340/start/start.S +++ /dev/null @@ -1,877 +0,0 @@ -/* - * This file contains the entry point for the application. - * The name of this entry point is compiler dependent. - * It jumps to the BSP which is responsible for performing - * all initialization. - */ - -/* - * COPYRIGHT (c) 1989-1999. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may in - * the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - * - * Based on the `gen68360' board support package, and covered by the - * original distribution terms. - * - * Geoffroy Montel - * France Telecom - CNET/DSM/TAM/CAT - * 4, rue du Clos Courtel - * 35512 CESSON-SEVIGNE - * FRANCE - * - * e-mail: g_montel@yahoo.com - */ - -#include <rtems/asm.h> -#include <m68349.inc> - -#include <bsp.h> /* to indicate dependencies */ - -/* old addresses for AST68340 only, undefine for AST68349 */ -#define _OLD_ASTECC 1 - -BEGIN_CODE - /* - * Step 1: Decide on Reset Stack Pointer and Initial Program Counter - */ -Entry: - .long SYM(m340)+1024 | 0: Initial SSP - .long start | 1: Initial PC - .long SYM(_uhoh) | 2: Bus error - .long SYM(_uhoh) | 3: Address error - .long SYM(_uhoh) | 4: Illegal instruction - .long SYM(_uhoh) | 5: Zero division - .long SYM(_uhoh) | 6: CHK, CHK2 instruction - .long SYM(_uhoh) | 7: TRAPcc, TRAPV instructions - .long SYM(_uhoh) | 8: Privilege violation - .long SYM(_uhoh) | 9: Trace - .long SYM(_uhoh) | 10: Line 1010 emulator - .long SYM(_uhoh) | 11: Line 1111 emulator - .long SYM(_uhoh) | 12: Hardware breakpoint - .long SYM(_uhoh) | 13: Reserved for coprocessor violation - .long SYM(_uhoh) | 14: Format error - .long SYM(_uhoh) | 15: Uninitialized interrupt - .long SYM(_uhoh) | 16: Unassigned, reserved - .long SYM(_uhoh) | 17: - .long SYM(_uhoh) | 18: - .long SYM(_uhoh) | 19: - .long SYM(_uhoh) | 20: - .long SYM(_uhoh) | 21: - .long SYM(_uhoh) | 22: - .long SYM(_uhoh) | 23: - .long SYM(_spuriousInterrupt) | 24: Spurious interrupt - .long SYM(_uhoh) | 25: Level 1 interrupt autovector - .long SYM(_uhoh) | 26: Level 2 interrupt autovector - .long SYM(_uhoh) | 27: Level 3 interrupt autovector - .long SYM(_uhoh) | 28: Level 4 interrupt autovector - .long SYM(_uhoh) | 29: Level 5 interrupt autovector - .long SYM(_uhoh) | 30: Level 6 interrupt autovector - .long SYM(_uhoh) | 31: Level 7 interrupt autovector - .long SYM(_uhoh) | 32: Trap instruction (0-15) - .long SYM(_uhoh) | 33: - .long SYM(_uhoh) | 34: - .long SYM(_uhoh) | 35: - .long SYM(_uhoh) | 36: - .long SYM(_uhoh) | 37: - .long SYM(_uhoh) | 38: - .long SYM(_uhoh) | 39: - .long SYM(_uhoh) | 40: - .long SYM(_uhoh) | 41: - .long SYM(_uhoh) | 42: - .long SYM(_uhoh) | 43: - .long SYM(_uhoh) | 44: - .long SYM(_uhoh) | 45: - .long SYM(_uhoh) | 46: - .long SYM(_uhoh) | 47: - .long SYM(_uhoh) | 48: Reserved for coprocessor - .long SYM(_uhoh) | 49: - .long SYM(_uhoh) | 50: - .long SYM(_uhoh) | 51: - .long SYM(_uhoh) | 52: - .long SYM(_uhoh) | 53: - .long SYM(_uhoh) | 54: - .long SYM(_uhoh) | 55: - .long SYM(_uhoh) | 56: - .long SYM(_uhoh) | 57: - .long SYM(_uhoh) | 58: - .long SYM(_uhoh) | 59: Unassigned, reserved - .long SYM(_uhoh) | 60: - .long SYM(_uhoh) | 61: - .long SYM(_uhoh) | 62: - .long SYM(_uhoh) | 63: - .long SYM(_uhoh) | 64: User defined vectors (192) - .long SYM(_uhoh) | 65: - .long SYM(_uhoh) | 66: - .long SYM(_uhoh) | 67: - .long SYM(_uhoh) | 68: - .long SYM(_uhoh) | 69: - .long SYM(_uhoh) | 70: - .long SYM(_uhoh) | 71: - .long SYM(_uhoh) | 72: - .long SYM(_uhoh) | 73: - .long SYM(_uhoh) | 74: - .long SYM(_uhoh) | 75: - .long SYM(_uhoh) | 76: - .long SYM(_uhoh) | 77: - .long SYM(_uhoh) | 78: - .long SYM(_uhoh) | 79: - .long SYM(_uhoh) | 80: - .long SYM(_uhoh) | 81: - .long SYM(_uhoh) | 82: - .long SYM(_uhoh) | 83: - .long SYM(_uhoh) | 84: - .long SYM(_uhoh) | 85: - .long SYM(_uhoh) | 86: - .long SYM(_uhoh) | 87: - .long SYM(_uhoh) | 88: - .long SYM(_uhoh) | 89: - .long SYM(_uhoh) | 90: - .long SYM(_uhoh) | 91: - .long SYM(_uhoh) | 92: - .long SYM(_uhoh) | 93: - .long SYM(_uhoh) | 94: - .long SYM(_uhoh) | 95: - .long SYM(_uhoh) | 96: - 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.long SYM(_uhoh) | 253: - .long SYM(_uhoh) | 254: - .long SYM(_uhoh) | 255: - -/* - * Default trap handler - * With an oscilloscope you can see AS* stop - */ - PUBLIC (_uhoh) -SYM(_uhoh): nop | Leave spot for breakpoint -/* stop #0x2700 | Stop with interrupts disabled */ - move.w #0x2700,sr - move.w (a7),_boot_panic_registers+4 | SR - move.l 2(a7),_boot_panic_registers | PC - move.w 6(a7),_boot_panic_registers+6 | format & vector - movem.l d0-d7/a0-a7, _boot_panic_registers+8 - movec sfc, d0 - movem.l d0, _boot_panic_registers+72 - movec dfc, d0 - movem.l d0, _boot_panic_registers+76 - movec vbr, d0 - movem.l d0, _boot_panic_registers+80 - jmp SYM(_dbug_dumpanic) - bra.s _crt0_cold_start - -/* - * Log, but otherwise ignore, spurious interrupts - */ - PUBLIC (_spuriousInterrupt) -SYM(_spuriousInterrupt): - addql #1,SYM(_M68kSpuriousInterruptCount) - rte - -/* - * Place the low-order 3 octets of the board's ethernet address at - * a `well-known' fixed location relative to the startup location. - */ - .align 2 - .word 0 | Padding -ethernet_address_buffer: - .word 0x08F3 | Default address - .word 0xDEAD - .word 0xCAFE - -BEGIN_DATA - -/* equates */ - -.equ _CPU340, 0x0 -.equ _CPU349, 0x31 - -#ifdef _OLD_ASTECC /* old addresses for AST68340 only */ -.equ _EPLD_CS_BASE, 0x1 -.equ _PROM_Start, 0x01000000 /* CS0 */ -.equ _FLEX_Start, 0x08000000 /* CS2 */ -.equ _I2C_Start, 0x0c000000 /* CS3 */ - -.equ _BCCram_Start, 0x00000000 /* CS1 64 Kbytes */ -.equ _BCCram_Size, 0x00010000 /* CS1 64 Kbytes */ - -.equ _ExtRam_Start, 0x10000000 /* SRAM */ -.equ _ExtRam_Size, 0x00400000 /* 4 Mbytes */ - -.equ _FastRam_Start, 0x00000000 /* overlap /CS1 for the first 4 Kbytes */ -.equ _FastRam_Size, 0x00001000 /* 4 Kbytes */ - -#else /* new addresses for AST68349 and 68340 */ - -.equ _EPLD_CS_BASE, 0x5 -.equ _PROM_Start, 0x50000000 /* CS0 */ -.equ _FLEX_Start, 0x08000000 /* CS2 */ -.equ _I2C_Start, 0x0c000000 /* CS3 */ - -.equ _BCCram_Start, 0x00000000 /* CS1 64 Kbytes */ -.equ _BCCram_Size, 0x00010000 /* CS1 64 Kbytes */ - -.equ _ExtRam_Start, 0x80000000 /* DRAM */ -.equ _ExtRam_Size, 0x00400000 /* 4 Mbytes */ - -.equ _FastRam_Start, 0x00000000 /* overlap /CS1 for the first 4 Kbytes */ -.equ _FastRam_Size, 0x00001000 /* 4 Kbytes */ -#endif - -.equ _SPEED349, 0xD680 /* 24 Mhz */ -.equ _SPEED340, 0xD700 /* 25 Mhz */ -/* .equ _SPEED340, 0xCE00 16 Mhz */ - -#define crt0_boot_type d0 /* cold/warm start (must be D0) */ -#define crt0_temp d1 -#define crt0_cpu_type d2 -#define crt0_csswitch d3 -#define crt0_buswidth d4 -#define crt0_pdcs d5 -#define crt0_spare6 d6 -#define crt0_spare7 d7 -#define crt0_sim_base a0 -#define crt0_glue a1 -#define crt0_dram a2 -#define crt0_ptr3 a3 -#define crt0_ptr4 a4 -#define crt0_ptr5 a5 -#define crt0_ptr6 a6 - -/* -- PDCS buffer equates -- */ -.equ pdcs_mask, 0x1F /* DRAM configuration */ -.equ pdcs_sw12, 7 /* switch 12 */ -.equ pdcs_sw11, 6 /* switch 11 */ -.equ pdcs_sw14, 5 /* switch 14 */ - -.equ bit_cache, pdcs_sw12 /* enable cache if on */ -.equ bit_meminit, pdcs_sw11 /* init memory if on */ - -/* -- Initialization stack and vars -- */ - -/* When using DWARF, everything must be a multiple of 16-bits. */ -#if 1 -_AsteccBusWidth: ds.w 0x0101 -_AsteccCsSwitch: ds.w 0x0101 -#else -_AsteccBusWidth: ds.b 1 -_AsteccCsSwitch: ds.b 1 -#endif -_AsteccCpuName: ds.l 1 - -.align 4 - -_crt0_init_stack: - ds.l 500 -_crt0_init_stktop: - -/* -- Initialization code -- */ -BEGIN_CODE - -.align 4 - dc.l _crt0_init_stktop /* reset SP */ - dc.l _crt0_cold_start /* reset PC */ - dc.l _crt0_warm_start - -/* When using DWARF, everything must be a multiple of 16-bits. */ - .ascii "BOOT XHM68K/Spectra for ASTECC 68349 and 68340 boards " - .text - dc.w 0 -.align 4 - -.globl start -start: - -_crt0_cold_start: - moveq.l #0,crt0_boot_type | signal cold reset - bra.s _crt0_common_start - -_crt0_warm_start: - moveq.l #1,crt0_boot_type | signal warm reset - -_crt0_common_start: - move.w #0x2700,sr | disable interrupts and switch to interrupt mode - movea.l #_crt0_init_stktop,sp | set up initialization stack - - move.l #Entry,crt0_temp | VBR initialization - movec.l crt0_temp,vbr | - moveq.l #0x07,crt0_temp - movec.l crt0_temp,dfc | prepare access in CPU space - move.l #(BASE_SIM+0x111),crt0_temp | mask CPU, RESERVED USER SPACES - moves.l crt0_temp,BASE_REG | base initialization (must be MOVES, PCC-130795) - - movea.l #BASE_SIM,crt0_sim_base - - /* -- disable Bus Monitor -- */ - move.b #0,SIM_SYPCR(crt0_sim_base) | system protection control register - - /* -- enable A31-A24 -- */ - clr.b SIM_PPRA1(crt0_sim_base) - - /* -- show cycles, user acces to SIM, 4 /CS & 4 /IT -- */ - move.w #0x427F,SIM_MCR(crt0_sim_base) - - /* -- enable /IRQ3, 5, 6, 7 -- */ - move.b #0xE8,SIM_PPRB(crt0_sim_base) - - /* -- enable autovector on /IRQ7 -- */ - move.b #0x80,SIM_AVR(crt0_sim_base) - - /* -- test CPU type -- */ - cmp.b #_CPU349,SIM_IDR(crt0_sim_base) - bne cpu_is_68340 - -/*-------------------------------------------------------------------------------------------*/ -cpu_is_68349: - - /* -- set cpu clock -- */ - move.w #_SPEED349,SIM_SYNCR(crt0_sim_base) | clock - -sync_wait349: - btst.b #3,(SIM_SYNCR+1)(crt0_sim_base) - beq sync_wait349 - - /* to allow access to the EPLD internal registers, it is necessary - to disable the global chip-select /CS0 (which decodes every external - cycles). To do that, we initialize the 68349 internal RAM, - copy a part of the initialization code in it, and jump there. - from that moment, /CS0 is not used, therefore it can be initialized - with its default value. Its width may be incorrect, but it will be - adjusted later. The goal is to avoid any conflict with - the accesses to the EPLD registers. - When this is done, we read the RESET parameters (boot prom width - and chip-select switch) and proceed with the initialization - when all is done, we jump back to the boot prom now - decoded with a properly configured /CS0 */ - - /*-------------------------------------*/ - /* -- configure internal SRAM banks -- */ - - move.l #0x00000000,QDMM_MCR(crt0_sim_base) - move.l #_FastRam_Start+0x0005,QDMM_QBAR0(crt0_sim_base) - move.l #_FastRam_Start+0x0405,QDMM_QBAR1(crt0_sim_base) - move.l #_FastRam_Start+0x0805,QDMM_QBAR2(crt0_sim_base) - move.l #_FastRam_Start+0x0c05,QDMM_QBAR3(crt0_sim_base) - - /*--------------------------------------------------------*/ - /* -- copy to address of the 68349 initialization code -- */ - - lea.l _copy_start_code(%pc),crt0_ptr3 - lea.l _copy_end_code(%pc),crt0_ptr4 - move.l crt0_ptr4,crt0_temp - sub.l crt0_ptr3,crt0_temp - add.l #3,crt0_temp | adjust to next long word - lsr.l #2,crt0_temp - - move.l #_FastRam_Start,crt0_ptr4 -_copy_loop: - move.l (crt0_ptr3)+,(crt0_ptr4)+ - subq.l #1,crt0_temp - bne.s _copy_loop - bra.l _FastRam_Start | jump to code in internal RAM - - /*------------------------------------*/ - /* -- start of initialization code -- */ - -_copy_start_code: - bra.l _begin_68349_init - - /*----------------------------------------------------------*/ - /* Astecc 68349 board : chip-select initialization values */ - -_table_csepld: -/* When using DWARF, everything must be a multiple of 16-bits. */ -#if 1 - dc.w (((_EPLD_CS_BASE&0x0F)+0x80) << 8) | 0x80 | 16 bits, 0ws - dc.w 0x9090 | 16 bits, ext /dsack - -#else - dc.b (_EPLD_CS_BASE&0x0F)+0x80 | 16 bits, 0ws - dc.b 0x80 | 16 bits, 0 ws - dc.b 0x90 | 16 bits, ext /dsack - dc.b 0x90 | 16 bits, ext /dsack -#endif - -_table_cs349: - dc.l 0x003FFFF4 | Mask CS0 (4Mbytes PROM, 32bits, 1WS) - dc.l (_PROM_Start&0xFFFFFF00)+0x00000003 | Base CS0 - dc.l 0x003FFFF1 | MASK CS1 (4Mbytes RAM, 16bits, 0WS) - dc.l (_BCCram_Start&0xFFFFFF00)+0x00000003 | Base CS1 - dc.l 0x000000FF | MASK CS2 (FLEX, ext DTACK, 256 bytes) - dc.l (_FLEX_Start&0xFFFFFF00)+0x00000003 | Base CS2 - dc.l 0x000000FF | Mask CS3 (I2C, ext DTACK, 256 bytes) - dc.l (_I2C_Start&0xFFFFFF00)+0x00000003 | Base CS3 - - /*-------------------------------------------------*/ -_begin_68349_init: - - /*-------------------------------------------------*/ - /* 68349 chip select initialization - - at this stage, the width of /CS0 may be incorrect - it will be corrected later - */ - -_cs68349_init: - lea.l SIM_MASKH0(crt0_sim_base),crt0_ptr4 - lea.l _table_cs349(%pc),crt0_ptr3 - - moveq.l #0x07,crt0_temp -_cs349_init2: - move.l (crt0_ptr3)+,(crt0_ptr4)+ - dbra crt0_temp,_cs349_init2 - - /*-----------------------------------------------*/ - /* -- prepare access to the internal registers --*/ - moveq.l #EPLD_SPACE,crt0_temp - movec.l crt0_temp,dfc - movec.l crt0_temp,sfc - move.l #GLUE_EPLD,crt0_glue - move.l #DRAM_EPLD,crt0_dram - - /*-------------------------------------------*/ - /* EPLD generated /CS[3..0] must be disabled */ - -_csepld_clear: - move.l crt0_glue,crt0_ptr4 - move.w #3,crt0_spare6 - clr.b crt0_temp - -_csepld_clear1: - moves.b crt0_temp,(crt0_ptr4)+ - dbra crt0_spare6,_csepld_clear1 - - /*---------------------------------------------------------*/ - /* -- get width of boot PROM, and active chip-select set --*/ - moves.b REG_BUSWIDTH(crt0_dram),crt0_csswitch - move.b crt0_csswitch,crt0_buswidth - - /* state of CS_SWITCH : sel == 0 => CPU chip_selects (/CS[3..0]) - : sel == 1 => EPLD chip_selects (/CS[3..0]) */ - and.b #1,crt0_csswitch - - /* bus width of /CS0 during reset bw[1..0] : 0 1 2 3 - bus width : 32 16 8 ext./dsackx */ - rol.b #2,crt0_buswidth - and.b #3,crt0_buswidth - - /*----------------------------------------------------*/ - /* -- configure chip select 0 with boot prom width -- */ - lea.l SIM_MASKH0(crt0_sim_base),crt0_ptr4 - lea.l _table_cs349(%pc),crt0_ptr3 - move.l (crt0_ptr3)+,crt0_temp - and.b #0xFC,crt0_temp | clear PS0 & PS1 - or.b crt0_buswidth,crt0_temp | set boot PROM bus width - move.l crt0_temp,(crt0_ptr4)+ - - /*------------------------*/ - /* -- read PDCS buffer -- */ - moves.b REG_PDCS(crt0_glue),crt0_pdcs -/* move.b #0x3F,crt0_pdcs pour test */ - - /*---------------------------------------*/ - /* -- EPLD chip-select initialization -- */ - /*---------------------------------------*/ - btst.b #0,crt0_csswitch - beq _cs_init_end - - /*--------------------------------------------*/ - /* 68349 generated /CS[3..0] must be disabled */ - lea.l SIM_MASKH0(crt0_sim_base),crt0_ptr4 - lea.l _table_cs349(%pc),crt0_ptr3 - moveq.l #0x03,crt0_temp -_cs349_clear: - move.l (crt0_ptr3)+,(crt0_ptr4)+ - move.l (crt0_ptr3)+,crt0_spare6 - and.b #0xFE,crt0_spare6 | disable chip-select - move.l crt0_spare6,(crt0_ptr4)+ - dbra crt0_temp,_cs349_clear - - /*---------------------------------------------*/ - /* EPLD generated /CS[3..0] must be configured */ -_csepld_init: - move.l crt0_glue,crt0_ptr4 - lea.l _table_csepld(%pc),crt0_ptr3 - - move.b (crt0_ptr3)+,crt0_temp - or.b #0x20,crt0_temp | default width is 32 bits - tst.b crt0_buswidth | is boot PROM bus width 32 bits ? - beq _csepld1 | if not - and.b #0xDF,crt0_temp | set width to 16 bits -_csepld1: - moves.b crt0_temp,(crt0_ptr4)+ - - moveq.l #0x02,crt0_spare6 -_csepld2: - move.b (crt0_ptr3)+,crt0_temp - moves.b crt0_temp,(crt0_ptr4)+ - dbra crt0_spare6,_csepld2 - -_cs_init_end: - - /*--------------------------------------*/ - /* -- DRAM controller initialization -- */ -_dram_init: - move.w #15,crt0_temp - move.l #_ExtRam_Start,crt0_ptr3 - -_dram_init1: - clr.l (crt0_ptr3)+ | must access DRAM - dbra crt0_temp,_dram_init1 | prior to init refresh - -_dram_init2: - move.b #3,crt0_temp - moves.b crt0_temp,REG_WS(crt0_dram) | set 3 wait-states - - move.b #0x81,crt0_temp - moves.b crt0_temp,REG_REFRESH(crt0_dram) | refresh every 10µs - - move.b #0,crt0_temp - moves.b crt0_temp,REG_CONFIG(crt0_dram) | default size = 4Mbytes - - /*-----------------------*/ - /* -- configure cache -- */ -_init_cache: - move.l #0x000001E0,CACHE_MCR(crt0_sim_base) - btst.b #bit_cache,crt0_pdcs - bne _init_cache_end - or.l #0x00000001,CACHE_MCR(crt0_sim_base) - -_init_cache_end: - - /*-----------------------------*/ - /* -- timers initialization -- */ - - clr.b crt0_temp - moves.b crt0_temp,REG_TIMER1(crt0_glue) | disable timer 1 - moves.b crt0_temp,REG_TIMER2(crt0_glue) | disable timer 2 - - /*--------------------------*/ - /* -- I2C initialization -- */ - move.b #3,crt0_temp - moves.b crt0_temp,REG_I2C(crt0_glue) | tri-states I2C ports - - /*-----------------------------------------*/ - /* -- baudrate generator initialization -- */ - move.b #2,crt0_temp - moves.b crt0_temp,REG_BAUDRATE(crt0_glue) | baudrate = 38400 - - /*-------------------------------*/ - /* -- IO port initialization -- */ - clr.b crt0_temp - moves.b crt0_temp,REG_IO(crt0_glue) | set port as input - - /* -- */ - - move.l #68349,crt0_cpu_type - - /* -- jump back to PROM -- */ - - jmp.l (_fill_test) | must be absolute long - -_copy_end_code: - -/*------------------------------------------------- - initialization code for the 68340 board - -------------------------------------------------*/ - - /* Astecc 68340 board : chip-select initialization values */ -_table_cs340: - dc.l 0x003FFFF0 /* Mask CS0 (4Mbytes PROM, 32bits, 0WS) */ - dc.l ((_PROM_Start&0xFFFFFF00)+0x00000003) /* Base CS0 */ - dc.l 0x0000FFFD /* MASK CS1 (RAMBCC340, 0WS, FTE) */ - dc.l ((_BCCram_Start&0xFFFFFF00)+0x00000003) /* Base CS1 */ - dc.l 0x000000FF /* MASK CS2 (FLEX, ext DTACK, 256 bytes) */ - dc.l ((_FLEX_Start&0xFFFFFF00)+0x00000003) /* Base CS2 */ - dc.l 0x000000FF /* Mask CS3 (I2C, ext DTACK, 256 bytes) */ - dc.l ((_I2C_Start&0xFFFFFF00)+0x00000003) /* Base CS3 */ - -cpu_is_68340: - - /* -- set cpu clock -- */ - move.w #_SPEED340,SIM_SYNCR(crt0_sim_base) | clock -sync_wait340: - btst.b #3,(SIM_SYNCR+1)(crt0_sim_base) - beq sync_wait340 - - /* -- chip select initialization -- */ - lea.l SIM_MASKH0(crt0_sim_base),crt0_ptr4 - lea.l _table_cs340(%pc),crt0_ptr3 - moveq.l #0x07,crt0_temp -_b_cs340: - move.l (crt0_ptr3)+,crt0_ptr5 - move.l crt0_ptr5,(crt0_ptr4)+ | pour test - dbra crt0_temp,_b_cs340 - - move.l #68340,crt0_cpu_type - move.b #0,crt0_csswitch | CPU - move.b #1,crt0_buswidth | 16 bits - - /*------------------------------------------------- - fill RAM if COLDSTART - -------------------------------------------------*/ -_fill_test: - - tst.l crt0_boot_type - bne _dont_fill - - cmp.b #_CPU349,SIM_IDR(crt0_sim_base) - bne _fill - btst.b #bit_meminit,crt0_pdcs - bne _dont_fill - - /* fill main memory */ -_fill: - move.l #_crt0_init_stack,crt0_ptr3 | skip Astecc vars - move.l #_ExtRam_Start,crt0_temp - sub.l #_crt0_init_stack,crt0_temp - add.l #_ExtRam_Size,crt0_temp | get size - lsr.l #2,crt0_temp | ajust for long word -_fill_loop: - clr.l (crt0_ptr3)+ - subq.l #1,crt0_temp - bne _fill_loop - - cmp.b #_CPU349,SIM_IDR(crt0_sim_base) - bne _fill_bccram - - /* fill QDMM memory */ - movea.l #_FastRam_Start,crt0_ptr3 | get start - move.l #_FastRam_Size,crt0_temp | get size - lsr.l #2,crt0_temp | ajust for long word - -_QDMMfill_loop: - clr.l (crt0_ptr3)+ - subq.l #1,crt0_temp - bne _QDMMfill_loop - bra _dont_fill - - /* fill BCC memory */ -_fill_bccram: - movea.l #_BCCram_Start,crt0_ptr3 | get start - move.l #_BCCram_Size,crt0_temp | get size - lsr.l #2,crt0_temp | ajust for long word -_BCCfill_loop: - clr.l (crt0_ptr3)+ - subq.l #1,crt0_temp - bne _BCCfill_loop - - /*-------------------------------------------------*/ -_dont_fill: - move.b crt0_csswitch,_AsteccCsSwitch - move.b crt0_buswidth,_AsteccBusWidth - move.l crt0_cpu_type,_AsteccCpuName - - jmp SYM(_Init68340) | Start C code (which never returns) - -/* - * Copy DATA segment, clear BSS segment, set up real stack, - * initialize heap, start C program. - * Assume that DATA and BSS sizes are multiples of 4. - */ - PUBLIC (_CopyDataClearBSSAndStart) -SYM(_CopyDataClearBSSAndStart): - lea SYM(_copy_start),a0 | Get start of DATA in RAM - lea SYM(_etext),a2 | Get start of DATA in ROM - cmpl a0,a2 | Are they the same? - beq.s NOCOPY | Yes, no copy necessary - lea SYM(_copy_end),a1 | Get end of DATA in RAM - bra.s COPYLOOPTEST | Branch into copy loop -COPYLOOP: - movel a2@+,a0@+ | Copy word from ROM to RAM -COPYLOOPTEST: - cmpl a1,a0 | Done? - bcs.s COPYLOOP | No, skip -NOCOPY: - - lea _clear_start,a0 | Get start of BSS - lea _clear_end,a1 | Get end of BSS - clrl d0 | Value to set - bra.s ZEROLOOPTEST | Branch into clear loop -ZEROLOOP: - movel d0,a0@+ | Clear a word -ZEROLOOPTEST: - cmpl a1,a0 | Done? - bcs.s ZEROLOOP | No, skip - - movel #_stack_init,a7 | set master stack pointer - movel d0,a7@- | command line - jsr SYM(boot_card) | Call C main - - PUBLIC (_mainDone) -SYM(_mainDone): - nop | Leave spot for breakpoint - movew #1,a7 | Force a double bus error - movel d0,a7@- | This should cause a RESET -/* stop #0x2700 | Stop with interrupts disabled */ - move.w #0x2700,sr - bra.l SYM(_mainDone) | Stuck forever - - .align 2 -BEGIN_DATA_DCL - .align 2 - PUBLIC (environ) -SYM (environ): - .long 0 - PUBLIC (_M68kSpuriousInterruptCount) -SYM (_M68kSpuriousInterruptCount): - .long 0 -END_DATA_DCL - -END diff --git a/c/src/lib/libbsp/m68k/gen68360/Makefile.am b/c/src/lib/libbsp/m68k/gen68360/Makefile.am index 42b1c51f5f..f4d4ec6319 100644 --- a/c/src/lib/libbsp/m68k/gen68360/Makefile.am +++ b/c/src/lib/libbsp/m68k/gen68360/Makefile.am @@ -8,7 +8,7 @@ dist_project_lib_DATA = startup/bsp_specs noinst_PROGRAMS = -start.$(OBJEXT): start/start.S +start.$(OBJEXT): ../../../../../../bsps/m68k/gen68360/start/start.S $(CPPASCOMPILE) -o $@ -c $< project_lib_DATA = start.$(OBJEXT) diff --git a/c/src/lib/libbsp/m68k/gen68360/start/start.S b/c/src/lib/libbsp/m68k/gen68360/start/start.S deleted file mode 100644 index 8511960e16..0000000000 --- a/c/src/lib/libbsp/m68k/gen68360/start/start.S +++ /dev/null @@ -1,418 +0,0 @@ -/* - * - * This file contains the entry point for the application. - * It jumps to the BSP which is responsible for performing - * all initialization. - * - * COPYRIGHT (c) 1989-1999. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may in - * the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - * - * Based on the `gen68302' board support package, and covered by the - * original distribution terms. - * - * W. Eric Norum - * Saskatchewan Accelerator Laboratory - * University of Saskatchewan - * Saskatoon, Saskatchewan, CANADA - * eric@skatter.usask.ca - */ - -#include <rtems/asm.h> - -BEGIN_CODE - /* - * Step 1: Decide on Reset Stack Pointer and Initial Program Counter - */ -Entry: - .long m360+1024 | 0: Initial SSP - .long start | 1: Initial PC - .long _uhoh | 2: Bus error - .long _uhoh | 3: Address error - .long _uhoh | 4: Illegal instruction - .long _uhoh | 5: Zero division - .long _uhoh | 6: CHK, CHK2 instruction - .long _uhoh | 7: TRAPcc, TRAPV instructions - .long _uhoh | 8: Privilege violation - .long _uhoh | 9: Trace - .long _uhoh | 10: Line 1010 emulator - .long _uhoh | 11: Line 1111 emulator - .long _uhoh | 12: Hardware breakpoint - .long _uhoh | 13: Reserved for coprocessor violation - .long _uhoh | 14: Format error - .long _uhoh | 15: Uninitialized interrupt - .long _uhoh | 16: Unassigned, reserved - .long _uhoh | 17: - .long _uhoh | 18: - .long _uhoh | 19: - .long _uhoh | 20: - .long _uhoh | 21: - .long _uhoh | 22: - .long _uhoh | 23: - .long _spuriousInterrupt | 24: Spurious interrupt - .long _uhoh | 25: Level 1 interrupt autovector - .long _uhoh | 26: Level 2 interrupt autovector - .long _uhoh | 27: Level 3 interrupt autovector - .long _uhoh | 28: Level 4 interrupt autovector - .long _uhoh | 29: Level 5 interrupt autovector - .long _uhoh | 30: Level 6 interrupt autovector - .long _uhoh | 31: Level 7 interrupt autovector - .long _uhoh | 32: Trap instruction (0-15) - .long _uhoh | 33: - .long _uhoh | 34: - .long _uhoh | 35: - .long _uhoh | 36: - .long _uhoh | 37: - .long _uhoh | 38: - .long _uhoh | 39: - .long _uhoh | 40: - .long _uhoh | 41: - .long _uhoh | 42: - .long _uhoh | 43: - .long _uhoh | 44: - .long _uhoh | 45: - .long _uhoh | 46: - .long _uhoh | 47: - .long _uhoh | 48: Reserved for coprocessor - .long _uhoh | 49: - .long _uhoh | 50: - .long _uhoh | 51: - .long _uhoh | 52: - .long _uhoh | 53: - .long _uhoh | 54: - .long _uhoh | 55: - .long _uhoh | 56: - .long _uhoh | 57: - .long _uhoh | 58: - .long _uhoh | 59: Unassigned, reserved - .long _uhoh | 60: - .long _uhoh | 61: - .long _uhoh | 62: - .long _uhoh | 63: - .long _uhoh | 64: User defined vectors (192) - .long _uhoh | 65: - .long _uhoh | 66: - .long _uhoh | 67: - .long _uhoh | 68: - .long _uhoh | 69: - .long _uhoh | 70: - .long _uhoh | 71: - .long _uhoh | 72: - .long _uhoh | 73: - .long _uhoh | 74: - .long _uhoh | 75: - .long _uhoh | 76: - .long _uhoh | 77: - .long _uhoh | 78: - .long _uhoh | 79: - .long _uhoh | 80: - .long _uhoh | 81: - .long _uhoh | 82: - .long _uhoh | 83: - .long _uhoh | 84: - .long _uhoh | 85: - .long _uhoh | 86: - .long _uhoh | 87: - .long _uhoh | 88: - .long _uhoh | 89: - .long _uhoh | 90: - .long _uhoh | 91: - .long _uhoh | 92: - .long _uhoh | 93: - .long _uhoh | 94: - .long _uhoh | 95: - .long _uhoh | 96: - .long _uhoh | 97: - .long _uhoh | 98: - .long _uhoh | 99: - .long _uhoh | 100: - .long _uhoh | 101: - .long _uhoh | 102: - .long _uhoh | 103: - .long _uhoh | 104: - .long _uhoh | 105: - .long _uhoh | 106: - .long _uhoh | 107: - .long _uhoh | 108: - .long _uhoh | 109: - .long _uhoh | 110: - .long _uhoh | 111: - .long _uhoh | 112: - .long _uhoh | 113: - .long _uhoh | 114: - .long _uhoh | 115: - .long _uhoh | 116: - .long _uhoh | 117: - .long _uhoh | 118: - .long _uhoh | 119: - .long _uhoh | 120: - .long _uhoh | 121: - .long _uhoh | 122: - .long _uhoh | 123: - .long _uhoh | 124: - .long _uhoh | 125: - .long _uhoh | 126: - .long _uhoh | 127: - .long _uhoh | 128: - .long _uhoh | 129: - .long _uhoh | 130: - .long _uhoh | 131: - .long _uhoh | 132: - .long _uhoh | 133: - .long _uhoh | 134: - .long _uhoh | 135: - .long _uhoh | 136: - .long _uhoh | 137: - .long _uhoh | 138: - .long _uhoh | 139: - .long _uhoh | 140: - .long _uhoh | 141: - .long _uhoh | 142: - .long _uhoh | 143: - .long _uhoh | 144: - .long _uhoh | 145: - .long _uhoh | 146: - .long _uhoh | 147: - .long _uhoh | 148: - .long _uhoh | 149: - .long _uhoh | 150: - .long _uhoh | 151: - .long _uhoh | 152: - .long _uhoh | 153: - .long _uhoh | 154: - .long _uhoh | 155: - .long _uhoh | 156: - .long _uhoh | 157: - .long _uhoh | 158: - .long _uhoh | 159: - .long _uhoh | 160: - .long _uhoh | 161: - .long _uhoh | 162: - .long _uhoh | 163: - .long _uhoh | 164: - .long _uhoh | 165: - .long _uhoh | 166: - .long _uhoh | 167: - .long _uhoh | 168: - .long _uhoh | 169: - .long _uhoh | 170: - .long _uhoh | 171: - .long _uhoh | 172: - .long _uhoh | 173: - .long _uhoh | 174: - .long _uhoh | 175: - .long _uhoh | 176: - .long _uhoh | 177: - .long _uhoh | 178: - .long _uhoh | 179: - .long _uhoh | 180: - .long _uhoh | 181: - .long _uhoh | 182: - .long _uhoh | 183: - .long _uhoh | 184: - .long _uhoh | 185: - .long _uhoh | 186: - .long _uhoh | 187: - .long _uhoh | 188: - .long _uhoh | 189: - .long _uhoh | 190: - .long _uhoh | 191: - .long _uhoh | 192: - .long _uhoh | 193: - .long _uhoh | 194: - .long _uhoh | 195: - .long _uhoh | 196: - .long _uhoh | 197: - .long _uhoh | 198: - .long _uhoh | 199: - .long _uhoh | 200: - .long _uhoh | 201: - .long _uhoh | 202: - .long _uhoh | 203: - .long _uhoh | 204: - .long _uhoh | 205: - .long _uhoh | 206: - .long _uhoh | 207: - .long _uhoh | 208: - .long _uhoh | 209: - .long _uhoh | 210: - .long _uhoh | 211: - .long _uhoh | 212: - .long _uhoh | 213: - .long _uhoh | 214: - .long _uhoh | 215: - .long _uhoh | 216: - .long _uhoh | 217: - .long _uhoh | 218: - .long _uhoh | 219: - .long _uhoh | 220: - .long _uhoh | 221: - .long _uhoh | 222: - .long _uhoh | 223: - .long _uhoh | 224: - .long _uhoh | 225: - .long _uhoh | 226: - .long _uhoh | 227: - .long _uhoh | 228: - .long _uhoh | 229: - .long _uhoh | 230: - .long _uhoh | 231: - .long _uhoh | 232: - .long _uhoh | 233: - .long _uhoh | 234: - .long _uhoh | 235: - .long _uhoh | 236: - .long _uhoh | 237: - .long _uhoh | 238: - .long _uhoh | 239: - .long _uhoh | 240: - .long _uhoh | 241: - .long _uhoh | 242: - .long _uhoh | 243: - .long _uhoh | 244: - .long _uhoh | 245: - .long _uhoh | 246: - .long _uhoh | 247: - .long _uhoh | 248: - .long _uhoh | 249: - .long _uhoh | 250: - .long _uhoh | 251: - .long _uhoh | 252: - .long _uhoh | 253: - .long _uhoh | 254: - .long _uhoh | 255: - -/* - * Default trap handler - * With an oscilloscope you can see AS* stop - */ - PUBLIC (_uhoh) -_uhoh: nop | Leave spot for breakpoint - stop #0x2700 | Stop with interrupts disabled - bra.l _uhoh | Stuck forever - -/* - * Log, but otherwise ignore, spurious interrupts - */ - PUBLIC (_spuriousInterrupt) -_spuriousInterrupt: - addql #1,_M68kSpuriousInterruptCount - rte - -/* - * Place the low-order 3 octets of the board's ethernet address at - * a `well-known' fixed location relative to the startup location. - */ - .align 2 - .word 0 | Padding -ethernet_address_buffer: - .word 0x08F3 | Default address - .word 0xDEAD - .word 0xCAFE - -/* - * Initial PC - */ -.globl start -start: - /* - * Step 2: Stay in Supervisor Mode - */ -#if ( M68K_HAS_SEPARATE_STACKS == 1 ) - oriw #0x3000,sr | Switch to Master Stack Pointer - lea SYM(m360)+1024-64,a7 | Put stack in dual-port ram - | a little below the interrupt stack -#endif - - /* - * Step 3: Write the VBR - */ - lea Entry,a0 | Get base of vector table - movec a0,vbr | Set up the VBR - - /* - * Step 4: Write the MBAR - */ - movec dfc,d1 | Save destination register - moveq #7,d0 | CPU-space funcction code - movec d0,dfc | Set destination function code register - movel #m360+0x101,d0 | MBAR value (mask CPU space accesses) - movesl d0,0x3FF00 | Set MBAR - movec d1,dfc | Restore destination register - - /* - * Step 5: Verify a dual-port RAM location - */ - lea m360,a0 | Point a0 to first DPRAM location - moveb #0x33,d0 | Set the test value - moveb d0,a0@ | Set the memory location - cmpb a0@,d0 | Does it read back? - bne _uhoh | If not, bad news! - notb d0 | Flip bits - moveb d0,a0@ | Set the memory location - cmpb a0@,d0 | Does it read back? - bne _uhoh | If not, bad news! - - /* - * Remaining steps are handled by C code - */ - jmp _Init68360 | Start C code (which never returns) - -/* - * Copy DATA segment, clear BSS segment, set up real stack, start C program. - * Assume that DATA and BSS sizes are multiples of 4. - */ - PUBLIC (_CopyDataClearBSSAndStart) -_CopyDataClearBSSAndStart: - lea _copy_start,a0 | Get start of DATA in RAM - lea etext,a2 | Get start of DATA in ROM - cmpl a0,a2 | Are they the same? - beq.s NOCOPY | Yes, no copy necessary - lea _copy_end,a1 | Get end of DATA in RAM - bra.s COPYLOOPTEST | Branch into copy loop -COPYLOOP: - movel a2@+,a0@+ | Copy word from ROM to RAM -COPYLOOPTEST: - cmpl a1,a0 | Done? - bcs.s COPYLOOP | No, skip -NOCOPY: - - lea _clear_start,a0 | Get start of BSS - lea _clear_end,a1 | Get end of BSS - clrl d0 | Value to set - bra.s ZEROLOOPTEST | Branch into clear loop -ZEROLOOP: - movel d0,a0@+ | Clear a word -ZEROLOOPTEST: - cmpl a1,a0 | Done? - bcs.s ZEROLOOP | No, skip - - movel #_stack_init,a7 | set master stack pointer - movel d0,a7@- | command line - jsr boot_card | Call C main - - PUBLIC (_mainDone) -_mainDone: - nop | Leave spot for breakpoint - movew #1,a7 | Force a double bus error - movel d0,a7@- | This should cause a RESET - stop #0x2700 | Stop with interrupts disabled - bra.l _mainDone | Stuck forever - - .align 2 -END_CODE - -BEGIN_DATA_DCL - .align 2 - PUBLIC (environ) -environ: - .long 0 - PUBLIC (_M68kSpuriousInterruptCount) -_M68kSpuriousInterruptCount: - .long 0 -END_DATA_DCL - -END diff --git a/c/src/lib/libbsp/m68k/genmcf548x/Makefile.am b/c/src/lib/libbsp/m68k/genmcf548x/Makefile.am index 3ba91a7f92..751ae37092 100644 --- a/c/src/lib/libbsp/m68k/genmcf548x/Makefile.am +++ b/c/src/lib/libbsp/m68k/genmcf548x/Makefile.am @@ -8,7 +8,7 @@ dist_project_lib_DATA = startup/bsp_specs noinst_PROGRAMS = -start.$(OBJEXT): start/start.S +start.$(OBJEXT): ../../../../../../bsps/m68k/genmcf548x/start/start.S $(CPPASCOMPILE) -o $@ -c $< project_lib_DATA = start.$(OBJEXT) diff --git a/c/src/lib/libbsp/m68k/genmcf548x/start/start.S b/c/src/lib/libbsp/m68k/genmcf548x/start/start.S deleted file mode 100644 index d4d1d9b273..0000000000 --- a/c/src/lib/libbsp/m68k/genmcf548x/start/start.S +++ /dev/null @@ -1,432 +0,0 @@ -/*===============================================================*\ -| Project: RTEMS generic mcf548x BSP | -+-----------------------------------------------------------------+ -| File: start.S | -+-----------------------------------------------------------------+ -| The file contains the assembly part of MCF548x init code | -+-----------------------------------------------------------------+ -| Copyright (c) 2007 | -| Embedded Brains GmbH | -| Obere Lagerstr. 30 | -| D-82178 Puchheim | -| Germany | -| rtems@embedded-brains.de | -+-----------------------------------------------------------------+ -| | -| Parts of the code has been derived from the "dBUG source code" | -| package Freescale is providing for M548X EVBs. The usage of | -| the modified or unmodified code and it's integration into the | -| generic mcf548x BSP has been done according to the Freescale | -| license terms. | -| | -| The Freescale license terms can be reviewed in the file | -| | -| Freescale_license.txt | -| | -+-----------------------------------------------------------------+ -| | -| The generic mcf548x BSP has been developed on the basic | -| structures and modules of the av5282 BSP. | -| | -+-----------------------------------------------------------------+ -| | -| The license and distribution terms for this file may be | -| found in the file LICENSE in this distribution or at | -| | -| http://www.rtems.org/license/LICENSE. | -| | -+-----------------------------------------------------------------+ -| | -| date history ID | -| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | -| 12.11.07 1.0 ras | -| | -\*===============================================================*/ - -/*===============================================================*\ -| Includes | -\*===============================================================*/ -#include <rtems/asm.h> -#include <bsp/linker-symbols.h> - -/*===============================================================*\ -| External references | -\*===============================================================*/ -.extern __MBAR -.extern _CoreSramBase0 -.extern _CoreSramBase1 -.extern _CoreSramSize1 -.extern mcf548x_init -.extern boot_card - -/*===============================================================*\ -| Global symbols | -\*===============================================================*/ - -.global interrupt_vector_table -.global spurious_int_count -.global start - - -/*===============================================================*\ -| Exception Table | -\*===============================================================*/ - -.section ".vectors","ax" /* begin of vectors section */ -PUBLIC (InterruptVectorTable) -SYM(InterruptVectorTable): -INITSP: .long bsp_initstack_end /* Initial SP */ -INITPC: .long start /* Initial PC */ -vector002: .long asm_default_interrupt /* Access Error */ -vector003: .long asm_default_interrupt /* Address Error */ -vector004: .long asm_default_interrupt /* Illegal Instruction */ -vector005: .long asm_default_interrupt /* Reserved */ -vector006: .long asm_default_interrupt /* Reserved */ -vector007: .long asm_default_interrupt /* Reserved */ -vector008: .long asm_default_interrupt /* Privilege Violation */ -vector009: .long asm_default_interrupt /* Trace */ -vector010: .long asm_default_interrupt /* Unimplemented A-Line */ -vector011: .long asm_default_interrupt /* Unimplemented F-Line */ -vector012: .long asm_default_interrupt /* Debug Interrupt */ -vector013: .long asm_default_interrupt /* Reserved */ -vector014: .long asm_default_interrupt /* Format Error */ -vector015: .long asm_default_interrupt /* Unitialized Int. */ -vector016: .long asm_default_interrupt /* Reserved */ -vector017: .long asm_default_interrupt /* Reserved */ -vector018: .long asm_default_interrupt /* Reserved */ -vector019: .long asm_default_interrupt /* Reserved */ -vector020: .long asm_default_interrupt /* Reserved */ -vector021: .long asm_default_interrupt /* Reserved */ -vector022: .long asm_default_interrupt /* Reserved */ -vector023: .long asm_default_interrupt /* Reserved */ -vector024: .long asm_spurious_interrupt /* Spurious Interrupt */ -vector025: .long asm_default_interrupt /* Autovector Level 1 */ -vector026: .long asm_default_interrupt /* Autovector Level 2 */ -vector027: .long asm_default_interrupt /* Autovector Level 3 */ -vector028: .long asm_default_interrupt /* Autovector Level 4 */ -vector029: .long asm_default_interrupt /* Autovector Level 5 */ -vector030: .long asm_default_interrupt /* Autovector Level 6 */ -vector031: .long asm_default_interrupt /* Autovector Level 7 */ -vector032: .long asm_default_interrupt /* TRAP #0 */ -vector033: .long asm_default_interrupt /* TRAP #1 */ -vector034: .long asm_default_interrupt /* TRAP #2 */ -vector035: .long asm_default_interrupt /* TRAP #3 */ -vector036: .long asm_default_interrupt /* TRAP #4 */ -vector037: .long asm_default_interrupt /* TRAP #5 */ -vector038: .long asm_default_interrupt /* TRAP #6 */ -vector039: .long asm_default_interrupt /* TRAP #7 */ -vector040: .long asm_default_interrupt /* TRAP #8 */ -vector041: .long asm_default_interrupt /* TRAP #9 */ -vector042: .long asm_default_interrupt /* TRAP #10 */ -vector043: .long asm_default_interrupt /* TRAP #11 */ -vector044: .long asm_default_interrupt /* TRAP #12 */ -vector045: .long asm_default_interrupt /* TRAP #13 */ -vector046: .long asm_default_interrupt /* TRAP #14 */ -vector047: .long asm_default_interrupt /* TRAP #15 */ -vector048: .long asm_default_interrupt /* Reserved */ -vector049: .long asm_default_interrupt /* Reserved */ -vector050: .long asm_default_interrupt /* Reserved */ -vector051: .long asm_default_interrupt /* Reserved */ -vector052: .long asm_default_interrupt /* Reserved */ -vector053: .long asm_default_interrupt /* Reserved */ -vector054: .long asm_default_interrupt /* Reserved */ -vector055: .long asm_default_interrupt /* Reserved */ -vector056: .long asm_default_interrupt /* Reserved */ -vector057: .long asm_default_interrupt /* Reserved */ -vector058: .long asm_default_interrupt /* Reserved */ -vector059: .long asm_default_interrupt /* Reserved */ -vector060: .long asm_default_interrupt /* Reserved */ -vector061: .long asm_default_interrupt /* Reserved */ -vector062: .long asm_default_interrupt /* Reserved */ -vector063: .long asm_default_interrupt /* Reserved */ -vector064: .long asm_default_interrupt -vector065: .long asm_default_interrupt -vector066: .long asm_default_interrupt -vector067: .long asm_default_interrupt -vector068: .long asm_default_interrupt -vector069: .long asm_default_interrupt -vector070: .long asm_default_interrupt -vector071: .long asm_default_interrupt -vector072: .long asm_default_interrupt -vector073: .long asm_default_interrupt -vector074: .long asm_default_interrupt -vector075: .long asm_default_interrupt -vector076: .long asm_default_interrupt -vector077: .long asm_default_interrupt -vector078: .long asm_default_interrupt -vector079: .long asm_default_interrupt -vector080: .long asm_default_interrupt -vector081: .long asm_default_interrupt -vector082: .long asm_default_interrupt -vector083: .long asm_default_interrupt -vector084: .long asm_default_interrupt -vector085: .long asm_default_interrupt -vector086: .long asm_default_interrupt -vector087: .long asm_default_interrupt -vector088: .long asm_default_interrupt -vector089: .long asm_default_interrupt -vector090: .long asm_default_interrupt -vector091: .long asm_default_interrupt -vector092: .long asm_default_interrupt -vector093: .long asm_default_interrupt -vector094: .long asm_default_interrupt -vector095: .long asm_default_interrupt -vector096: .long asm_default_interrupt -vector097: .long asm_default_interrupt -vector098: .long asm_default_interrupt -vector099: .long asm_default_interrupt -vector100: .long asm_default_interrupt -vector101: .long asm_default_interrupt -vector102: .long asm_default_interrupt -vector103: .long asm_default_interrupt -vector104: .long asm_default_interrupt -vector105: .long asm_default_interrupt -vector106: .long asm_default_interrupt -vector107: .long asm_default_interrupt -vector108: .long asm_default_interrupt -vector109: .long asm_default_interrupt -vector110: .long asm_default_interrupt -vector111: .long asm_default_interrupt -vector112: .long asm_default_interrupt -vector113: .long asm_default_interrupt -vector114: .long asm_default_interrupt -vector115: .long asm_default_interrupt -vector116: .long asm_default_interrupt -vector117: .long asm_default_interrupt -vector118: .long asm_default_interrupt -vector119: .long asm_default_interrupt -vector120: .long asm_default_interrupt -vector121: .long asm_default_interrupt -vector122: .long asm_default_interrupt -vector123: .long asm_default_interrupt -vector124: .long asm_default_interrupt -vector125: .long asm_default_interrupt -vector126: .long asm_default_interrupt -vector127: .long asm_default_interrupt -vector128: .long asm_default_interrupt -vector129: .long asm_default_interrupt -vector130: .long asm_default_interrupt -vector131: .long asm_default_interrupt -vector132: .long asm_default_interrupt -vector133: .long asm_default_interrupt -vector134: .long asm_default_interrupt -vector135: .long asm_default_interrupt -vector136: .long asm_default_interrupt -vector137: .long asm_default_interrupt -vector138: .long asm_default_interrupt -vector139: .long asm_default_interrupt -vector140: .long asm_default_interrupt -vector141: .long asm_default_interrupt -vector142: .long asm_default_interrupt -vector143: .long asm_default_interrupt -vector144: .long asm_default_interrupt -vector145: .long asm_default_interrupt -vector146: .long asm_default_interrupt -vector147: .long asm_default_interrupt -vector148: .long asm_default_interrupt -vector149: .long asm_default_interrupt -vector150: .long asm_default_interrupt -vector151: .long asm_default_interrupt -vector152: .long asm_default_interrupt -vector153: .long asm_default_interrupt -vector154: .long asm_default_interrupt -vector155: .long asm_default_interrupt -vector156: .long asm_default_interrupt -vector157: .long asm_default_interrupt -vector158: .long asm_default_interrupt -vector159: .long asm_default_interrupt -vector160: .long asm_default_interrupt -vector161: .long asm_default_interrupt -vector162: .long asm_default_interrupt -vector163: .long asm_default_interrupt -vector164: .long asm_default_interrupt -vector165: .long asm_default_interrupt -vector166: .long asm_default_interrupt -vector167: .long asm_default_interrupt -vector168: .long asm_default_interrupt -vector169: .long asm_default_interrupt -vector170: .long asm_default_interrupt -vector171: .long asm_default_interrupt -vector172: .long asm_default_interrupt -vector173: .long asm_default_interrupt -vector174: .long asm_default_interrupt -vector175: .long asm_default_interrupt -vector176: .long asm_default_interrupt -vector177: .long asm_default_interrupt -vector178: .long asm_default_interrupt -vector179: .long asm_default_interrupt -vector180: .long asm_default_interrupt -vector181: .long asm_default_interrupt -vector182: .long asm_default_interrupt -vector183: .long asm_default_interrupt -vector184: .long asm_default_interrupt -vector185: .long asm_default_interrupt -vector186: .long asm_default_interrupt -vector187: .long asm_default_interrupt -vector188: .long asm_default_interrupt -vector189: .long asm_default_interrupt -vector190: .long asm_default_interrupt -vector191: .long asm_default_interrupt -vector192: .long asm_default_interrupt -vector193: .long asm_default_interrupt -vector194: .long asm_default_interrupt -vector195: .long asm_default_interrupt -vector196: .long asm_default_interrupt -vector197: .long asm_default_interrupt -vector198: .long asm_default_interrupt -vector199: .long asm_default_interrupt -vector200: .long asm_default_interrupt -vector201: .long asm_default_interrupt -vector202: .long asm_default_interrupt -vector203: .long asm_default_interrupt -vector204: .long asm_default_interrupt -vector205: .long asm_default_interrupt -vector206: .long asm_default_interrupt -vector207: .long asm_default_interrupt -vector208: .long asm_default_interrupt -vector209: .long asm_default_interrupt -vector210: .long asm_default_interrupt -vector211: .long asm_default_interrupt -vector212: .long asm_default_interrupt -vector213: .long asm_default_interrupt -vector214: .long asm_default_interrupt -vector215: .long asm_default_interrupt -vector216: .long asm_default_interrupt -vector217: .long asm_default_interrupt -vector218: .long asm_default_interrupt -vector219: .long asm_default_interrupt -vector220: .long asm_default_interrupt -vector221: .long asm_default_interrupt -vector222: .long asm_default_interrupt -vector223: .long asm_default_interrupt -vector224: .long asm_default_interrupt -vector225: .long asm_default_interrupt -vector226: .long asm_default_interrupt -vector227: .long asm_default_interrupt -vector228: .long asm_default_interrupt -vector229: .long asm_default_interrupt -vector230: .long asm_default_interrupt -vector231: .long asm_default_interrupt -vector232: .long asm_default_interrupt -vector233: .long asm_default_interrupt -vector234: .long asm_default_interrupt -vector235: .long asm_default_interrupt -vector236: .long asm_default_interrupt -vector237: .long asm_default_interrupt -vector238: .long asm_default_interrupt -vector239: .long asm_default_interrupt -vector240: .long asm_default_interrupt -vector241: .long asm_default_interrupt -vector242: .long asm_default_interrupt -vector243: .long asm_default_interrupt -vector244: .long asm_default_interrupt -vector245: .long asm_default_interrupt -vector246: .long asm_default_interrupt -vector247: .long asm_default_interrupt -vector248: .long asm_default_interrupt -vector249: .long asm_default_interrupt -vector250: .long asm_default_interrupt -vector251: .long asm_default_interrupt -vector252: .long asm_default_interrupt -vector253: .long asm_default_interrupt -vector254: .long asm_default_interrupt -vector255: .long asm_default_interrupt - -/*===============================================================*\ -| Start of code | -\*===============================================================*/ -.text -PUBLIC (start) -SYM(start): - move.w #0x3700,sr /* disable interrupts */ - jmp start_init - -/*===============================================================*\ -| Sspurious interrupt counter | -\*===============================================================*/ -.align 4 -.data /* begin of data section */ -PUBLIC (spurious_int_count) -SYM(spurious_int_count): - .long 0 /* spurious interrupt counter */ - -/*===============================================================*\ -| Function: Default exception handler | -+-----------------------------------------------------------------+ -| - stop and disable all interrupts | -| - loop forever | -\*===============================================================*/ -.text /* start of text section */ -.align 4 -PUBLIC (asm_default_interrupt) -SYM(asm_default_interrupt): - nop - stop #0x3700 /* stop */ - bra.w asm_default_interrupt /* loop forever */ - -/*===============================================================*\ -| Function: Exception handler for spurious interrupts | -+-----------------------------------------------------------------+ -| - count spurious interrupts | -\*===============================================================*/ -.align 4 -PUBLIC (asm_spurious_interrupt) -SYM(asm_spurious_interrupt): - add.l #1,spurious_int_count - rte - -/*===============================================================*\ -| Function: start_init | -+-----------------------------------------------------------------+ -| - Disable all intterupts | -| - Setup the internal SRAM | -| - Initialize mcf548x peripherals | -| - Set initial stack pointer | -| - Boot RTEMS -\*===============================================================*/ -.align 4 -PUBLIC (start_init) -SYM(start_init): - - move.l #0x01040100,d0 /* invalidate instruction/data/branch cache, disable all caches */ - movec d0,cacr - - move.l #_CoreSramBase0,d0 /* initialize RAMBAR0 */ - add.l #0x21,d0 /* for code & data */ - movec d0,rambar0 - - move.l #_CoreSramBase1,d0 /* initialize RAMBAR1 */ - add.l #0x21,d0 /* for code & data */ - movec d0,rambar1 /* movec d0,RAMBAR1 */ - - move.l #__MBAR,d0 /* initialize MBAR */ - movec d0,mbar - - move.l #_CoreSramBase1,d0 /* set sp to end of Core SRAM temporarily */ - add.l #_CoreSramSize1,d0 - move.l d0,sp - - move.l #0,d0 /* initialize frame pointer */ - movea.l d0,a6 - - jsr mcf548x_init /* Initialize mcf548x peripherals */ - - move.l #bsp_initstack_end,sp /* relocate sp */ - - clrl d0 /* clear d0 */ - movel d0,a7@- /* command line == 0 */ - - jsr boot_card /* boot rtems */ - - movel a7@+,d0 - -exit_multitasking: - nop - nop - halt - bra exit_multitasking - -.end /* end of start.S module */ - - - diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/Makefile.am b/c/src/lib/libbsp/m68k/mcf5206elite/Makefile.am index 465a4f8b53..437ea430c9 100644 --- a/c/src/lib/libbsp/m68k/mcf5206elite/Makefile.am +++ b/c/src/lib/libbsp/m68k/mcf5206elite/Makefile.am @@ -10,7 +10,7 @@ _SUBDIRS = . tools -start.$(OBJEXT): start/start.S +start.$(OBJEXT): ../../../../../../bsps/m68k/mcf5206elite/start/start.S $(CPPASCOMPILE) -o $@ -c $< project_lib_DATA = start.$(OBJEXT) diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/start/start.S b/c/src/lib/libbsp/m68k/mcf5206elite/start/start.S deleted file mode 100644 index 57848ff92b..0000000000 --- a/c/src/lib/libbsp/m68k/mcf5206elite/start/start.S +++ /dev/null @@ -1,415 +0,0 @@ -/* - * MCF5206eLITE startup code - * - * This file contains the entry point for the application. - * The name of this entry point is compiler dependent. - * It jumps to the BSP which is responsible for performing - * all initialization. - */ - -/* - * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia - * Author: Victor V. Vengerov <vvv@oktet.ru> - * - * Based on work: - * Author: - * David Fiddes, D.J@fiddes.surfaid.org - * http://www.calm.hw.ac.uk/davidf/coldfire/ - * - * COPYRIGHT (c) 1989-1998. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#include <rtems/asm.h> -#include "bsp.h" - -BEGIN_CODE - -/* Initial stack situated in on-chip static memory */ -#define INITIAL_STACK BSP_MEM_ADDR_SRAM+BSP_MEM_SIZE_SRAM-4 - - PUBLIC (INTERRUPT_VECTOR) -SYM(INTERRUPT_VECTOR): - .long INITIAL_STACK | 00: initial SSP - .long start | 01: Initial PC - .long _unexp_exception | 02: Access Error - .long _unexp_exception | 03: Address Error - .long _unexp_exception | 04: Illegal Instruction - .long _reserved_int | 05: Reserved - .long _reserved_int | 06: Reserved - .long _reserved_int | 07: Reserved - .long _unexp_exception | 08: Priveledge Violation - .long _unexp_exception | 09: Trace - .long _unexp_exception | 0A: Unimplemented A-Line - .long _unexp_exception | 0B: Unimplemented F-Line - .long _unexp_exception | 0C: Debug interrupt - .long _reserved_int | 0D: Reserved - .long _unexp_exception | 0E: Format error - .long _unexp_exception | 0F: Uninitialized interrupt - .long _reserved_int | 10: Reserved - .long _reserved_int | 11: Reserved - .long _reserved_int | 12: Reserved - .long _reserved_int | 13: Reserved - .long _reserved_int | 14: Reserved - .long _reserved_int | 15: Reserved - .long _reserved_int | 16: Reserved - .long _reserved_int | 17: Reserved - .long _spurious_int | 18: Spurious interrupt - .long _avec1_int | 19: Autovector Level 1 - .long _avec2_int | 1A: Autovector Level 2 - .long _avec3_int | 1B: Autovector Level 3 - .long _avec4_int | 1C: Autovector Level 4 - .long _avec5_int | 1D: Autovector Level 5 - .long _avec6_int | 1E: Autovector Level 6 - .long _avec7_int | 1F: Autovector Level 7 - .long _unexp_exception | 20: TRAP #0 - .long _unexp_exception | 21: TRAP #1 - .long _unexp_exception | 22: TRAP #2 - .long _unexp_exception | 23: TRAP #3 - .long _unexp_exception | 24: TRAP #4 - .long _unexp_exception | 25: TRAP #5 - .long _unexp_exception | 26: TRAP #6 - .long _unexp_exception | 27: TRAP #7 - .long _unexp_exception | 28: TRAP #8 - .long _unexp_exception | 29: TRAP #9 - .long _unexp_exception | 2A: TRAP #10 - .long _unexp_exception | 2B: TRAP #11 - .long _unexp_exception | 2C: TRAP #12 - .long _unexp_exception | 2D: TRAP #13 - .long _unexp_exception | 2E: TRAP #14 - .long _unexp_exception | 2F: TRAP #15 - .long _reserved_int | 30: Reserved - .long _reserved_int | 31: Reserved - .long _reserved_int | 32: Reserved - .long _reserved_int | 33: Reserved - .long _reserved_int | 34: Reserved - .long _reserved_int | 35: Reserved - .long _reserved_int | 36: Reserved - .long _reserved_int | 37: Reserved - .long _reserved_int | 38: Reserved - .long _reserved_int | 39: Reserved - .long _reserved_int | 3A: Reserved - .long _reserved_int | 3B: Reserved - .long _reserved_int | 3C: Reserved - .long _reserved_int | 3D: Reserved - .long _reserved_int | 3E: Reserved - .long _reserved_int | 3F: Reserved - - .long _unexp_int | 40-FF: User defined interrupts - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - - .long _unexp_int | 50: - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - - .long _unexp_int | 60: - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - - .long _unexp_int | 70: - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - - .long _unexp_int | 80: - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - - .long _unexp_int | 90: - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - - .long _unexp_int | A0: - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - - .long _unexp_int | B0: - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - - .long _unexp_int | C0: - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - - .long _unexp_int | D0: - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - - .long _unexp_int | E0: - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - - .long _unexp_int | F0: - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - .long _unexp_int - - PUBLIC(start) -SYM(start): - move.w #0x2700,sr | First turn off all interrupts! - - move.l #(BSP_MEM_ADDR_SRAM + MCF5206E_RAMBAR_V),d0 - movec d0,rambar0 | ...so we have a stack - - move.l #(INITIAL_STACK),sp | Set up stack again (may be we are - | going here from monitor or with - | BDM interface assistance) - - /* - * Remainder of the startup code is handled by C code - */ - jmp SYM(Init5206e) | Start C code (which never returns) - -/*************************************************************************** - Function : CopyDataClearBSSAndStart - - Description : Copy DATA segment, clear BSS segment, initialize heap, - initialise real stack, start C program. Assume that DATA and BSS sizes - are multiples of 4. - ***************************************************************************/ - PUBLIC (CopyDataClearBSSAndStart) -SYM(CopyDataClearBSSAndStart): - lea copy_start,a0 | Get start of DATA in RAM - lea SYM(etext),a2 | Get start of DATA in ROM - cmpl a0,a2 | Are they the same? - beq.s NOCOPY | Yes, no copy necessary - lea copy_end,a1 | Get end of DATA in RAM - bra.s COPYLOOPTEST | Branch into copy loop -COPYLOOP: - movel a2@+,a0@+ | Copy word from ROM to RAM -COPYLOOPTEST: - cmpl a1,a0 | Done? - bcs.s COPYLOOP | No, skip -NOCOPY: - - lea clear_start,a0 | Get start of BSS - lea clear_end,a1 | Get end of BSS - clrl d0 | Value to set - bra.s ZEROLOOPTEST | Branch into clear loop -ZEROLOOP: - movel d0,a0@+ | Clear a word -ZEROLOOPTEST: - cmpl a1,a0 | Done? - bcs.s ZEROLOOP | No, skip - move 4(a7),d0 - - /* - * Right : Now we're ready to boot RTEMS - */ - clrl d0 | Pass in null to all boot_card() params - movel d0,a7@- | command line - jsr SYM(boot_card) | Call C boot_card function to startup RTEMS - -# Wait forever -_stop: - nop - stop #0x2700 - jmp _stop - -# The following labelled nops is a placeholders for breakpoints -_unexp_exception: - nop - jmp _stop - -_unexp_int: - nop - jmp _stop - -_reserved_int: - nop - jmp _stop - -_spurious_int: - nop - jmp _stop - -_avec1_int: - nop - jmp _unexp_int - -_avec2_int: - nop - jmp _unexp_int - -_avec3_int: - nop - jmp _unexp_int - -_avec4_int: - nop - jmp _unexp_int - -_avec5_int: - nop - jmp _unexp_int - -_avec6_int: - nop - jmp _unexp_int - -_avec7_int: - nop - jmp _unexp_int - -END_CODE - -END diff --git a/c/src/lib/libbsp/m68k/mcf52235/Makefile.am b/c/src/lib/libbsp/m68k/mcf52235/Makefile.am index c9138f2d66..49e66b59ca 100644 --- a/c/src/lib/libbsp/m68k/mcf52235/Makefile.am +++ b/c/src/lib/libbsp/m68k/mcf52235/Makefile.am @@ -8,7 +8,7 @@ dist_project_lib_DATA = startup/bsp_specs noinst_PROGRAMS = -start.$(OBJEXT): start/start.S +start.$(OBJEXT): ../../../../../../bsps/m68k/mcf52235/start/start.S $(CPPASCOMPILE) -o $@ -c $< project_lib_DATA = start.$(OBJEXT) diff --git a/c/src/lib/libbsp/m68k/mcf52235/start/start.S b/c/src/lib/libbsp/m68k/mcf52235/start/start.S deleted file mode 100644 index e1d837cab5..0000000000 --- a/c/src/lib/libbsp/m68k/mcf52235/start/start.S +++ /dev/null @@ -1,449 +0,0 @@ -/* - * mcf52235 startup code - * - * This file contains the entry point for the application. - * The name of this entry point is compiler dependent. - * It jumps to the BSP which is responsible for performing - * all initialization. - * - * COPYRIGHT (c) 1989-1998. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#include <rtems/asm.h> - -.extern _StackInit - -BEGIN_CODE - - PUBLIC (_INTERRUPT_VECTOR) -SYM(_INTERRUPT_VECTOR): - - .long _StackInit /* 00 Initial 'SSP' */ - .long SYM(start) /* 01 Initial PC */ - .long SYM(_uhoh) /* 02 Access Error */ - .long SYM(_uhoh) /* 03 Address Error */ - .long SYM(_uhoh) /* 04 Illegal Instruction */ - .long SYM(_uhoh) /* 05 Divide by Zero */ - .long SYM(_uhoh) /* 06 Reserved */ - .long SYM(_uhoh) /* 07 Reserved */ - .long SYM(_uhoh) /* 08 Privilege Violation */ - .long SYM(_uhoh) /* 09 Trace */ - .long SYM(_uhoh) /* 10 Unimplemented A-Line */ - .long SYM(_uhoh) /* 11 Unimplemented F-Line */ - .long SYM(_uhoh) /* 12 Debug Interrupt */ - .long SYM(_uhoh) /* 13 Reserved */ - .long SYM(_uhoh) /* 14 Format Error */ - .long SYM(_uhoh) /* 15 Reserved */ - .long SYM(_uhoh) /* 16 Reserved */ - .long SYM(_uhoh) /* 17 Reserved */ - .long SYM(_uhoh) /* 18 Reserved */ - .long SYM(_uhoh) /* 19 Reserved */ - .long SYM(_uhoh) /* 20 Reserved */ - .long SYM(_uhoh) /* 21 Reserved */ - .long SYM(_uhoh) /* 22 Reserved */ - .long SYM(_uhoh) /* 23 Reserved */ - .long SYM(_spuriousInterrupt) /* 24 Spurious Interrupt */ - .long SYM(_uhoh) /* 25 Reserved */ - .long SYM(_uhoh) /* 26 Reserved */ - .long SYM(_uhoh) /* 27 Reserved */ - .long SYM(_uhoh) /* 28 Reserved */ - .long SYM(_uhoh) /* 29 Reserved */ - .long SYM(_uhoh) /* 30 Reserved */ - .long SYM(_uhoh) /* 31 Reserved */ - .long SYM(_uhoh) /* 32 TRAP #0 */ - .long SYM(_uhoh) /* 33 TRAP #1 */ - .long SYM(_uhoh) /* 34 TRAP #2 */ - .long SYM(_uhoh) /* 35 TRAP #3 */ - .long SYM(_uhoh) /* 36 TRAP #4 */ - .long SYM(_uhoh) /* 37 TRAP #5 */ - .long SYM(_uhoh) /* 38 TRAP #6 */ - .long SYM(_uhoh) /* 39 TRAP #7 */ - .long SYM(_uhoh) /* 40 TRAP #8 */ - .long SYM(_uhoh) /* 41 TRAP #9 */ - .long SYM(_uhoh) /* 42 TRAP #10 */ - .long SYM(_uhoh) /* 43 TRAP #11 */ - .long SYM(_uhoh) /* 44 TRAP #12 */ - .long SYM(_uhoh) /* 45 TRAP #13 */ - .long SYM(_uhoh) /* 46 TRAP #14 */ - .long SYM(_uhoh) /* 47 TRAP #15 */ - .long SYM(_uhoh) /* 48 Reserved */ - .long SYM(_uhoh) /* 49 Reserved */ - .long SYM(_uhoh) /* 50 Reserved */ - .long SYM(_uhoh) /* 51 Reserved */ - .long SYM(_uhoh) /* 52 Reserved */ - .long SYM(_uhoh) /* 53 Reserved */ - .long SYM(_uhoh) /* 54 Reserved */ - .long SYM(_uhoh) /* 55 Reserved */ - .long SYM(_uhoh) /* 56 Reserved */ - .long SYM(_uhoh) /* 57 Reserved */ - .long SYM(_uhoh) /* 58 Reserved */ - .long SYM(_uhoh) /* 59 Reserved */ - .long SYM(_uhoh) /* 60 Reserved */ - .long SYM(_uhoh) /* 61 Reserved */ - .long SYM(_uhoh) /* 62 Reserved */ - .long SYM(_uhoh) /* 63 Reserved */ - - /* INTC0 */ - - .long SYM(_uhoh) /* 64*/ - .long SYM(_uhoh) /* 65*/ - .long SYM(_uhoh) /* 66*/ - .long SYM(_uhoh) /* 67*/ - .long SYM(_uhoh) /* 68*/ - .long SYM(_uhoh) /* 69*/ - .long SYM(_uhoh) /* 70*/ - .long SYM(_uhoh) /* 71*/ - .long SYM(_uhoh) /* 72*/ - .long SYM(_uhoh) /* 73*/ - .long SYM(_uhoh) /* 74*/ - .long SYM(_uhoh) /* 75*/ - .long SYM(_uhoh) /* 76*/ - .long SYM(_uhoh) /* 77*/ - .long SYM(_uhoh) /* 78*/ - .long SYM(_uhoh) /* 79*/ - .long SYM(_uhoh) /* 80*/ - .long SYM(_uhoh) /* 81*/ - .long SYM(_uhoh) /* 82*/ - .long SYM(_uhoh) /* 83*/ - .long SYM(_uhoh) /* 84*/ - .long SYM(_uhoh) /* 85*/ - .long SYM(_uhoh) /* 86*/ - .long SYM(_uhoh) /* 87*/ - .long SYM(_uhoh) /* 88*/ - .long SYM(_uhoh) /* 89*/ - .long SYM(_uhoh) /* 90*/ - .long SYM(_uhoh) /* 91*/ - .long SYM(_uhoh) /* 92*/ - .long SYM(_uhoh) /* 93*/ - .long SYM(_uhoh) /* 94*/ - .long SYM(_uhoh) /* 95*/ - .long SYM(_uhoh) /* 96*/ - .long SYM(_uhoh) /* 97*/ - .long SYM(_uhoh) /* 98*/ - .long SYM(_uhoh) /* 99*/ - .long SYM(_uhoh) /* 100*/ - .long SYM(_uhoh) /* 101*/ - .long SYM(_uhoh) /* 102*/ - .long SYM(_uhoh) /* 103*/ - .long SYM(_uhoh) /* 104*/ - .long SYM(_uhoh) /* 105*/ - .long SYM(_uhoh) /* 106*/ - .long SYM(_uhoh) /* 107*/ - .long SYM(_uhoh) /* 108*/ - .long SYM(_uhoh) /* 109*/ - .long SYM(_uhoh) /* 110*/ - .long SYM(_uhoh) /* 111*/ - .long SYM(_uhoh) /* 112*/ - .long SYM(_uhoh) /* 113*/ - .long SYM(_uhoh) /* 114*/ - .long SYM(_uhoh) /* 115*/ - .long SYM(_uhoh) /* 116*/ - .long SYM(_uhoh) /* 117*/ - .long SYM(_uhoh) /* 118*/ - .long SYM(_uhoh) /* 119*/ - .long SYM(_uhoh) /* 120*/ - .long SYM(_uhoh) /* 121*/ - .long SYM(_uhoh) /* 122*/ - .long SYM(_uhoh) /* 123*/ - .long SYM(_uhoh) /* 124*/ - .long SYM(_uhoh) /* 125*/ - .long SYM(_uhoh) /* 126*/ - .long SYM(_uhoh) /* 127*/ - - /* INTC1 */ - - .long SYM(_uhoh) /* 128*/ - .long SYM(_uhoh) /* 129*/ - .long SYM(_uhoh) /* 130*/ - .long SYM(_uhoh) /* 131*/ - .long SYM(_uhoh) /* 132*/ - .long SYM(_uhoh) /* 133*/ - .long SYM(_uhoh) /* 134*/ - .long SYM(_uhoh) /* 135*/ - .long SYM(_uhoh) /* 136*/ - .long SYM(_uhoh) /* 137*/ - .long SYM(_uhoh) /* 138*/ - .long SYM(_uhoh) /* 139*/ - .long SYM(_uhoh) /* 140*/ - .long SYM(_uhoh) /* 141*/ - .long SYM(_uhoh) /* 142*/ - .long SYM(_uhoh) /* 143*/ - .long SYM(_uhoh) /* 144*/ - .long SYM(_uhoh) /* 145*/ - .long SYM(_uhoh) /* 146*/ - .long SYM(_uhoh) /* 147*/ - .long SYM(_uhoh) /* 148*/ - .long SYM(_uhoh) /* 149*/ - .long SYM(_uhoh) /* 150*/ - .long SYM(_uhoh) /* 151*/ - .long SYM(_uhoh) /* 152*/ - .long SYM(_uhoh) /* 153*/ - .long SYM(_uhoh) /* 154*/ - .long SYM(_uhoh) /* 155*/ - .long SYM(_uhoh) /* 156*/ - .long SYM(_uhoh) /* 157*/ - .long SYM(_uhoh) /* 158*/ - .long SYM(_uhoh) /* 159*/ - .long SYM(_uhoh) /* 160*/ - .long SYM(_uhoh) /* 161*/ - .long SYM(_uhoh) /* 162*/ - .long SYM(_uhoh) /* 163*/ - .long SYM(_uhoh) /* 164*/ - .long SYM(_uhoh) /* 165*/ - .long SYM(_uhoh) /* 166*/ - .long SYM(_uhoh) /* 167*/ - .long SYM(_uhoh) /* 168*/ - .long SYM(_uhoh) /* 169*/ - .long SYM(_uhoh) /* 170*/ - .long SYM(_uhoh) /* 171*/ - .long SYM(_uhoh) /* 172*/ - .long SYM(_uhoh) /* 173*/ - .long SYM(_uhoh) /* 174*/ - .long SYM(_uhoh) /* 175*/ - .long SYM(_uhoh) /* 176*/ - .long SYM(_uhoh) /* 177*/ - .long SYM(_uhoh) /* 178*/ - .long SYM(_uhoh) /* 179*/ - .long SYM(_uhoh) /* 180*/ - .long SYM(_uhoh) /* 181*/ - .long SYM(_uhoh) /* 182*/ - .long SYM(_uhoh) /* 183*/ - .long SYM(_uhoh) /* 184*/ - .long SYM(_uhoh) /* 185*/ - .long SYM(_uhoh) /* 186*/ - .long SYM(_uhoh) /* 187*/ - .long SYM(_uhoh) /* 188*/ - .long SYM(_uhoh) /* 189*/ - .long SYM(_uhoh) /* 190*/ - .long SYM(_uhoh) /* 191*/ - .long SYM(_uhoh) /* 192*/ - - /* */ - - .long SYM(_uhoh) /* 193*/ - .long SYM(_uhoh) /* 194*/ - .long SYM(_uhoh) /* 195*/ - .long SYM(_uhoh) /* 196*/ - .long SYM(_uhoh) /* 197*/ - .long SYM(_uhoh) /* 198*/ - .long SYM(_uhoh) /* 199*/ - .long SYM(_uhoh) /* 200*/ - .long SYM(_uhoh) /* 201*/ - .long SYM(_uhoh) /* 202*/ - .long SYM(_uhoh) /* 203*/ - .long SYM(_uhoh) /* 204*/ - .long SYM(_uhoh) /* 205*/ - .long SYM(_uhoh) /* 206*/ - .long SYM(_uhoh) /* 207*/ - .long SYM(_uhoh) /* 208*/ - .long SYM(_uhoh) /* 209*/ - .long SYM(_uhoh) /* 210*/ - .long SYM(_uhoh) /* 211*/ - .long SYM(_uhoh) /* 212*/ - .long SYM(_uhoh) /* 213*/ - .long SYM(_uhoh) /* 214*/ - .long SYM(_uhoh) /* 215*/ - .long SYM(_uhoh) /* 216*/ - .long SYM(_uhoh) /* 217*/ - .long SYM(_uhoh) /* 218*/ - .long SYM(_uhoh) /* 219*/ - .long SYM(_uhoh) /* 220*/ - .long SYM(_uhoh) /* 221*/ - .long SYM(_uhoh) /* 222*/ - .long SYM(_uhoh) /* 223*/ - .long SYM(_uhoh) /* 224*/ - .long SYM(_uhoh) /* 225*/ - .long SYM(_uhoh) /* 226*/ - .long SYM(_uhoh) /* 227*/ - .long SYM(_uhoh) /* 228*/ - .long SYM(_uhoh) /* 229*/ - .long SYM(_uhoh) /* 230*/ - .long SYM(_uhoh) /* 231*/ - .long SYM(_uhoh) /* 232*/ - .long SYM(_uhoh) /* 233*/ - .long SYM(_uhoh) /* 234*/ - .long SYM(_uhoh) /* 235*/ - .long SYM(_uhoh) /* 236*/ - .long SYM(_uhoh) /* 237*/ - .long SYM(_uhoh) /* 238*/ - .long SYM(_uhoh) /* 239*/ - .long SYM(_uhoh) /* 240*/ - .long SYM(_uhoh) /* 241*/ - .long SYM(_uhoh) /* 242*/ - .long SYM(_uhoh) /* 243*/ - .long SYM(_uhoh) /* 244*/ - .long SYM(_uhoh) /* 245*/ - .long SYM(_uhoh) /* 246*/ - .long SYM(_uhoh) /* 247*/ - .long SYM(_uhoh) /* 248*/ - .long SYM(_uhoh) /* 249*/ - .long SYM(_uhoh) /* 250*/ - .long SYM(_uhoh) /* 251*/ - .long SYM(_uhoh) /* 252*/ - .long SYM(_uhoh) /* 253*/ - .long SYM(_uhoh) /* 254*/ - .long SYM(_uhoh) /* 255*/ - -/* - * We must write the flash configuration here. This portion of flash is shadowed - * by some flash registers, so we can't put code here! - */ - - PUBLIC (_FLASH_CONFIGURATION_FIELD) -SYM(_FLASH_CONFIGURATION_FIELD): - -_key_upper: .long 0x00000000 -_key_lower: .long 0x00000000 -_cfm_prot: .long 0x00000000 -_cfm_sacc: .long 0x00000000 -_cfm_dacc: .long 0x00000000 -_cfm_msec: .long 0x00000000 - -/* - * Default trap handler - * With an oscilloscope you can see AS* stop - */ -.align 4 - PUBLIC (_uhoh) -SYM(_uhoh): - nop | Leave spot for breakpoint - stop #0x2700 | Stop with interrupts disabled - bra.w SYM(_uhoh) | Stuck forever - -/* - * Spurious Interrupt Handler - */ -.align 4 - PUBLIC (_spuriousInterrupt) -SYM(_spuriousInterrupt): - addql #1, SYM(_M68kSpuriousInterruptCount) - rte - -/* - * Write VBR Register - */ -.align 4 - PUBLIC (_wr_vbr) -SYM(_wr_vbr): - move.l 4(sp), d0 - movec d0, vbr - nop - rts - -/* - * Board startup - * Disable watchdog, interrupts - * Enable sram - */ -.align 4 - PUBLIC (start) -SYM(start): - - /* Mask off interupts */ - move.w #0x2700, sr - - /* Save off reset values of D0 and D1 */ - move.l d0, d6 - move.l d1, d7 - - /* Initialize RAMBAR: locate SRAM and validate it */ - move.l #RamBase, d0 - add.l #0x21, d0 - movec d0, %rambar - - /* Locate Stack Pointer */ - move.l #_StackInit, sp - - /* Initialize FLASHBAR */ - move.l #_FlashBase, d0 - cmp.l #0x00000000, d0 - bne _change_flashbar - add.l #0x61, d0 - movec d0, %flashbar - -_continue_startup: - - /* Locate Stack Pointer */ - move.l #_StackInit, sp - - /* Save off intial D0 and D1 to RAM */ - move.l d6, SYM(_d0_reset) - move.l d7, SYM(_d1_reset) - - /* - * Remainder of the startup code is handled by C code - * This never returns - */ - jmp SYM(Init52235) - -_change_flashbar: - /* - * The following sequence is used to set FLASHBAR. Since we may - * be executing from Flash, we must put the routine into SRAM for - * execution and then jump back to Flash using the new address. - * - * The following instructions are coded into the SRAM: - * - * move.l #(__FLASH + 0x61),d0 - * movec d0, FLASHBAR - * jmp _continue_startup - * - * An arbitrary SRAM address is chosen until the real address - * can be loaded. - * - * This routine is not necessary if the default Flash address - * (0x00000000) is used. - * - * If running in SRAM, change_flashbar should not be executed - */ - - move.l #RamBase, a0 - - /* Code "move.l #(__FLASH + 0x61),d0" into SRAM */ - move.w #0x203C, d0 - move.w d0, (a0)+ - move.l #_FlashBase, d0 - add.l #0x61, d0 - move.l d0, (a0)+ - - /* Code "movec d0,FLASHBAR" into SRAM */ - move.l #0x4e7b0C04, d0 - move.l d0, (a0)+ - - /* Code "jmp _continue_startup" into SRAM */ - move.w #0x4EF9, d0 - move.w d0, (a0)+ - move.l #_continue_startup, d0 - move.l d0, (a0)+ - - /* Jump to code segment in internal SRAM */ - jmp RamBase - -END_CODE - - -BEGIN_DATA_DCL - - .align 4 - -PUBLIC (_M68kSpuriousInterruptCount) -SYM (_M68kSpuriousInterruptCount): - .long 0 - -PUBLIC (_d0_reset) -SYM (_d0_reset): - .long 0 - -PUBLIC (_d1_reset) -SYM (_d1_reset): - .long 0 - -END_DATA_DCL - -END - diff --git a/c/src/lib/libbsp/m68k/mcf5225x/Makefile.am b/c/src/lib/libbsp/m68k/mcf5225x/Makefile.am index f93dd98d5f..c269671497 100644 --- a/c/src/lib/libbsp/m68k/mcf5225x/Makefile.am +++ b/c/src/lib/libbsp/m68k/mcf5225x/Makefile.am @@ -8,7 +8,7 @@ dist_project_lib_DATA = startup/bsp_specs noinst_PROGRAMS = -start.$(OBJEXT): start/start.S +start.$(OBJEXT): ../../../../../../bsps/m68k/mcf5225x/start/start.S $(CPPASCOMPILE) -o $@ -c $< project_lib_DATA = start.$(OBJEXT) diff --git a/c/src/lib/libbsp/m68k/mcf5225x/start/start.S b/c/src/lib/libbsp/m68k/mcf5225x/start/start.S deleted file mode 100644 index abc7bb99cc..0000000000 --- a/c/src/lib/libbsp/m68k/mcf5225x/start/start.S +++ /dev/null @@ -1,450 +0,0 @@ -/* - * dpu-mcf52258 startup code - * - * This file contains the entry point for the application. - * The name of this entry point is compiler dependent. - * It jumps to the BSP which is responsible for performing - * all initialization. - * - * COPYRIGHT (c) 1989-1998. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#include <rtems/asm.h> - -.extern _StackInit - -BEGIN_CODE - - PUBLIC (_INTERRUPT_VECTOR) -SYM(_INTERRUPT_VECTOR): - - .long _StackInit /* 00 Initial 'SSP' */ - .long SYM(start) /* 01 Initial PC */ - .long SYM(_uhoh) /* 02 Access Error */ - .long SYM(_uhoh) /* 03 Address Error */ - .long SYM(_uhoh) /* 04 Illegal Instruction */ - .long SYM(_uhoh) /* 05 Divide by Zero */ - .long SYM(_uhoh) /* 06 Reserved */ - .long SYM(_uhoh) /* 07 Reserved */ - .long SYM(_uhoh) /* 08 Privilege Violation */ - .long SYM(_uhoh) /* 09 Trace */ - .long SYM(_uhoh) /* 10 Unimplemented A-Line */ - .long SYM(_uhoh) /* 11 Unimplemented F-Line */ - .long SYM(_uhoh) /* 12 Debug Interrupt */ - .long SYM(_uhoh) /* 13 Reserved */ - .long SYM(_uhoh) /* 14 Format Error */ - .long SYM(_uhoh) /* 15 Reserved */ - .long SYM(_uhoh) /* 16 Reserved */ - .long SYM(_uhoh) /* 17 Reserved */ - .long SYM(_uhoh) /* 18 Reserved */ - .long SYM(_uhoh) /* 19 Reserved */ - .long SYM(_uhoh) /* 20 Reserved */ - .long SYM(_uhoh) /* 21 Reserved */ - .long SYM(_uhoh) /* 22 Reserved */ - .long SYM(_uhoh) /* 23 Reserved */ - .long SYM(_spuriousInterrupt) /* 24 Spurious Interrupt */ - .long SYM(_uhoh) /* 25 Reserved */ - .long SYM(_uhoh) /* 26 Reserved */ - .long SYM(_uhoh) /* 27 Reserved */ - .long SYM(_uhoh) /* 28 Reserved */ - .long SYM(_uhoh) /* 29 Reserved */ - .long SYM(_uhoh) /* 30 Reserved */ - .long SYM(_uhoh) /* 31 Reserved */ - .long SYM(_uhoh) /* 32 TRAP #0 */ - .long SYM(_uhoh) /* 33 TRAP #1 */ - .long SYM(_uhoh) /* 34 TRAP #2 */ - .long SYM(_uhoh) /* 35 TRAP #3 */ - .long SYM(_uhoh) /* 36 TRAP #4 */ - .long SYM(_uhoh) /* 37 TRAP #5 */ - .long SYM(_uhoh) /* 38 TRAP #6 */ - .long SYM(_uhoh) /* 39 TRAP #7 */ - .long SYM(_uhoh) /* 40 TRAP #8 */ - .long SYM(_uhoh) /* 41 TRAP #9 */ - .long SYM(_uhoh) /* 42 TRAP #10 */ - .long SYM(_uhoh) /* 43 TRAP #11 */ - .long SYM(_uhoh) /* 44 TRAP #12 */ - .long SYM(_uhoh) /* 45 TRAP #13 */ - .long SYM(_uhoh) /* 46 TRAP #14 */ - .long SYM(_uhoh) /* 47 TRAP #15 */ - .long SYM(_uhoh) /* 48 Reserved */ - .long SYM(_uhoh) /* 49 Reserved */ - .long SYM(_uhoh) /* 50 Reserved */ - .long SYM(_uhoh) /* 51 Reserved */ - .long SYM(_uhoh) /* 52 Reserved */ - .long SYM(_uhoh) /* 53 Reserved */ - .long SYM(_uhoh) /* 54 Reserved */ - .long SYM(_uhoh) /* 55 Reserved */ - .long SYM(_uhoh) /* 56 Reserved */ - .long SYM(_uhoh) /* 57 Reserved */ - .long SYM(_uhoh) /* 58 Reserved */ - .long SYM(_uhoh) /* 59 Reserved */ - .long SYM(_uhoh) /* 60 Reserved */ - .long SYM(_uhoh) /* 61 Reserved */ - .long SYM(_uhoh) /* 62 Reserved */ - .long SYM(_uhoh) /* 63 Reserved */ - - /* INTC0 */ - - .long SYM(_uhoh) /* 64*/ - .long SYM(_uhoh) /* 65*/ - .long SYM(_uhoh) /* 66*/ - .long SYM(_uhoh) /* 67*/ - .long SYM(_uhoh) /* 68*/ - .long SYM(_uhoh) /* 69*/ - .long SYM(_uhoh) /* 70*/ - .long SYM(_uhoh) /* 71*/ - .long SYM(_uhoh) /* 72*/ - .long SYM(_uhoh) /* 73*/ - .long SYM(_uhoh) /* 74*/ - .long SYM(_uhoh) /* 75*/ - .long SYM(_uhoh) /* 76*/ - .long SYM(_uhoh) /* 77*/ - .long SYM(_uhoh) /* 78*/ - .long SYM(_uhoh) /* 79*/ - .long SYM(_uhoh) /* 80*/ - .long SYM(_uhoh) /* 81*/ - .long SYM(_uhoh) /* 82*/ - .long SYM(_uhoh) /* 83*/ - .long SYM(_uhoh) /* 84*/ - .long SYM(_uhoh) /* 85*/ - .long SYM(_uhoh) /* 86*/ - .long SYM(_uhoh) /* 87*/ - .long SYM(_uhoh) /* 88*/ - .long SYM(_uhoh) /* 89*/ - .long SYM(_uhoh) /* 90*/ - .long SYM(_uhoh) /* 91*/ - .long SYM(_uhoh) /* 92*/ - .long SYM(_uhoh) /* 93*/ - .long SYM(_uhoh) /* 94*/ - .long SYM(_uhoh) /* 95*/ - .long SYM(_uhoh) /* 96*/ - .long SYM(_uhoh) /* 97*/ - .long SYM(_uhoh) /* 98*/ - .long SYM(_uhoh) /* 99*/ - .long SYM(_uhoh) /* 100*/ - .long SYM(_uhoh) /* 101*/ - .long SYM(_uhoh) /* 102*/ - .long SYM(_uhoh) /* 103*/ - .long SYM(_uhoh) /* 104*/ - .long SYM(_uhoh) /* 105*/ - .long SYM(_uhoh) /* 106*/ - .long SYM(_uhoh) /* 107*/ - .long SYM(_uhoh) /* 108*/ - .long SYM(_uhoh) /* 109*/ - .long SYM(_uhoh) /* 110*/ - .long SYM(_uhoh) /* 111*/ - .long SYM(_uhoh) /* 112*/ - .long SYM(_uhoh) /* 113*/ - .long SYM(_uhoh) /* 114*/ - .long SYM(_uhoh) /* 115*/ - .long SYM(_uhoh) /* 116*/ - .long SYM(_uhoh) /* 117*/ - .long SYM(_uhoh) /* 118*/ - .long SYM(_uhoh) /* 119*/ - .long SYM(_uhoh) /* 120*/ - .long SYM(_uhoh) /* 121*/ - .long SYM(_uhoh) /* 122*/ - .long SYM(_uhoh) /* 123*/ - .long SYM(_uhoh) /* 124*/ - .long SYM(_uhoh) /* 125*/ - .long SYM(_uhoh) /* 126*/ - .long SYM(_uhoh) /* 127*/ - - /* INTC1 */ - - .long SYM(_uhoh) /* 128*/ - .long SYM(_uhoh) /* 129*/ - .long SYM(_uhoh) /* 130*/ - .long SYM(_uhoh) /* 131*/ - .long SYM(_uhoh) /* 132*/ - .long SYM(_uhoh) /* 133*/ - .long SYM(_uhoh) /* 134*/ - .long SYM(_uhoh) /* 135*/ - .long SYM(_uhoh) /* 136*/ - .long SYM(_uhoh) /* 137*/ - .long SYM(_uhoh) /* 138*/ - .long SYM(_uhoh) /* 139*/ - .long SYM(_uhoh) /* 140*/ - .long SYM(_uhoh) /* 141*/ - .long SYM(_uhoh) /* 142*/ - .long SYM(_uhoh) /* 143*/ - .long SYM(_uhoh) /* 144*/ - .long SYM(_uhoh) /* 145*/ - .long SYM(_uhoh) /* 146*/ - .long SYM(_uhoh) /* 147*/ - .long SYM(_uhoh) /* 148*/ - .long SYM(_uhoh) /* 149*/ - .long SYM(_uhoh) /* 150*/ - .long SYM(_uhoh) /* 151*/ - .long SYM(_uhoh) /* 152*/ - .long SYM(_uhoh) /* 153*/ - .long SYM(_uhoh) /* 154*/ - .long SYM(_uhoh) /* 155*/ - .long SYM(_uhoh) /* 156*/ - .long SYM(_uhoh) /* 157*/ - .long SYM(_uhoh) /* 158*/ - .long SYM(_uhoh) /* 159*/ - .long SYM(_uhoh) /* 160*/ - .long SYM(_uhoh) /* 161*/ - .long SYM(_uhoh) /* 162*/ - .long SYM(_uhoh) /* 163*/ - .long SYM(_uhoh) /* 164*/ - .long SYM(_uhoh) /* 165*/ - .long SYM(_uhoh) /* 166*/ - .long SYM(_uhoh) /* 167*/ - .long SYM(_uhoh) /* 168*/ - .long SYM(_uhoh) /* 169*/ - .long SYM(_uhoh) /* 170*/ - .long SYM(_uhoh) /* 171*/ - .long SYM(_uhoh) /* 172*/ - .long SYM(_uhoh) /* 173*/ - .long SYM(_uhoh) /* 174*/ - .long SYM(_uhoh) /* 175*/ - .long SYM(_uhoh) /* 176*/ - .long SYM(_uhoh) /* 177*/ - .long SYM(_uhoh) /* 178*/ - .long SYM(_uhoh) /* 179*/ - .long SYM(_uhoh) /* 180*/ - .long SYM(_uhoh) /* 181*/ - .long SYM(_uhoh) /* 182*/ - .long SYM(_uhoh) /* 183*/ - .long SYM(_uhoh) /* 184*/ - .long SYM(_uhoh) /* 185*/ - .long SYM(_uhoh) /* 186*/ - .long SYM(_uhoh) /* 187*/ - .long SYM(_uhoh) /* 188*/ - .long SYM(_uhoh) /* 189*/ - .long SYM(_uhoh) /* 190*/ - .long SYM(_uhoh) /* 191*/ - .long SYM(_uhoh) /* 192*/ - - /* */ - - .long SYM(_uhoh) /* 193*/ - .long SYM(_uhoh) /* 194*/ - .long SYM(_uhoh) /* 195*/ - .long SYM(_uhoh) /* 196*/ - .long SYM(_uhoh) /* 197*/ - .long SYM(_uhoh) /* 198*/ - .long SYM(_uhoh) /* 199*/ - .long SYM(_uhoh) /* 200*/ - .long SYM(_uhoh) /* 201*/ - .long SYM(_uhoh) /* 202*/ - .long SYM(_uhoh) /* 203*/ - .long SYM(_uhoh) /* 204*/ - .long SYM(_uhoh) /* 205*/ - .long SYM(_uhoh) /* 206*/ - .long SYM(_uhoh) /* 207*/ - .long SYM(_uhoh) /* 208*/ - .long SYM(_uhoh) /* 209*/ - .long SYM(_uhoh) /* 210*/ - .long SYM(_uhoh) /* 211*/ - .long SYM(_uhoh) /* 212*/ - .long SYM(_uhoh) /* 213*/ - .long SYM(_uhoh) /* 214*/ - .long SYM(_uhoh) /* 215*/ - .long SYM(_uhoh) /* 216*/ - .long SYM(_uhoh) /* 217*/ - .long SYM(_uhoh) /* 218*/ - .long SYM(_uhoh) /* 219*/ - .long SYM(_uhoh) /* 220*/ - .long SYM(_uhoh) /* 221*/ - .long SYM(_uhoh) /* 222*/ - .long SYM(_uhoh) /* 223*/ - .long SYM(_uhoh) /* 224*/ - .long SYM(_uhoh) /* 225*/ - .long SYM(_uhoh) /* 226*/ - .long SYM(_uhoh) /* 227*/ - .long SYM(_uhoh) /* 228*/ - .long SYM(_uhoh) /* 229*/ - .long SYM(_uhoh) /* 230*/ - .long SYM(_uhoh) /* 231*/ - .long SYM(_uhoh) /* 232*/ - .long SYM(_uhoh) /* 233*/ - .long SYM(_uhoh) /* 234*/ - .long SYM(_uhoh) /* 235*/ - .long SYM(_uhoh) /* 236*/ - .long SYM(_uhoh) /* 237*/ - .long SYM(_uhoh) /* 238*/ - .long SYM(_uhoh) /* 239*/ - .long SYM(_uhoh) /* 240*/ - .long SYM(_uhoh) /* 241*/ - .long SYM(_uhoh) /* 242*/ - .long SYM(_uhoh) /* 243*/ - .long SYM(_uhoh) /* 244*/ - .long SYM(_uhoh) /* 245*/ - .long SYM(_uhoh) /* 246*/ - .long SYM(_uhoh) /* 247*/ - .long SYM(_uhoh) /* 248*/ - .long SYM(_uhoh) /* 249*/ - .long SYM(_uhoh) /* 250*/ - .long SYM(_uhoh) /* 251*/ - .long SYM(_uhoh) /* 252*/ - .long SYM(_uhoh) /* 253*/ - .long SYM(_uhoh) /* 254*/ - .long SYM(_uhoh) /* 255*/ - -/* - * We must write the flash configuration here. - This portion of RAM is shadowed - * by some flash registers, so we can't put code here! - */ - - PUBLIC (_FLASH_CONFIGURATION_FIELD) -SYM(_FLASH_CONFIGURATION_FIELD): - -_key_upper: .long 0x5a5a5a5a -_key_lower: .long 0x5a5a5a5a -_cfm_prot: .long 0x00000000 -_cfm_sacc: .long 0x00000000 -_cfm_dacc: .long 0x00000000 -_cfm_msec: .long 0x80000000 //enable the KEYEN bit to bypass security in backdoor mode - -/* - * Default trap handler - * With an oscilloscope you can see AS* stop - */ -.align 4 - PUBLIC (_uhoh) -SYM(_uhoh): - nop | Leave spot for breakpoint - stop #0x2700 | Stop with interrupts disabled - bra.w SYM(_uhoh) | Stuck forever - -/* - * Spurious Interrupt Handler - */ -.align 4 - PUBLIC (_spuriousInterrupt) -SYM(_spuriousInterrupt): - addql #1, SYM(_M68kSpuriousInterruptCount) - rte - -/* - * Write VBR Register - */ - -/* -.align 4 - PUBLIC (_wr_vbr) -SYM(_wr_vbr): - move.l 4(sp), d0 - movec d0, vbr - nop - rts -*/ - -/* - * Board startup - * Disable watchdog, interrupts - * Enable sram - */ -.align 4 - PUBLIC (start) -SYM(start): - - /* Mask off interupts */ - move.w #0x2700, sr - - /* Save off intial D0 and D1 to NOT scratched registers conforming to ABI C calling convention */ - move.l d0,d5; - move.l d1,d6; - - /* Initialize RAMBAR: locate SRAM and validate it */ - move.l #RamBase, d7 - add.l #0x21, d7 - movec d7, %rambar - - /* Locate Stack Pointer */ - move.l #_StackInit, sp - - /* Initialize FLASHBAR */ - move.l #_FlashBase, d7 - cmp.l #0x00000000, d7 - bne _change_flashbar - add.l #0x61, d7 - movec d7, %flashbar - -_continue_startup: - - /* Locate Stack Pointer */ -// move.l #_StackInit, sp //is done automatically by the CPU - - /* - * Remainder of the startup code is handled by C code - * This never returns - */ - - jmp SYM(Init5225x) - -_change_flashbar: - /* - * The following sequence is used to set FLASHBAR. Since we may - * be executing from Flash, we must put the routine into SRAM for - * execution and then jump back to Flash using the new address. - * - * The following instructions are coded into the SRAM: - * - * move.l #(__FLASH + 0x61),d0 - * movec d0, FLASHBAR - * jmp _continue_startup - * - * An arbitrary SRAM address is chosen until the real address - * can be loaded. - * - * This routine is not necessary if the default Flash address - * (0x00000000) is used. - * - * If running in SRAM, change_flashbar should not be executed - */ - - move.l #RamBase, a0 - - /* Code "move.l #(__FLASH + 0x61),d0" into SRAM */ - move.w #0x203C, d0 - move.w d0, (a0)+ - move.l #_FlashBase, d0 - add.l #0x61, d0 - move.l d0, (a0)+ - - /* Code "movec d0,FLASHBAR" into SRAM */ - move.l #0x4e7b0C04, d0 - move.l d0, (a0)+ - - /* Code "jmp _continue_startup" into SRAM */ - move.w #0x4EF9, d0 - move.w d0, (a0)+ - move.l #_continue_startup, d0 - move.l d0, (a0)+ - - /* Jump to code segment in internal SRAM */ - jmp RamBase - -END_CODE - - -BEGIN_DATA_DCL - - .align 4 - -PUBLIC (_M68kSpuriousInterruptCount) -SYM (_M68kSpuriousInterruptCount): - .long 0 - -PUBLIC (_d0_reset) -SYM (_d0_reset): - .long 0 - -PUBLIC (_d1_reset) -SYM (_d1_reset): - .long 0 - -END_DATA_DCL - -END - diff --git a/c/src/lib/libbsp/m68k/mcf5235/Makefile.am b/c/src/lib/libbsp/m68k/mcf5235/Makefile.am index abc3b777d2..1aef14289e 100644 --- a/c/src/lib/libbsp/m68k/mcf5235/Makefile.am +++ b/c/src/lib/libbsp/m68k/mcf5235/Makefile.am @@ -7,7 +7,7 @@ dist_project_lib_DATA = startup/bsp_specs noinst_PROGRAMS = -start.$(OBJEXT): start/start.S +start.$(OBJEXT): ../../../../../../bsps/m68k/mcf5235/start/start.S $(CPPASCOMPILE) -o $@ -c $< project_lib_DATA = start.$(OBJEXT) diff --git a/c/src/lib/libbsp/m68k/mcf5235/start/start.S b/c/src/lib/libbsp/m68k/mcf5235/start/start.S deleted file mode 100644 index 66b8f487de..0000000000 --- a/c/src/lib/libbsp/m68k/mcf5235/start/start.S +++ /dev/null @@ -1,387 +0,0 @@ -/* - * mcf5235 startup code - * - * This file contains the entry point for the application. - * The name of this entry point is compiler dependent. - * It jumps to the BSP which is responsible for performing - * all initialization. - * - * COPYRIGHT (c) 1989-1998. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#include <rtems/asm.h> - -#define SRAM_SIZE (64*1024) -#define DEFAULT_IPSBAR 0x40000000 - -BEGIN_CODE -#define INITIAL_STACK __SRAMBASE+SRAM_SIZE-4 - - PUBLIC (INTERRUPT_VECTOR) -SYM(INTERRUPT_VECTOR): - .long INITIAL_STACK | 0: Initial 'SSP' - .long start | 1: Initial PC - .long SYM(_uhoh) | 2: Bus error - .long SYM(_uhoh) | 3: Address error - .long SYM(_uhoh) | 4: Illegal instruction - .long SYM(_uhoh) | 5: Zero division - .long SYM(_uhoh) | 6: CHK, CHK2 instruction - .long SYM(_uhoh) | 7: TRAPcc, TRAPV instructions - .long SYM(_uhoh) | 8: Privilege violation - .long SYM(_uhoh) | 9: Trace - .long SYM(_uhoh) | 10: Line 1010 emulator - .long SYM(_uhoh) | 11: Line 1111 emulator - .long SYM(_uhoh) | 12: Hardware breakpoint - .long SYM(_uhoh) | 13: Reserved for coprocessor violation - .long SYM(_uhoh) | 14: Format error - .long SYM(_uhoh) | 15: Uninitialized interrupt - .long SYM(_uhoh) | 16: Unassigned, reserved - .long SYM(_uhoh) | 17: - .long SYM(_uhoh) | 18: - .long SYM(_uhoh) | 19: - .long SYM(_uhoh) | 20: - .long SYM(_uhoh) | 21: - .long SYM(_uhoh) | 22: - .long SYM(_uhoh) | 23: - .long SYM(_spuriousInterrupt) | 24: Spurious interrupt - .long SYM(_uhoh) | 25: Level 1 interrupt autovector - .long SYM(_uhoh) | 26: Level 2 interrupt autovector - .long SYM(_uhoh) | 27: Level 3 interrupt autovector - .long SYM(_uhoh) | 28: Level 4 interrupt autovector - .long SYM(_uhoh) | 29: Level 5 interrupt autovector - .long SYM(_uhoh) | 30: Level 6 interrupt autovector - .long SYM(_uhoh) | 31: Level 7 interrupt autovector - .long SYM(_uhoh) | 32: Trap instruction (0-15) - .long SYM(_uhoh) | 33: - .long SYM(_uhoh) | 34: - .long SYM(_uhoh) | 35: - .long SYM(_uhoh) | 36: - .long SYM(_uhoh) | 37: - .long SYM(_uhoh) | 38: - .long SYM(_uhoh) | 39: - .long SYM(_uhoh) | 40: - .long SYM(_uhoh) | 41: - .long SYM(_uhoh) | 42: - .long SYM(_uhoh) | 43: - .long SYM(_uhoh) | 44: - .long SYM(_uhoh) | 45: - .long SYM(_uhoh) | 46: - .long SYM(_uhoh) | 47: - .long SYM(_uhoh) | 48: Reserved for coprocessor - .long SYM(_uhoh) | 49: - .long SYM(_uhoh) | 50: - .long SYM(_uhoh) | 51: - .long SYM(_uhoh) | 52: - .long SYM(_uhoh) | 53: - .long SYM(_uhoh) | 54: - .long SYM(_uhoh) | 55: - .long SYM(_uhoh) | 56: - .long SYM(_uhoh) | 57: - .long SYM(_uhoh) | 58: - .long SYM(_uhoh) | 59: Unassigned, reserved - .long SYM(_uhoh) | 60: - .long SYM(_uhoh) | 61: - .long SYM(_uhoh) | 62: - .long SYM(_uhoh) | 63: - .long SYM(_spuriousInterrupt) | 64: User spurious handler - .long SYM(_uhoh) | 65: - .long SYM(_uhoh) | 66: - .long SYM(_uhoh) | 67: - .long SYM(_uhoh) | 68: - .long SYM(_uhoh) | 69: - .long SYM(_uhoh) | 70: - .long SYM(_uhoh) | 71: - .long SYM(_uhoh) | 72: - .long SYM(_uhoh) | 73: - .long SYM(_uhoh) | 74: - .long SYM(_uhoh) | 75: - .long SYM(_uhoh) | 76: - .long SYM(_uhoh) | 77: - .long SYM(_uhoh) | 78: - .long SYM(_uhoh) | 79: - .long SYM(_uhoh) | 80: - .long SYM(_uhoh) | 81: - .long SYM(_uhoh) | 82: - .long SYM(_uhoh) | 83: - .long SYM(_uhoh) | 84: - .long SYM(_uhoh) | 85: - .long SYM(_uhoh) | 86: - .long SYM(_uhoh) | 87: - .long SYM(_uhoh) | 88: - .long SYM(_uhoh) | 89: - .long SYM(_uhoh) | 90: - .long SYM(_uhoh) | 91: - .long SYM(_uhoh) | 92: - .long SYM(_uhoh) | 93: - .long SYM(_uhoh) | 94: - .long SYM(_uhoh) | 95: - .long SYM(_uhoh) | 96: - .long SYM(_uhoh) | 97: - .long SYM(_uhoh) | 98: - .long SYM(_uhoh) | 99: - .long SYM(_uhoh) | 100: - .long SYM(_uhoh) | 101: - .long SYM(_uhoh) | 102: - .long SYM(_uhoh) | 103: - .long SYM(_uhoh) | 104: - .long SYM(_uhoh) | 105: - .long SYM(_uhoh) | 106: - .long SYM(_uhoh) | 107: - .long SYM(_uhoh) | 108: - .long SYM(_uhoh) | 109: - .long SYM(_uhoh) | 110: - .long SYM(_uhoh) | 111: - .long SYM(_uhoh) | 112: - .long SYM(_uhoh) | 113: - .long SYM(_uhoh) | 114: - .long SYM(_uhoh) | 115: - .long SYM(_uhoh) | 116: - .long SYM(_uhoh) | 117: - .long SYM(_uhoh) | 118: - .long SYM(_uhoh) | 119: - .long SYM(_uhoh) | 120: - .long SYM(_uhoh) | 121: - .long SYM(_uhoh) | 122: - .long SYM(_uhoh) | 123: - .long SYM(_uhoh) | 124: - .long SYM(_uhoh) | 125: - .long SYM(_uhoh) | 126: - .long SYM(_uhoh) | 127: - .long SYM(_uhoh) | 128: - .long SYM(_uhoh) | 129: - .long SYM(_uhoh) | 130: - .long SYM(_uhoh) | 131: - .long SYM(_uhoh) | 132: - .long SYM(_uhoh) | 133: - .long SYM(_uhoh) | 134: - .long SYM(_uhoh) | 135: - .long SYM(_uhoh) | 136: - .long SYM(_uhoh) | 137: - .long SYM(_uhoh) | 138: - .long SYM(_uhoh) | 139: - .long SYM(_uhoh) | 140: - .long SYM(_uhoh) | 141: - .long SYM(_uhoh) | 142: - .long SYM(_uhoh) | 143: - .long SYM(_uhoh) | 144: - .long SYM(_uhoh) | 145: - .long SYM(_uhoh) | 146: - .long SYM(_uhoh) | 147: - .long SYM(_uhoh) | 148: - .long SYM(_uhoh) | 149: - .long SYM(_uhoh) | 150: - .long SYM(_uhoh) | 151: - .long SYM(_uhoh) | 152: - .long SYM(_uhoh) | 153: - .long SYM(_uhoh) | 154: - .long SYM(_uhoh) | 155: - .long SYM(_uhoh) | 156: - .long SYM(_uhoh) | 157: - .long SYM(_uhoh) | 158: - .long SYM(_uhoh) | 159: - .long SYM(_uhoh) | 160: - .long SYM(_uhoh) | 161: - .long SYM(_uhoh) | 162: - .long SYM(_uhoh) | 163: - .long SYM(_uhoh) | 164: - .long SYM(_uhoh) | 165: - .long SYM(_uhoh) | 166: - .long SYM(_uhoh) | 167: - .long SYM(_uhoh) | 168: - .long SYM(_uhoh) | 169: - .long SYM(_uhoh) | 170: - .long SYM(_uhoh) | 171: - .long SYM(_uhoh) | 172: - .long SYM(_uhoh) | 173: - .long SYM(_uhoh) | 174: - .long SYM(_uhoh) | 175: - .long SYM(_uhoh) | 176: - .long SYM(_uhoh) | 177: - .long SYM(_uhoh) | 178: - .long SYM(_uhoh) | 179: - .long SYM(_uhoh) | 180: - .long SYM(_uhoh) | 181: - .long SYM(_uhoh) | 182: - .long SYM(_uhoh) | 183: - .long SYM(_uhoh) | 184: - .long SYM(_uhoh) | 185: - .long SYM(_uhoh) | 186: - .long SYM(_uhoh) | 187: - .long SYM(_uhoh) | 188: - .long SYM(_uhoh) | 189: - .long SYM(_uhoh) | 190: - .long SYM(_uhoh) | 191: - .long SYM(_uhoh) | 192: - .long SYM(_uhoh) | 193: - .long SYM(_uhoh) | 194: - .long SYM(_uhoh) | 195: - .long SYM(_uhoh) | 196: - .long SYM(_uhoh) | 197: - .long SYM(_uhoh) | 198: - .long SYM(_uhoh) | 199: - .long SYM(_uhoh) | 200: - .long SYM(_uhoh) | 201: - .long SYM(_uhoh) | 202: - .long SYM(_uhoh) | 203: - .long SYM(_uhoh) | 204: - .long SYM(_uhoh) | 205: - .long SYM(_uhoh) | 206: - .long SYM(_uhoh) | 207: - .long SYM(_uhoh) | 208: - .long SYM(_uhoh) | 209: - .long SYM(_uhoh) | 210: - .long SYM(_uhoh) | 211: - .long SYM(_uhoh) | 212: - .long SYM(_uhoh) | 213: - .long SYM(_uhoh) | 214: - .long SYM(_uhoh) | 215: - .long SYM(_uhoh) | 216: - .long SYM(_uhoh) | 217: - .long SYM(_uhoh) | 218: - .long SYM(_uhoh) | 219: - .long SYM(_uhoh) | 220: - .long SYM(_uhoh) | 221: - .long SYM(_uhoh) | 222: - .long SYM(_uhoh) | 223: - .long SYM(_uhoh) | 224: - .long SYM(_uhoh) | 225: - .long SYM(_uhoh) | 226: - .long SYM(_uhoh) | 227: - .long SYM(_uhoh) | 228: - .long SYM(_uhoh) | 229: - .long SYM(_uhoh) | 230: - .long SYM(_uhoh) | 231: - .long SYM(_uhoh) | 232: - .long SYM(_uhoh) | 233: - .long SYM(_uhoh) | 234: - .long SYM(_uhoh) | 235: - .long SYM(_uhoh) | 236: - .long SYM(_uhoh) | 237: - .long SYM(_uhoh) | 238: - .long SYM(_uhoh) | 239: - .long SYM(_uhoh) | 240: - .long SYM(_uhoh) | 241: - .long SYM(_uhoh) | 242: - .long SYM(_uhoh) | 243: - .long SYM(_uhoh) | 244: - .long SYM(_uhoh) | 245: - .long SYM(_uhoh) | 246: - .long SYM(_uhoh) | 247: - .long SYM(_uhoh) | 248: - .long SYM(_uhoh) | 249: - .long SYM(_uhoh) | 250: - .long SYM(_uhoh) | 251: - .long SYM(_uhoh) | 252: - .long SYM(_uhoh) | 253: - .long SYM(_uhoh) | 254: - .long SYM(_uhoh) | 255: - -/* - * Default trap handler - * With an oscilloscope you can see AS* stop - */ -.align 4 - PUBLIC (_uhoh) -SYM(_uhoh): - nop | Leave spot for breakpoint - stop #0x2700 | Stop with interrupts disabled - bra.w SYM(_uhoh) | Stuck forever - -.align 4 - PUBLIC (_spuriousInterrupt) -SYM(_spuriousInterrupt): - addql #1,SYM(_M68kSpuriousInterruptCount) - rte -/*************************************************************************** - Function : start - - Description : setup the internal SRAM for use and setup the INITIAL STACK ptr. - Also enable the internal peripherals - ***************************************************************************/ -.align 4 - PUBLIC (start) -SYM(start): - move.w #0x0000,d0 | Turn off watchdog timer - move.w d0, (0x40140000) - move.l #0x01000000,d0 | Set system frequency to 150 MHz - move.l d0, (0x40120000) - move.w #0x2700,sr | Disable interrupts - - move.l #__SRAMBASE+1,d0 | Enable the MCF5235 internal SRAM - movec d0,%rambar | ...so we have a stack - - move.l #0x20000201, d0 - move.l d0,(0x40000008) | set up 2nd RAMBAR to make 2nd port avail to FEC - - move.l #__IPSBAR+1,d0 | Enable the MCF5235 internal peripherals - move.l d0,DEFAULT_IPSBAR - - /* - * Remainder of the startup code is handled by C code - */ - jmp SYM(Init5235) | Start C code (which never returns) - -/*************************************************************************** - Function : CopyDataClearBSSAndStart - - Description : Copy DATA segment, Copy SRAM segment, clear BSS segment, - start C program. Assume that DATA and BSS sizes are multiples of 4. - ***************************************************************************/ -.align 4 - - PUBLIC (CopyDataClearBSSAndStart) -SYM(CopyDataClearBSSAndStart): - lea SYM(_data_dest_start),a0 | Get start of DATA in RAM - lea SYM(_data_src_start),a2 | Get start of DATA in ROM - cmpl a0,a2 | Are they the same? - beq.s NODATACOPY | Yes, no copy necessary - lea SYM(_data_dest_end),a1 | Get end of DATA in RAM - bra.s DATACOPYLOOPTEST | Branch into copy loop -DATACOPYLOOP: - movel a2@+,a0@+ | Copy word from ROM to RAM -DATACOPYLOOPTEST: - cmpl a1,a0 | Done? - bcs.s DATACOPYLOOP | No, skip -NODATACOPY: - -/* Now, clear BSS */ - lea _clear_start,a0 | Get start of BSS - lea _clear_end,a1 | Get end of BSS - clrl d0 | Value to set - bra.s ZEROLOOPTEST | Branch into clear loop -ZEROLOOP: - movel d0,a0@+ | Clear a word -ZEROLOOPTEST: - cmpl a1,a0 | Done? - bcs.s ZEROLOOP | No, skip - - - /* - * Right : Now we're ready to boot RTEMS - */ - clrl d0 | Pass in null to all boot_card() params - movel d0,a7@- | command line - jsr SYM(boot_card) | Call C boot_card function to startup RTEMS - movel a7@+,d0 -MULTI_TASK_EXIT: - nop - nop - trap #14 - bra MULTI_TASK_EXIT - .align 2 -END_CODE - -BEGIN_DATA_DCL - .align 2 - PUBLIC (_M68kSpuriousInterruptCount) -SYM (_M68kSpuriousInterruptCount): - .long 0 -END_DATA_DCL - -END - diff --git a/c/src/lib/libbsp/m68k/mcf5329/Makefile.am b/c/src/lib/libbsp/m68k/mcf5329/Makefile.am index 1be86750a6..9429d511e2 100644 --- a/c/src/lib/libbsp/m68k/mcf5329/Makefile.am +++ b/c/src/lib/libbsp/m68k/mcf5329/Makefile.am @@ -8,7 +8,7 @@ dist_project_lib_DATA = startup/bsp_specs noinst_PROGRAMS = -start.$(OBJEXT): start/start.S +start.$(OBJEXT): ../../../../../../bsps/m68k/mcf5329/start/start.S $(CPPASCOMPILE) -o $@ -c $< project_lib_DATA = start.$(OBJEXT) diff --git a/c/src/lib/libbsp/m68k/mcf5329/start/start.S b/c/src/lib/libbsp/m68k/mcf5329/start/start.S deleted file mode 100644 index 6063fdac74..0000000000 --- a/c/src/lib/libbsp/m68k/mcf5329/start/start.S +++ /dev/null @@ -1,379 +0,0 @@ -/* - * mcf52235 startup code - * - * This file contains the entry point for the application. - * The name of this entry point is compiler dependent. - * It jumps to the BSP which is responsible for performing - * all initialization. - * - * COPYRIGHT (c) 1989-1998. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#include <rtems/asm.h> - -.extern _StackInit - -BEGIN_CODE - - PUBLIC (_INTERRUPT_VECTOR) -SYM(_INTERRUPT_VECTOR): - - .long _StackInit /* 00 Initial 'SSP' */ - .long SYM(start) /* 01 Initial PC */ - .long SYM(_uhoh) /* 02 Access Error */ - .long SYM(_uhoh) /* 03 Address Error */ - .long SYM(_uhoh) /* 04 Illegal Instruction */ - .long SYM(_uhoh) /* 05 Divide by Zero */ - .long SYM(_uhoh) /* 06 Reserved */ - .long SYM(_uhoh) /* 07 Reserved */ - .long SYM(_uhoh) /* 08 Privilege Violation */ - .long SYM(_uhoh) /* 09 Trace */ - .long SYM(_uhoh) /* 10 Unimplemented A-Line */ - .long SYM(_uhoh) /* 11 Unimplemented F-Line */ - .long SYM(_uhoh) /* 12 Debug Interrupt */ - .long SYM(_uhoh) /* 13 Reserved */ - .long SYM(_uhoh) /* 14 Format Error */ - .long SYM(_uhoh) /* 15 Reserved */ - .long SYM(_uhoh) /* 16 Reserved */ - .long SYM(_uhoh) /* 17 Reserved */ - .long SYM(_uhoh) /* 18 Reserved */ - .long SYM(_uhoh) /* 19 Reserved */ - .long SYM(_uhoh) /* 20 Reserved */ - .long SYM(_uhoh) /* 21 Reserved */ - .long SYM(_uhoh) /* 22 Reserved */ - .long SYM(_uhoh) /* 23 Reserved */ - .long SYM(_spuriousInterrupt) /* 24 Spurious Interrupt */ - .long SYM(_uhoh) /* Reserved */ - .long SYM(_uhoh) /* Reserved */ - .long SYM(_uhoh) /* Reserved */ - .long SYM(_uhoh) /* Reserved */ - .long SYM(_uhoh) /* Reserved */ - .long SYM(_uhoh) /* Reserved */ - .long SYM(_uhoh) /* Reserved */ - .long SYM(_uhoh) /* 32 TRAP #0 */ - .long SYM(_uhoh) /* 33 TRAP #1 */ - .long SYM(_uhoh) /* 34 TRAP #2 */ - .long SYM(_uhoh) /* 35 TRAP #3 */ - .long SYM(_uhoh) /* 36 TRAP #4 */ - .long SYM(_uhoh) /* 37 TRAP #5 */ - .long SYM(_uhoh) /* 38 TRAP #6 */ - .long SYM(_uhoh) /* 39 TRAP #7 */ - .long SYM(_uhoh) /* 40 TRAP #8 */ - .long SYM(_uhoh) /* 41 TRAP #9 */ - .long SYM(_uhoh) /* 42 TRAP #10 */ - .long SYM(_uhoh) /* 43 TRAP #11 */ - .long SYM(_uhoh) /* 44 TRAP #12 */ - .long SYM(_uhoh) /* 45 TRAP #13 */ - .long SYM(_uhoh) /* 46 TRAP #14 */ - .long SYM(_uhoh) /* 47 TRAP #15 */ - .long SYM(_uhoh) /* 48 Reserved */ - .long SYM(_uhoh) /* 49 Reserved */ - .long SYM(_uhoh) /* 50 Reserved */ - .long SYM(_uhoh) /* 51 Reserved */ - .long SYM(_uhoh) /* 52 Reserved */ - .long SYM(_uhoh) /* 53 Reserved */ - .long SYM(_uhoh) /* 54 Reserved */ - .long SYM(_uhoh) /* 55 Reserved */ - .long SYM(_uhoh) /* 56 Reserved */ - .long SYM(_uhoh) /* 57 Reserved */ - .long SYM(_uhoh) /* 58 Reserved */ - .long SYM(_uhoh) /* 59 Reserved */ - .long SYM(_uhoh) /* 60 Reserved */ - .long SYM(_uhoh) /* 61 Reserved */ - .long SYM(_uhoh) /* 62 Reserved */ - .long SYM(_uhoh) /* 63 Reserved */ - - /* INTC0 */ - - .long SYM(_uhoh) /* 64*/ - .long SYM(_uhoh) /* 65*/ - .long SYM(_uhoh) /* 66*/ - .long SYM(_uhoh) /* 67*/ - .long SYM(_uhoh) /* 68*/ - .long SYM(_uhoh) /* 69*/ - .long SYM(_uhoh) /* 70*/ - .long SYM(_uhoh) /* 71*/ - .long SYM(_uhoh) /* 72*/ - .long SYM(_uhoh) /* 73*/ - .long SYM(_uhoh) /* 74*/ - .long SYM(_uhoh) /* 75*/ - .long SYM(_uhoh) /* 76*/ - .long SYM(_uhoh) /* 77*/ - .long SYM(_uhoh) /* 78*/ - .long SYM(_uhoh) /* 79*/ - .long SYM(_uhoh) /* 80*/ - .long SYM(_uhoh) /* 81*/ - .long SYM(_uhoh) /* 82*/ - .long SYM(_uhoh) /* 83*/ - .long SYM(_uhoh) /* 84*/ - .long SYM(_uhoh) /* 85*/ - .long SYM(_uhoh) /* 86*/ - .long SYM(_uhoh) /* 87*/ - .long SYM(_uhoh) /* 88*/ - .long SYM(_uhoh) /* 89*/ - .long SYM(_uhoh) /* 90*/ - .long SYM(_uhoh) /* 91*/ - .long SYM(_uhoh) /* 92*/ - .long SYM(_uhoh) /* 93*/ - .long SYM(_uhoh) /* 94*/ - .long SYM(_uhoh) /* 95*/ - .long SYM(_uhoh) /* 96*/ - .long SYM(_uhoh) /* 97*/ - .long SYM(_uhoh) /* 98*/ - .long SYM(_uhoh) /* 99*/ - .long SYM(_uhoh) /* 100*/ - .long SYM(_uhoh) /* 101*/ - .long SYM(_uhoh) /* 102*/ - .long SYM(_uhoh) /* 103*/ - .long SYM(_uhoh) /* 104*/ - .long SYM(_uhoh) /* 105*/ - .long SYM(_uhoh) /* 106*/ - .long SYM(_uhoh) /* 107*/ - .long SYM(_uhoh) /* 108*/ - .long SYM(_uhoh) /* 109*/ - .long SYM(_uhoh) /* 110*/ - .long SYM(_uhoh) /* 111*/ - .long SYM(_uhoh) /* 112*/ - .long SYM(_uhoh) /* 113*/ - .long SYM(_uhoh) /* 114*/ - .long SYM(_uhoh) /* 115*/ - .long SYM(_uhoh) /* 116*/ - .long SYM(_uhoh) /* 117*/ - .long SYM(_uhoh) /* 118*/ - .long SYM(_uhoh) /* 119*/ - .long SYM(_uhoh) /* 120*/ - .long SYM(_uhoh) /* 121*/ - .long SYM(_uhoh) /* 122*/ - .long SYM(_uhoh) /* 123*/ - .long SYM(_uhoh) /* 124*/ - .long SYM(_uhoh) /* 125*/ - .long SYM(_uhoh) /* 126*/ - .long SYM(_uhoh) /* 127*/ - - /* INTC1 */ - - .long SYM(_uhoh) /* 128*/ - .long SYM(_uhoh) /* 129*/ - .long SYM(_uhoh) /* 130*/ - .long SYM(_uhoh) /* 131*/ - .long SYM(_uhoh) /* 132*/ - .long SYM(_uhoh) /* 133*/ - .long SYM(_uhoh) /* 134*/ - .long SYM(_uhoh) /* 135*/ - .long SYM(_uhoh) /* 136*/ - .long SYM(_uhoh) /* 137*/ - .long SYM(_uhoh) /* 138*/ - .long SYM(_uhoh) /* 139*/ - .long SYM(_uhoh) /* 140*/ - .long SYM(_uhoh) /* 141*/ - .long SYM(_uhoh) /* 142*/ - .long SYM(_uhoh) /* 143*/ - .long SYM(_uhoh) /* 144*/ - .long SYM(_uhoh) /* 145*/ - .long SYM(_uhoh) /* 146*/ - .long SYM(_uhoh) /* 147*/ - .long SYM(_uhoh) /* 148*/ - .long SYM(_uhoh) /* 149*/ - .long SYM(_uhoh) /* 150*/ - .long SYM(_uhoh) /* 151*/ - .long SYM(_uhoh) /* 152*/ - .long SYM(_uhoh) /* 153*/ - .long SYM(_uhoh) /* 154*/ - .long SYM(_uhoh) /* 155*/ - .long SYM(_uhoh) /* 156*/ - .long SYM(_uhoh) /* 157*/ - .long SYM(_uhoh) /* 158*/ - .long SYM(_uhoh) /* 159*/ - .long SYM(_uhoh) /* 160*/ - .long SYM(_uhoh) /* 161*/ - .long SYM(_uhoh) /* 162*/ - .long SYM(_uhoh) /* 163*/ - .long SYM(_uhoh) /* 164*/ - .long SYM(_uhoh) /* 165*/ - .long SYM(_uhoh) /* 166*/ - .long SYM(_uhoh) /* 167*/ - .long SYM(_uhoh) /* 168*/ - .long SYM(_uhoh) /* 169*/ - .long SYM(_uhoh) /* 170*/ - .long SYM(_uhoh) /* 171*/ - .long SYM(_uhoh) /* 172*/ - .long SYM(_uhoh) /* 173*/ - .long SYM(_uhoh) /* 174*/ - .long SYM(_uhoh) /* 175*/ - .long SYM(_uhoh) /* 176*/ - .long SYM(_uhoh) /* 177*/ - .long SYM(_uhoh) /* 178*/ - .long SYM(_uhoh) /* 179*/ - .long SYM(_uhoh) /* 180*/ - .long SYM(_uhoh) /* 181*/ - .long SYM(_uhoh) /* 182*/ - .long SYM(_uhoh) /* 183*/ - .long SYM(_uhoh) /* 184*/ - .long SYM(_uhoh) /* 185*/ - .long SYM(_uhoh) /* 186*/ - .long SYM(_uhoh) /* 187*/ - .long SYM(_uhoh) /* 188*/ - .long SYM(_uhoh) /* 189*/ - .long SYM(_uhoh) /* 190*/ - .long SYM(_uhoh) /* 191*/ - .long SYM(_uhoh) /* 192*/ - - /* */ - - .long SYM(_uhoh) /* 193*/ - .long SYM(_uhoh) /* 194*/ - .long SYM(_uhoh) /* 195*/ - .long SYM(_uhoh) /* 196*/ - .long SYM(_uhoh) /* 197*/ - .long SYM(_uhoh) /* 198*/ - .long SYM(_uhoh) /* 199*/ - .long SYM(_uhoh) /* 200*/ - .long SYM(_uhoh) /* 201*/ - .long SYM(_uhoh) /* 202*/ - .long SYM(_uhoh) /* 203*/ - .long SYM(_uhoh) /* 204*/ - .long SYM(_uhoh) /* 205*/ - .long SYM(_uhoh) /* 206*/ - .long SYM(_uhoh) /* 207*/ - .long SYM(_uhoh) /* 208*/ - .long SYM(_uhoh) /* 209*/ - .long SYM(_uhoh) /* 210*/ - .long SYM(_uhoh) /* 211*/ - .long SYM(_uhoh) /* 212*/ - .long SYM(_uhoh) /* 213*/ - .long SYM(_uhoh) /* 214*/ - .long SYM(_uhoh) /* 215*/ - .long SYM(_uhoh) /* 216*/ - .long SYM(_uhoh) /* 217*/ - .long SYM(_uhoh) /* 218*/ - .long SYM(_uhoh) /* 219*/ - .long SYM(_uhoh) /* 220*/ - .long SYM(_uhoh) /* 221*/ - .long SYM(_uhoh) /* 222*/ - .long SYM(_uhoh) /* 223*/ - .long SYM(_uhoh) /* 224*/ - .long SYM(_uhoh) /* 225*/ - .long SYM(_uhoh) /* 226*/ - .long SYM(_uhoh) /* 227*/ - .long SYM(_uhoh) /* 228*/ - .long SYM(_uhoh) /* 229*/ - .long SYM(_uhoh) /* 230*/ - .long SYM(_uhoh) /* 231*/ - .long SYM(_uhoh) /* 232*/ - .long SYM(_uhoh) /* 233*/ - .long SYM(_uhoh) /* 234*/ - .long SYM(_uhoh) /* 235*/ - .long SYM(_uhoh) /* 236*/ - .long SYM(_uhoh) /* 237*/ - .long SYM(_uhoh) /* 238*/ - .long SYM(_uhoh) /* 239*/ - .long SYM(_uhoh) /* 240*/ - .long SYM(_uhoh) /* 241*/ - .long SYM(_uhoh) /* 242*/ - .long SYM(_uhoh) /* 243*/ - .long SYM(_uhoh) /* 244*/ - .long SYM(_uhoh) /* 245*/ - .long SYM(_uhoh) /* 246*/ - .long SYM(_uhoh) /* 247*/ - .long SYM(_uhoh) /* 248*/ - .long SYM(_uhoh) /* 249*/ - .long SYM(_uhoh) /* 250*/ - .long SYM(_uhoh) /* 251*/ - .long SYM(_uhoh) /* 252*/ - .long SYM(_uhoh) /* 253*/ - .long SYM(_uhoh) /* 254*/ - .long SYM(_uhoh) /* 255*/ - -/* - * Default trap handler - * With an oscilloscope you can see AS* stop - */ -.align 4 - PUBLIC (_uhoh) -SYM(_uhoh): - nop | Leave spot for breakpoint - stop #0x2700 | Stop with interrupts disabled - bra.w SYM(_uhoh) | Stuck forever - -/* - * Spurious Interrupt Handler - */ -.align 4 - PUBLIC (_spuriousInterrupt) -SYM(_spuriousInterrupt): - addql #1, SYM(_M68kSpuriousInterruptCount) - rte - -/* - * Write VBR Register - */ -.align 4 - PUBLIC (_wr_vbr) -SYM(_wr_vbr): - move.l 4(sp), d0 - movec d0, vbr - nop - rts - -/* - * Board startup - * Disable watchdog, interrupts - * Enable sram - */ -.align 4 - PUBLIC (start) -SYM(start): - - /* Mask off interupts */ - move.w #0x2700,sr - - /* Save off reset values of D0 and D1 */ - move.l d0,d6 - move.l d1,d7 - - /* Initialize RAMBAR1: locate SRAM and validate it */ - move.l #_CoreSRamBase,d0 - add.l #0x221,d0 - movec d0,%rambar - - /* Save off intial D0 and D1 to RAM */ - move.l d6, SYM(_d0_reset) - move.l d7, SYM(_d1_reset) - - /* Locate Stack Pointer */ - move.l #_StackInit,sp - - /* - * Remainder of the startup code is handled by C code - * This never returns - */ - jmp SYM(Init5329) - -END_CODE - - -BEGIN_DATA_DCL - - .align 4 - -PUBLIC (_M68kSpuriousInterruptCount) -SYM (_M68kSpuriousInterruptCount): - .long 0 - -PUBLIC (_d0_reset) -SYM (_d0_reset): - .long 0 - -PUBLIC (_d1_reset) -SYM (_d1_reset): - .long 0 - -END_DATA_DCL - -END - diff --git a/c/src/lib/libbsp/m68k/mrm332/Makefile.am b/c/src/lib/libbsp/m68k/mrm332/Makefile.am index 4677565797..11d6ea953c 100644 --- a/c/src/lib/libbsp/m68k/mrm332/Makefile.am +++ b/c/src/lib/libbsp/m68k/mrm332/Makefile.am @@ -7,7 +7,7 @@ dist_project_lib_DATA = startup/bsp_specs -start.$(OBJEXT): start/start.S +start.$(OBJEXT): ../../../../../../bsps/m68k/mrm332/start/start.S $(CPPASCOMPILE) -o $@ -c $< project_lib_DATA = start.$(OBJEXT) diff --git a/c/src/lib/libbsp/m68k/mrm332/start/start.S b/c/src/lib/libbsp/m68k/mrm332/start/start.S deleted file mode 100644 index 5e2bbebc8e..0000000000 --- a/c/src/lib/libbsp/m68k/mrm332/start/start.S +++ /dev/null @@ -1,71 +0,0 @@ -/** - * @file - * - * MRM332 Assembly Start Up Code - */ - -/* - * COPYRIGHT (c) 2000. - * Matt Cross <profesor@gweep.net> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - * - */ - -#include "mrm332.h" -#include <rtems/asm.h> -#include <rtems/m68k/sim.h> - -BEGIN_CODE - - /* Put the header necessary for the modified CPU32bug to automatically - start up rtems: */ -#if 1 -.long 0xbeefbeef ; -#endif -.long 0 ; -.long start ; - -.global start - start: - - oriw #0x0700,sr /* Mask off interupts */ - - // Set VBR to CPU32Bug vector table address - movel #0x0,d0 /* Use the initial vectors until we get going */ - movecl d0,vbr - - movel #end, d0 /* Next 3 instructions set stack pointer */ - addl #_StackSize,d0 /* sp = end + _StackSize from linker script */ - movel d0,sp - movel d0,a6 - - /* include in ram_init.S */ - /* - * Initalize the SIM module. - * The stack pointer is not usable until the RAM chip select lines - * are configured. The following code must remain inline. - */ - - /* Module Configuration Register */ - /* see section(s) 3.1.3-3.1.6 of the SIM Reference Manual */ - /* SIMCR etc and SAM macro all defined in sim.h found at */ - /* /cpukit/score/cpu/m68k/rtems/m68k/sim.h */ - /* The code below does the following: */ - /* - Sets Freeze Software Enable */ - /* - Turns off Show Cycle Enable */ - /* - Sets the location of SIM module mapping */ - /* - Sets the SIM Interrupt Arbitration Field */ - lea SIMCR, a0 - movew #FRZSW,d0 - oriw #SAM(0,8,SHEN),d0 - oriw #(MM*SIM_MM),d0 - oriw #SAM(SIM_IARB,0,IARB),d0 - movew d0, a0@ - - jsr start_c /* Jump to the C startup code */ - -END_CODE - diff --git a/c/src/lib/libbsp/m68k/mvme147/Makefile.am b/c/src/lib/libbsp/m68k/mvme147/Makefile.am index 846c77e37c..f3ca13d7ea 100644 --- a/c/src/lib/libbsp/m68k/mvme147/Makefile.am +++ b/c/src/lib/libbsp/m68k/mvme147/Makefile.am @@ -10,7 +10,7 @@ noinst_PROGRAMS = ## Zilog component header files -start.$(OBJEXT): ../shared/start/start.S +start.$(OBJEXT): ../../../../../../bsps/m68k/shared/start/start.S $(CPPASCOMPILE) -o $@ -c $< project_lib_DATA = start.$(OBJEXT) diff --git a/c/src/lib/libbsp/m68k/mvme147s/Makefile.am b/c/src/lib/libbsp/m68k/mvme147s/Makefile.am index f985e5454a..a295839808 100644 --- a/c/src/lib/libbsp/m68k/mvme147s/Makefile.am +++ b/c/src/lib/libbsp/m68k/mvme147s/Makefile.am @@ -10,7 +10,7 @@ noinst_PROGRAMS = ## Zilog component header files -start.$(OBJEXT): ../shared/start/start.S +start.$(OBJEXT): ../../../../../../bsps/m68k/shared/start/start.S $(CPPASCOMPILE) -o $@ -c $< project_lib_DATA = start.$(OBJEXT) diff --git a/c/src/lib/libbsp/m68k/mvme162/Makefile.am b/c/src/lib/libbsp/m68k/mvme162/Makefile.am index 72313a9473..229e73ecf3 100644 --- a/c/src/lib/libbsp/m68k/mvme162/Makefile.am +++ b/c/src/lib/libbsp/m68k/mvme162/Makefile.am @@ -9,7 +9,7 @@ noinst_PROGRAMS = ## Zilog component header files -start.$(OBJEXT): ../shared/start/start.S +start.$(OBJEXT): ../../../../../../bsps/m68k/shared/start/start.S $(CPPASCOMPILE) -o $@ -c $< project_lib_DATA = start.$(OBJEXT) diff --git a/c/src/lib/libbsp/m68k/mvme167/Makefile.am b/c/src/lib/libbsp/m68k/mvme167/Makefile.am index ac80bf6014..0fee829838 100644 --- a/c/src/lib/libbsp/m68k/mvme167/Makefile.am +++ b/c/src/lib/libbsp/m68k/mvme167/Makefile.am @@ -8,7 +8,7 @@ dist_project_lib_DATA = startup/bsp_specs noinst_PROGRAMS = -start.$(OBJEXT): ../shared/start/start.S +start.$(OBJEXT): ../../../../../../bsps/m68k/shared/start/start.S $(CPPASCOMPILE) -o $@ -c $< project_lib_DATA = start.$(OBJEXT) diff --git a/c/src/lib/libbsp/m68k/shared/start/start.S b/c/src/lib/libbsp/m68k/shared/start/start.S deleted file mode 100644 index b3a3c8b664..0000000000 --- a/c/src/lib/libbsp/m68k/shared/start/start.S +++ /dev/null @@ -1,147 +0,0 @@ -/* entry.s - * - * This file contains the entry point for the application. - * The name of this entry point is compiler dependent. - * It jumps to the BSP which is responsible for performing - * all initialization. - * - * COPYRIGHT (c) 1989-1999. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#include <rtems/asm.h> - -#if (M68K_COLDFIRE_ARCH == 0) /* All ColdFire BSPs must provide their own start vector */ - -BEGIN_CODE - | Default entry points for: - PUBLIC (start) | GNU - PUBLIC (M68Kvec) | Vector Table - -SYM (start): -SYM (M68Kvec): | standard location for vectors - nop | for linkers with problem - | location zero - jmp SYM (start_around) - - /* - * We can use the following space as our vector table - * if the CPU has a VBR or we can save vector table in it - * if the CPU does not. - */ - - .space 4088 | to avoid initial intr stack - | from 135BUG on MVME13? - | and start code at 0x4000 -SYM (vectors): - .space 1016 | reserve space for rest of vectors - -#if ( M68K_HAS_SEPARATE_STACKS == 1 ) -SYM (lowintstack): - .space 4092 | reserve for interrupt stack -SYM (hiintstack): - .space 4 | end of interrupt stack -#endif - - PUBLIC (start_around) -SYM (start_around): - move.w sr, SYM (initial_sr) - oriw #0x3700,sr | SUPV MODE,INTERRUPTS OFF!!! -#if ( M68K_HAS_SEPARATE_STACKS == 1 ) - movec isp,a0 - move.l a0, SYM (initial_isp) - movec usp,a0 - move.l a0, SYM (initial_usp) - movec msp,a0 - move.l a0, SYM (initial_msp) -#else - move.l a7, SYM (initial_msp) -#endif - - | - | zero out uninitialized data area - | -zerobss: - moveal # SYM (bsp_section_bss_end),a0 | find end of .bss - moveal # SYM (bsp_section_bss_begin),a1 | find beginning of .bss - movel #0,d0 - -loop: movel #0,a1@+ | to zero out uninitialized - cmpal a0,a1 - jlt loop | loop until _end reached - - movel # SYM (_stack_init),d0 | d0 = stop of stack - movw #0x3700,sr | SUPV MODE,INTERRUPTS OFF!!! - movel d0,a7 | set master stack pointer - movel d0,a6 | set base pointer - - /* - * RTEMS should maintain a separate interrupt stack on CPUs - * without one in hardware. This is currently not supported - * on versions of the m68k without a HW intr stack. - */ - -#if ( M68K_HAS_SEPARATE_STACKS == 1 ) - lea SYM (hiintstack),a0 | a0 = high end of intr stack - movec a0,isp | set interrupt stack -#endif - - movel #0,a7@- | push command line - jsr SYM (boot_card) - addl #12,a7 - -#if ( M68K_HAS_SEPARATE_STACKS == 1 ) - move.l SYM (initial_isp),a0 - movec a0,isp - move.l SYM (initial_usp),a0 - movec a0,usp - move.l SYM (initial_msp),a0 - movec a0,msp -#else - movea.l SYM (initial_msp),a7 -#endif - move.w SYM (initial_sr),sr - rts - -END_CODE - -BEGIN_DATA - - PUBLIC (start_frame) -SYM (start_frame): - .space 4,0 - -END_DATA - -BEGIN_BSS - - PUBLIC (initial_isp) -SYM (initial_isp): - .space 4 - - PUBLIC (initial_msp) -SYM (initial_msp): - .space 4 - - PUBLIC (initial_usp) -SYM (initial_usp): - .space 4 - - PUBLIC (initial_sr) -SYM (initial_sr): - .space 2 - - .align 16 - PUBLIC (starting_stack) -SYM (starting_stack): - .space 0x1000 - PUBLIC (_stack_init) -SYM (_stack_init): - -END_DATA -#endif -END diff --git a/c/src/lib/libbsp/m68k/uC5282/Makefile.am b/c/src/lib/libbsp/m68k/uC5282/Makefile.am index de7e43acb8..85d18e2309 100644 --- a/c/src/lib/libbsp/m68k/uC5282/Makefile.am +++ b/c/src/lib/libbsp/m68k/uC5282/Makefile.am @@ -8,7 +8,7 @@ dist_project_lib_DATA = startup/bsp_specs noinst_PROGRAMS = -start.$(OBJEXT): start/start.S +start.$(OBJEXT): ../../../../../../bsps/m68k/uC5282/start/start.S $(CPPASCOMPILE) -o $@ -c $< project_lib_DATA = start.$(OBJEXT) diff --git a/c/src/lib/libbsp/m68k/uC5282/start/start.S b/c/src/lib/libbsp/m68k/uC5282/start/start.S deleted file mode 100644 index 641c174a92..0000000000 --- a/c/src/lib/libbsp/m68k/uC5282/start/start.S +++ /dev/null @@ -1,403 +0,0 @@ -/* - * uC5282 startup code - * - * This file contains the entry point for the application. - * The name of this entry point is compiler dependent. - * It jumps to the BSP which is responsible for performing - * all initialization. - * - * COPYRIGHT (c) 1989-1998. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#include <rtems/asm.h> - -#define SRAM_SIZE (64*1024) -#define DEFAULT_IPSBAR 0x40000000 - -BEGIN_CODE - -/*************************************************************************** - Function : Entry - - Description : Entry point to the system. In a raw system we would have - put the initial stack pointer as the first 4 bytes. Instead we have to - provide a real instruction at the first location since we might be getting - started by dBUG after downloading from TFTP or FLASH. Hack in an - 'initial stack pointer' that actually is a jump to the start address! - ***************************************************************************/ -Entry: - - - nop ; jmp SYM(start) | 0: Initial 'SSP' 1: Initial PC - .long SYM(_uhoh) | 2: Bus error - .long SYM(_uhoh) | 3: Address error - .long SYM(_uhoh) | 4: Illegal instruction - .long SYM(_uhoh) | 5: Zero division - .long SYM(_uhoh) | 6: CHK, CHK2 instruction - .long SYM(_uhoh) | 7: TRAPcc, TRAPV instructions - .long SYM(_uhoh) | 8: Privilege violation - .long SYM(_uhoh) | 9: Trace - .long SYM(_uhoh) | 10: Line 1010 emulator - .long SYM(_uhoh) | 11: Line 1111 emulator - .long SYM(_uhoh) | 12: Hardware breakpoint - .long SYM(_uhoh) | 13: Reserved for coprocessor violation - .long SYM(_uhoh) | 14: Format error - .long SYM(_uhoh) | 15: Uninitialized interrupt - .long SYM(_uhoh) | 16: Unassigned, reserved - .long SYM(_uhoh) | 17: - .long SYM(_uhoh) | 18: - .long SYM(_uhoh) | 19: - .long SYM(_uhoh) | 20: - .long SYM(_uhoh) | 21: - .long SYM(_uhoh) | 22: - .long SYM(_uhoh) | 23: - .long SYM(_spuriousInterrupt) | 24: Spurious interrupt - .long SYM(_uhoh) | 25: Level 1 interrupt autovector - .long SYM(_uhoh) | 26: Level 2 interrupt autovector - .long SYM(_uhoh) | 27: Level 3 interrupt autovector - .long SYM(_uhoh) | 28: Level 4 interrupt autovector - .long SYM(_uhoh) | 29: Level 5 interrupt autovector - .long SYM(_uhoh) | 30: Level 6 interrupt autovector - .long SYM(_uhoh) | 31: Level 7 interrupt autovector - .long SYM(_uhoh) | 32: Trap instruction (0-15) - .long SYM(_uhoh) | 33: - .long SYM(_uhoh) | 34: - .long SYM(_uhoh) | 35: - .long SYM(_uhoh) | 36: - .long SYM(_uhoh) | 37: - .long SYM(_uhoh) | 38: - .long SYM(_uhoh) | 39: - .long SYM(_uhoh) | 40: - .long SYM(_uhoh) | 41: - .long SYM(_uhoh) | 42: - .long SYM(_uhoh) | 43: - .long SYM(_uhoh) | 44: - .long SYM(_uhoh) | 45: - .long SYM(_uhoh) | 46: - .long SYM(_uhoh) | 47: - .long SYM(_uhoh) | 48: Reserved for coprocessor - .long SYM(_uhoh) | 49: - .long SYM(_uhoh) | 50: - .long SYM(_uhoh) | 51: - .long SYM(_uhoh) | 52: - .long SYM(_uhoh) | 53: - .long SYM(_uhoh) | 54: - .long SYM(_uhoh) | 55: - .long SYM(_uhoh) | 56: - .long SYM(_uhoh) | 57: - .long SYM(_uhoh) | 58: - .long SYM(_uhoh) | 59: Unassigned, reserved - .long SYM(_uhoh) | 60: - .long SYM(_uhoh) | 61: - .long SYM(_uhoh) | 62: - .long SYM(_uhoh) | 63: - .long SYM(_spuriousInterrupt) | 64: User spurious handler - .long SYM(_uhoh) | 65: - .long SYM(_uhoh) | 66: - .long SYM(_uhoh) | 67: - .long SYM(_uhoh) | 68: - .long SYM(_uhoh) | 69: - .long SYM(_uhoh) | 70: - .long SYM(_uhoh) | 71: - .long SYM(_uhoh) | 72: - .long SYM(_uhoh) | 73: - .long SYM(_uhoh) | 74: - .long SYM(_uhoh) | 75: - .long SYM(_uhoh) | 76: - .long SYM(_uhoh) | 77: - .long SYM(_uhoh) | 78: - .long SYM(_uhoh) | 79: - .long SYM(_uhoh) | 80: - .long SYM(_uhoh) | 81: - .long SYM(_uhoh) | 82: - .long SYM(_uhoh) | 83: - .long SYM(_uhoh) | 84: - .long SYM(_uhoh) | 85: - .long SYM(_uhoh) | 86: - .long SYM(_uhoh) | 87: - .long SYM(_uhoh) | 88: - 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.long SYM(_uhoh) | 167: - .long SYM(_uhoh) | 168: - .long SYM(_uhoh) | 169: - .long SYM(_uhoh) | 170: - .long SYM(_uhoh) | 171: - .long SYM(_uhoh) | 172: - .long SYM(_uhoh) | 173: - .long SYM(_uhoh) | 174: - .long SYM(_uhoh) | 175: - .long SYM(_uhoh) | 176: - .long SYM(_uhoh) | 177: - .long SYM(_uhoh) | 178: - .long SYM(_uhoh) | 179: - .long SYM(_uhoh) | 180: - .long SYM(_uhoh) | 181: - .long SYM(_uhoh) | 182: - .long SYM(_uhoh) | 183: - .long SYM(_uhoh) | 184: - .long SYM(_uhoh) | 185: - .long SYM(_uhoh) | 186: - .long SYM(_uhoh) | 187: - .long SYM(_uhoh) | 188: - .long SYM(_uhoh) | 189: - .long SYM(_uhoh) | 190: - .long SYM(_uhoh) | 191: - .long SYM(_uhoh) | 192: - .long SYM(_uhoh) | 193: - .long SYM(_uhoh) | 194: - .long SYM(_uhoh) | 195: - .long SYM(_uhoh) | 196: - .long SYM(_uhoh) | 197: - .long SYM(_uhoh) | 198: - .long SYM(_uhoh) | 199: - .long SYM(_uhoh) | 200: - .long SYM(_uhoh) | 201: - .long SYM(_uhoh) | 202: - .long SYM(_uhoh) | 203: - .long SYM(_uhoh) | 204: - .long SYM(_uhoh) | 205: - .long SYM(_uhoh) | 206: - .long SYM(_uhoh) | 207: - .long SYM(_uhoh) | 208: - .long SYM(_uhoh) | 209: - .long SYM(_uhoh) | 210: - .long SYM(_uhoh) | 211: - .long SYM(_uhoh) | 212: - .long SYM(_uhoh) | 213: - .long SYM(_uhoh) | 214: - .long SYM(_uhoh) | 215: - .long SYM(_uhoh) | 216: - .long SYM(_uhoh) | 217: - .long SYM(_uhoh) | 218: - .long SYM(_uhoh) | 219: - .long SYM(_uhoh) | 220: - .long SYM(_uhoh) | 221: - .long SYM(_uhoh) | 222: - .long SYM(_uhoh) | 223: - .long SYM(_uhoh) | 224: - .long SYM(_uhoh) | 225: - .long SYM(_uhoh) | 226: - .long SYM(_uhoh) | 227: - .long SYM(_uhoh) | 228: - .long SYM(_uhoh) | 229: - .long SYM(_uhoh) | 230: - .long SYM(_uhoh) | 231: - .long SYM(_uhoh) | 232: - .long SYM(_uhoh) | 233: - .long SYM(_uhoh) | 234: - .long SYM(_uhoh) | 235: - .long SYM(_uhoh) | 236: - .long SYM(_uhoh) | 237: - .long SYM(_uhoh) | 238: - .long SYM(_uhoh) | 239: - .long SYM(_uhoh) | 240: - .long SYM(_uhoh) | 241: - .long SYM(_uhoh) | 242: - .long SYM(_uhoh) | 243: - .long SYM(_uhoh) | 244: - .long SYM(_uhoh) | 245: - .long SYM(_uhoh) | 246: - .long SYM(_uhoh) | 247: - .long SYM(_uhoh) | 248: - .long SYM(_uhoh) | 249: - .long SYM(_uhoh) | 250: - .long SYM(_uhoh) | 251: - .long SYM(_uhoh) | 252: - .long SYM(_uhoh) | 253: - .long SYM(_uhoh) | 254: - .long SYM(_uhoh) | 255: - -/* - * Default trap handler - * With an oscilloscope you can see AS* stop - */ -.align 4 - PUBLIC (_uhoh) -SYM(_uhoh): - nop | Leave spot for breakpoint - stop #0x2700 | Stop with interrupts disabled - bra.w SYM(_uhoh) | Stuck forever - -.align 4 - PUBLIC (_spuriousInterrupt) -SYM(_spuriousInterrupt): - addql #1,SYM(_M68kSpuriousInterruptCount) - rte - -.align 4 - PUBLIC (start) -SYM(start): - move.w #0x2700,sr | Disable interrupts - - /* - * If we're being started by the debugger, and the debugger has - * moved the IPSBAR, we're doomed........ - */ - move.l #__IPSBAR+1,d0 | Enable the MCF5282 internal peripherals - move.l d0,DEFAULT_IPSBAR - move.l #__SRAMBASE+0x201,d0 | Enable the MCF5282 internal SRAM - movec d0,%rambar | CPU-space copy of RAMBAR - move.l d0,DEFAULT_IPSBAR+8 | Memory-space copy of RAMBAR - move.l #__SRAMBASE+SRAM_SIZE-4,sp | Overwrite the fake stack pointer - - /* - * Copy the vector table to address 0 (VBR must be 0 mod 2^20) - * Leave the dBUG vectors (0-63) alone - */ - lea.l (64*4)+Entry,a0 - lea.l (64*4),a1 - move.l #(256-64)-1,d0 -vectcpy: - move.l a0@+,a1@+ | Copy the vector table - sub.l #1,d0 - bne.s vectcpy - - /* - * Remainder of the startup code is handled by C code - */ - jmp SYM(Init5282) | Start C code (which never returns) - -/*************************************************************************** - Function : CopyDataClearBSSAndStart - - Description : Copy DATA segment, Copy SRAM segment, clear BSS segment, - start C program. Assume that DATA and BSS sizes are multiples of 4. - ***************************************************************************/ -.align 4 - - PUBLIC (CopyDataClearBSSAndStart) -SYM(CopyDataClearBSSAndStart): - lea SYM(_data_dest_start),a0 | Get start of DATA in RAM - lea SYM(_data_src_start),a2 | Get start of DATA in ROM - sub.l #SYM(_header_offset),a2 | Change source by the amount of the header offset - cmpl a0,a2 | Are they the same? - beq.s NODATACOPY | Yes, no copy necessary - lea SYM(_data_dest_end),a1 | Get end of DATA in RAM - bra.s DATACOPYLOOPTEST | Branch into copy loop -DATACOPYLOOP: - movel a2@+,a0@+ | Copy word from ROM to RAM -DATACOPYLOOPTEST: - cmpl a1,a0 | Done? - bcs.s DATACOPYLOOP | No, skip -NODATACOPY: - -/* Now, clear BSS */ - lea _clear_start,a0 | Get start of BSS - lea _clear_end,a1 | Get end of BSS - clrl d0 | Value to set - bra.s ZEROLOOPTEST | Branch into clear loop -ZEROLOOP: - movel d0,a0@+ | Clear a word -ZEROLOOPTEST: - cmpl a1,a0 | Done? - bcs.s ZEROLOOP | No, skip - - - /* - * Right : Now we're ready to boot RTEMS - */ - clrl d0 | Pass in null to all boot_card() params - movel d0,a7@- | command line - jsr SYM(boot_card) | Call C boot_card function to startup RTEMS - movel a7@+,d0 -MULTI_TASK_EXIT: - nop - nop - trap #14 - bra MULTI_TASK_EXIT - - -END_CODE - - .align 2 -BEGIN_DATA_DCL - .align 2 - PUBLIC (_M68kSpuriousInterruptCount) -SYM (_M68kSpuriousInterruptCount): - .long 0 -END_DATA_DCL - -END - |