Patch from John Cotton <john.cotton@nrc.ca>, Charles-Antoine Gauthier

<charles.gauthier@iit.nrc.ca>, and Darlene A. Stewart
<Darlene.Stewart@nrc.ca> to add support for a number of very
significant things:

  + BSPs for many variations on the Motorola MBX8xx board series
  + Cache Manager including initial support for m68040
    and PowerPC
  + Rework of mpc8xx libcpu code so all mpc8xx CPUs now use
    same code base.
  + Rework of eth_comm BSP to utiltize above.

John reports this works on the 821 and 860

7 files changed, 173 insertions, 69 deletions

diff --git a/c/src/lib/libbsp/m68k/gen68360/startup/bspstart.c b/c/src/lib/libbsp/m68k/gen68360/startup/bspstart.c
index e129f2279e..80ca1749a4 100644
--- a/c/src/lib/libbsp/m68k/gen68360/startup/bspstart.c
+++ b/c/src/lib/libbsp/m68k/gen68360/startup/bspstart.c
@@ -32,6 +32,9 @@ rtems_cpu_table Cpu_table;
 
 char *rtems_progname;
 
+/* Amount of RAM on this board. Dynamically set in start.S */
+unsigned long _M68K_RamSize;
+
 /*
  *  Use the shared implementations of the following routines
  */
diff --git a/c/src/lib/libbsp/m68k/mvme167/README b/c/src/lib/libbsp/m68k/mvme167/README
index dc72a6fc48..861d07eac4 100644
--- a/c/src/lib/libbsp/m68k/mvme167/README
+++ b/c/src/lib/libbsp/m68k/mvme167/README
@@ -8,11 +8,12 @@ Please send any comments, improvements, or bug reports to:
 
 Charles-Antoine Gauthier
 charles.gauthier@nrc.ca
+
 or
 
 Darlene Stewart
 Darlene.Stewart@nrc.ca
-
+  
 Software Engineering Group
 Institute for Information Technology
 National Research Council of Canada
@@ -20,19 +21,6 @@ Ottawa, ON, K1A 0R6
 Canada
 
 
-WARNING:
---------
-
-The network driver is currently being worked on. It is somewhat functional,
-but it does run out of buffers under certain conditions. The code is
-also undergoing a substantial reorganization. Before making any changes,
-you should check with us for the availability of updates.
-
-Note from Joel:  The ttcp performance reported is very nice even if the
-driver is still early in its life. :)
-
-  
-
 Disclaimer
 ----------
 
@@ -67,7 +55,6 @@ this file if you want S-records.
 
 Port Description
 Console driver
-
 ---------------
 
 This BSP includes an termios-capable console driver that supports all
@@ -147,8 +134,62 @@ mvme167.cfg that redefine which variants of libc, libm and libgcc to link
 against.
 
 
+Configuration Parameters
+
+If Jumper J1-4 is installed, certain configuration parameters may be read from
+the first 31 bytes of User Area NVRAM starting at 0xFFFC0000. In this case, the
+user is responsible for writing the appropriate values to this memory location
+(via 167Bug) in order to alter the default behaviour. A zero value results in
+the default behaviour. The paramaters that are configurable and their default
+settings are described below. 
+
+	Data Cache Enable (0xFFFC0000 - 1 byte)
+		write a non-zero value to this location to enable the data cache
+		default: disabled
+	
+	Instruction Cache Activation (0xFFFC0001 - 1 byte)
+		write a non-zero value to this location to enable the instruction cache
+		default: disabled
+		
+	Cache Mode (0xFFFC0002 - 2 bytes)
+		0xFFF0 = cachable, write-through
+		0xFFF1 = cachable, copyback
+		0xFFF2 = noncachable, serialized
+		0xFFF3 = noncachable,
+		default: cachable, copyback
+
+	IP Address (0xFFFC0004 - 4 bytes)
+		write the hexidecimal representation of the board's IP address in this
+		location for example, 192.168.1.2 = 0xC0A80102
+		default: obtain the IP address from an rtems_bsdnet_ifconfig structure
+
+	Netmask (0xFFFC0008 - 4 bytes)
+		write the hexidecimal representation of the netmask in this location
+		for example, 255.255.255.0 = 0xFFFFFF00
+		default: obtain the netmask from an rtems_bsdnet_ifconfig structure
+		
+	Ethernet Address (0xFFFC000C - 6 bytes)
+		write the board's hardware address in this location
+		default: obtain the hardware address from an rtems_bsdnet_ifconfig structure
+
+	Processor ID (0xFFFC0012 - 2 bytes)
+		reserved for future use
+		
+	RMA start (0xFFFC0014 - 4 bytes)
+		reserved for future use
+		
+	VMA start (0xFFFC0018 - 4 bytes)
+		reserved for future use
+		
+	RamSize (0xFFFC001C - 4 bytes)
+		reserved for future use
+
+
 Cache Control and Memory Mapping
 
+If configuration is not obtained from non-volatile RAM (ie. J1-4 is off),
+cache control is done through the remaining J1 jumpers as follows:
+
 If Jumper J1-7 is installed, the data cache will be turned on. If Jumper
 J1-6 is installed, the instruction cache will be turned on. Removing the
 jumper causes the corresponding cache to be left disabled.
@@ -500,4 +541,3 @@ Timing tests:
     rtems_rate_monotonic_period: conclude periods -- caller blocks 25
     rtems_rate_monotonic_period: obtain status 13
 
-
diff --git a/c/src/lib/libbsp/m68k/mvme167/bsp_specs b/c/src/lib/libbsp/m68k/mvme167/bsp_specs
index efee788065..be4a31edff 100644
--- a/c/src/lib/libbsp/m68k/mvme167/bsp_specs
+++ b/c/src/lib/libbsp/m68k/mvme167/bsp_specs
@@ -10,7 +10,7 @@
 *lib:
 %{!qrtems: %(old_lib)} %{qrtems: --start-group \
 %{!qrtems_debug: -lrtemsall} %{qrtems_debug: -lrtemsall_g} \
-%{qjava: -lffi -lzgcj -lgcj} %{qc++: -lstdc++} -lc -lgcc --end-group \
+%{qjava: -lffi -lgcjgc -lzgcj -lgcj} %{qc++: -lstdc++} -lc -lgcc --end-group \
 %{!qnolinkcmds: -T linkcmds%s}}
 
 *startfile:
diff --git a/c/src/lib/libbsp/m68k/mvme167/include/bsp.h b/c/src/lib/libbsp/m68k/mvme167/include/bsp.h
index 1a95d9d576..913ca39bec 100644
--- a/c/src/lib/libbsp/m68k/mvme167/include/bsp.h
+++ b/c/src/lib/libbsp/m68k/mvme167/include/bsp.h
@@ -422,9 +422,9 @@ void BSP_output_string( char * buf );
  *  Representation of 82596CA LAN controller: Memory Map
  */
 typedef volatile struct i82596_regs_ {
-  unsigned short	port_lower;				  /* 0xFFF46000 */
-  unsigned short	port_upper;     		/* 0xFFF46002 */
-  unsigned long		chan_attn;				  /* 0xFFF46004 */
+  unsigned short	port_lower;             /* 0xFFF46000 */
+  unsigned short	port_upper;             /* 0xFFF46002 */
+  unsigned long		chan_attn;              /* 0xFFF46004 */
 } i82596_regs;
 
 /*
@@ -432,6 +432,26 @@ typedef volatile struct i82596_regs_ {
  */
 #define i82596    ((i82596_regs * const) 0xFFF46000)
 
+/*
+ *  Representation of initialization data in NVRAM
+ */
+typedef volatile struct nvram_config_ {
+  unsigned char	 dcache_enable;				/* 0xFFFC0000 */
+  unsigned char	 icache_enable;				/* 0xFFFC0001 */
+  unsigned short cache_mode;				/* 0xFFFC0002 */
+  unsigned long	 ipaddr;					/* 0xFFFC0004 */
+  unsigned long	 netmask;					/* 0xFFFC0008 */
+  unsigned char	 enaddr[6];					/* 0xFFFC000C */
+  unsigned short processor_id;				/* 0xFFFC0012 */
+  unsigned long	 rma_start;					/* 0xFFFC0014 */
+  unsigned long	 vma_start;					/* 0xFFFC0018 */
+  unsigned long	 ramsize;					/* 0xFFFC001C */
+} nvram_config;
+
+/*
+ *  Pointer to the base of User Area NVRAM
+ */
+#define nvram			((nvram_config * const) 0xFFFC0000)
 
 
 /* BSP-wide functions */
diff --git a/c/src/lib/libbsp/m68k/mvme167/network/network.c b/c/src/lib/libbsp/m68k/mvme167/network/network.c
index c8a2e71734..cce24b56be 100644
--- a/c/src/lib/libbsp/m68k/mvme167/network/network.c
+++ b/c/src/lib/libbsp/m68k/mvme167/network/network.c
@@ -40,6 +40,8 @@
 
 #define UTI_596_ETH_MIN_SIZE  60
 
+#define INET_ADDR_MAX_BUF_SIZE (sizeof "255.255.255.255")
+
 /*
  * RTEMS events
  */
@@ -57,9 +59,11 @@
 #include <sys/mbuf.h>
 #include <sys/socket.h>
 #include <sys/sockio.h>
+#include <sys/types.h>
 #include <net/if.h>
 #include <netinet/in.h>
 #include <netinet/if_ether.h>
+#include <arpa/inet.h>
 
 #include "uti596.h"
 
@@ -79,10 +83,10 @@
 #define UTI596_DUMP_PORT_FUNCTION     	3
 
 /* Types of waiting for commands */
-#define UTI596_NO_WAIT  				0
-#define UTI596_WAIT_FOR_CU_ACCEPT  		1
-#define UTI596_WAIT_FOR_INITIALIZATION  2
-#define UTI596_WAIT_FOR_STAT_C 			3
+#define UTI596_NO_WAIT									0
+#define UTI596_WAIT_FOR_CU_ACCEPT				1
+#define UTI596_WAIT_FOR_INITIALIZATION	2
+#define UTI596_WAIT_FOR_STAT_C					3
 
 /* Device dependent data structure */
 static uti596_softc_ uti596_softc;
@@ -417,6 +421,7 @@ static int uti596_portDump(
  *  Input parameters:
  *    sc - pointer to the uti596_softc struct
  *    wait_type - UTI596_NO_WAIT
+ *    						UTI596_WAIT
  *                UTI596_WAIT_FOR_CU_ACCEPT
  *                UTI596_WAIT_FOR_INITIALIZATION
  *                UTI596_WAIT_FOR_STAT_C
@@ -432,16 +437,18 @@ static int uti596_wait(
 )
 {
   rtems_interval ticks_per_second, start_ticks, end_ticks;
-  
+
+  rtems_clock_get(RTEMS_CLOCK_GET_TICKS_PER_SECOND, &ticks_per_second);
+	rtems_clock_get(RTEMS_CLOCK_GET_TICKS_SINCE_BOOT, &start_ticks);
+	end_ticks = start_ticks + ticks_per_second;
+
   switch( waitType ) {
+  
     case UTI596_NO_WAIT:
       return 0;
 
-    case UTI596_WAIT_FOR_CU_ACCEPT:
-      rtems_clock_get(RTEMS_CLOCK_GET_TICKS_PER_SECOND, &ticks_per_second);
-		  rtems_clock_get(RTEMS_CLOCK_GET_TICKS_SINCE_BOOT, &start_ticks);
-		  end_ticks = start_ticks + ticks_per_second;
 
+    case UTI596_WAIT_FOR_CU_ACCEPT:
 		  do {
 			  if (sc->scb.command == 0)
 				  break;
@@ -459,10 +466,6 @@ static int uti596_wait(
         return 0;
  
     case UTI596_WAIT_FOR_INITIALIZATION:
-      rtems_clock_get(RTEMS_CLOCK_GET_TICKS_PER_SECOND, &ticks_per_second);
-		  rtems_clock_get(RTEMS_CLOCK_GET_TICKS_SINCE_BOOT, &start_ticks);
-		  end_ticks = start_ticks + ticks_per_second;
-
 		  do {
 		    if( !sc->iscp.busy )
 		      break;
@@ -484,10 +487,6 @@ static int uti596_wait(
 			}
 
 	 case UTI596_WAIT_FOR_STAT_C:
-	   rtems_clock_get(RTEMS_CLOCK_GET_TICKS_PER_SECOND, &ticks_per_second);
-		 rtems_clock_get(RTEMS_CLOCK_GET_TICKS_SINCE_BOOT, &start_ticks);
-		 end_ticks = start_ticks + ticks_per_second;
-
 		 do {
 		   if( *sc->pCurrent_command_status & STAT_C )
 		      break;
@@ -1550,12 +1549,6 @@ void send_packet(
     }
   } while( m != NULL && ++bd_count < 16 );
 
-  /* This should never happen */
-  if ( bd_count == 16 ) {
-    printk(("TX ERROR:Too many mbufs in the packet!!!\n"))
-    printk(("Must coalesce!\n"))
-  }
-
   if ( length < UTI_596_ETH_MIN_SIZE ) {
     pTbd->data = (char *) word_swap ((unsigned long) sc->zeroes); /* add padding to pTbd */
     pTbd->size = UTI_596_ETH_MIN_SIZE - length; /* zeroes have no effect on the CRC */
@@ -1661,9 +1654,10 @@ int uti596_attach(
 {
   uti596_softc_ *sc = &uti596_softc;				/* device dependent data structure */
   struct ifnet * ifp = &sc->arpcom.ac_if;   /* ifnet structure */
-
-        int unitNumber;
-        char *unitName;
+	int unitNumber;
+	char *unitName;
+	char *pAddr;
+	int addr;
 
 	#ifdef DBG_ATTACH
   printk(("uti596_attach: begins\n"))
@@ -1689,17 +1683,46 @@ int uti596_attach(
   else
     ifp->if_mtu = ETHERMTU;
 
-  /* Ethernet address can be specified in the ifconfig structure or
-   * it can be read in from BBRAM at $FFFC1F2C (6 bytes)
-   * mvme167 manual p. 1-47
+  /* 
+   * If an IP address and netmask are provided in NVRAM, cheat,
+   * and stuff them into the ifconfig structure, overriding any
+   * existing or NULL values.
+   * 
+   * Warning: If values are provided in NVRAM, the ifconfig entries
+   * should be NULL because buffer memory allocated to hold the
+   * structure values is unrecoverable and would be lost here.
    */
-  if ( pConfig->hardware_address) {
+  if ( addr = nvram->ipaddr ) {
+  	if ( pAddr = malloc ( INET_ADDR_MAX_BUF_SIZE, 0, M_NOWAIT ) )
+			pConfig->ip_address = inet_ntop(AF_INET, &addr, pAddr, INET_ADDR_MAX_BUF_SIZE -1 );
+		else
+			rtems_panic("Can't allocate ip_address buffer!\n");
+  }
+  if ( addr = nvram->netmask ) {
+  	if ( pAddr = malloc ( INET_ADDR_MAX_BUF_SIZE, 0, M_NOWAIT ) )
+			pConfig->ip_netmask = inet_ntop(AF_INET, &addr, pAddr, INET_ADDR_MAX_BUF_SIZE -1 );
+		else
+			rtems_panic("Can't allocate ip_netmask buffer!\n");
+  }
+
+  /* Ethernet address can be specified in NVRAM, or in the ifconfig
+   * structure. It will be read by default from BBRAM at $FFFC1F2C
+   * (6 bytes) mvme167 manual p. 1-47
+   */
+  if ( nvram->enaddr ) {
+  	memcpy (sc->arpcom.ac_enaddr, &nvram->enaddr, ETHER_ADDR_LEN);
+  }
+  else if ( pConfig->hardware_address) {
     memcpy (sc->arpcom.ac_enaddr, pConfig->hardware_address, ETHER_ADDR_LEN);
   }
   else {
     memcpy (sc->arpcom.ac_enaddr, (char *)0xFFFC1F2C, ETHER_ADDR_LEN);
   }
 
+  /* Possibly override default acceptance of broadcast packets */
+  if (pConfig->ignore_broadcast)
+  	uti596initSetup[8] |= 0x02;
+
   /* Assign requested receive buffer descriptor count */
   if (pConfig->rbuf_count)
     sc->rxBdCount = pConfig->rbuf_count;
@@ -1715,7 +1738,7 @@ int uti596_attach(
   /* Set up fields in the ifnet structure*/
   ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX;
   ifp->if_snd.ifq_maxlen = ifqmaxlen;
-        ifp->if_init = uti596_init;
+  ifp->if_init = uti596_init;
   ifp->if_ioctl = uti596_ioctl;
   ifp->if_start = uti596_start;
   ifp->if_output = ether_output;
diff --git a/c/src/lib/libbsp/m68k/mvme167/startup/linkcmds b/c/src/lib/libbsp/m68k/mvme167/startup/linkcmds
index c22f578905..fc1733c069 100644
--- a/c/src/lib/libbsp/m68k/mvme167/startup/linkcmds
+++ b/c/src/lib/libbsp/m68k/mvme167/startup/linkcmds
@@ -17,12 +17,12 @@
  */
 
 /* These are not really needed here */
-/* OUTPUT_FORMAT("elf32-m68k") */
+OUTPUT_FORMAT("elf32-m68k")
 OUTPUT_ARCH(m68k)
 ENTRY(_start)
 
 /*
- * Declare some sizes.  Heap is sized at whatever ram space is left.
+ * Declare some sizes. Heap is sized at whatever ram space is left.
  */
 _RamBase = DEFINED(_RamBase) ? _RamBase : 0x00800000;
 _RamSize = DEFINED(_RamSize) ? _RamSize : 4M;
diff --git a/c/src/lib/libbsp/m68k/mvme167/startup/page_table.c b/c/src/lib/libbsp/m68k/mvme167/startup/page_table.c
index ebbcc9739d..e6e5f1571a 100644
--- a/c/src/lib/libbsp/m68k/mvme167/startup/page_table.c
+++ b/c/src/lib/libbsp/m68k/mvme167/startup/page_table.c
@@ -32,11 +32,13 @@
  *  physical range 0x0 to 0x7FFFFFFF. We rely on the hardware to signal bus
  *  errors if we address non-existent memory within this range. Our two
  *  MVME167s are configured to exist at physical addresses 0x00800000 to
- *  0x00BFFFFF and 0x00C00000 to 0x00FFFFFF respectively. We map the space
- *  from 0x0 to 0x7FFFFFFF as copyback, unless jumper J1-5 is removed, in
- *  which case we map as writethrough. If jumper J1-7 is removed, the data
- *  cache is NOT enabled. If jumper J1-6 is removed, the instruction cache
- *  is not enabled.
+ *  0x00BFFFFF and 0x00C00000 to 0x00FFFFFF respectively. If jumper J1-4 is
+ *  installed, memeory and cache control can be done by providing parameters
+ *  in NVRAM. See the README for details. If J1-4 is removed, behaviour
+ *  defaults to the following. We map the space from 0x0 to 0x7FFFFFFF as
+ *  copyback, unless jumper J1-5 is removed, in which case we map as writethrough.
+ *  If jumper J1-7 is removed, the data cache is NOT enabled. If jumper J1-6
+ *  is removed, the instruction cache is not enabled.
  *
  *  Copyright (c) 1998, National Research Council of Canada
  *
@@ -84,23 +86,39 @@ void page_table_init(
    */
   dtt0 = 0x007FC020;
   
-  cacr = 0x80008000;              /* Data and instruction cache on */
+  cacr = 0x00000000;              /* Data and instruction cache off */
   
   /* Read the J1 header */
   j1 = (unsigned char)(lcsr->vector_base & 0xFF);
+
+  if ( !(j1 & 0x10) ) {
+  	/* Jumper J1-4 is on, configure from NVRAM */
+
+  	if ( nvram->dcache_enable )
+  		cacr |= 0x80000000;
+
+  	if ( nvram->icache_enable )
+  		cacr |= 0x00008000;
+
+  	if ( nvram->cache_mode )
+  		dtt0 = ((nvram->cache_mode & 0x0003) << 5) | (dtt0 & 0xFFFFFF9F);
+  }
+	else {
+		/* Configure according to other jumper settings */
   
-  if ( j1 & 0x80 )
-    /* Jumper J1-7 if off, disable data caching */
-    cacr &= 0x7FFFFFFF;
+	  if ( j1 & 0x80 )
+  	  /* Jumper J1-7 if off, disable data caching */
+   		cacr &= 0x7FFFFFFF;
       
-  if ( j1 & 0x40 )
-    /* Jumper J1-6 if off, disable instruction caching */
-    cacr &= 0xFFFF7FFF;
+	  if ( j1 & 0x40 )
+	    /* Jumper J1-6 if off, disable instruction caching */
+	    cacr &= 0xFFFF7FFF;
       
-  if ( j1 & 0x20 )
-    /* Jumper J1-5 is off, enable writethrough caching */
-    dtt0 &= 0xFFFFFF9F;
-  
+	  if ( j1 & 0x20 )
+	    /* Jumper J1-5 is off, enable writethrough caching */
+	    dtt0 &= 0xFFFFFF9F;
+	}
+
   /* do it ! */
   asm volatile("movec %0, %%tc    /* turn off paged address translation */
                 movec %0, %%cacr  /* disable both caches */