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| author | Joel Sherrill <joel.sherrill@oarcorp.com> | 2014-10-13 16:54:12 -0500 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@oarcorp.com> | 2014-10-16 08:58:47 -0500 |
| commit | af03345cac27849b4a9ea5faf787577c154c19bb (patch) | |
| tree | e82239058ef8789720f6ce15f37a2fef6a3365ab /c/src/lib/libbsp/m68k | |
| parent | libmisc/redirector/stdio-redirect.c: Use UL constants since usleep() should t... (diff) | |
| download | rtems-af03345cac27849b4a9ea5faf787577c154c19bb.tar.bz2 | |
Move CPU cache support from mcf5225x BSP to libcpu
Diffstat (limited to 'c/src/lib/libbsp/m68k')
| -rw-r--r-- | c/src/lib/libbsp/m68k/mcf5225x/Makefile.am | 1 | ||||
| -rw-r--r-- | c/src/lib/libbsp/m68k/mcf5225x/startup/bspstart.c | 24 |
2 files changed, 1 insertions, 24 deletions
diff --git a/c/src/lib/libbsp/m68k/mcf5225x/Makefile.am b/c/src/lib/libbsp/m68k/mcf5225x/Makefile.am index 1758c1a3f6..0c2fd554f8 100644 --- a/c/src/lib/libbsp/m68k/mcf5225x/Makefile.am +++ b/c/src/lib/libbsp/m68k/mcf5225x/Makefile.am @@ -42,6 +42,7 @@ libbsp_a_SOURCES += timer/timer.c libbsp_a_LIBADD = \ ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \ + ../../../libcpu/@RTEMS_CPU@/mcf5225x/cachepd.rel \ ../../../libcpu/@RTEMS_CPU@/shared/misc.rel include $(srcdir)/preinstall.am diff --git a/c/src/lib/libbsp/m68k/mcf5225x/startup/bspstart.c b/c/src/lib/libbsp/m68k/mcf5225x/startup/bspstart.c index af472029db..d5e0f37dc8 100644 --- a/c/src/lib/libbsp/m68k/mcf5225x/startup/bspstart.c +++ b/c/src/lib/libbsp/m68k/mcf5225x/startup/bspstart.c @@ -18,30 +18,6 @@ #include <bsp.h> #include <bsp/bootcard.h> -/* - * Cannot be frozen - */ -void _CPU_cache_freeze_data(void) {} -void _CPU_cache_unfreeze_data(void) {} -void _CPU_cache_freeze_instruction(void) {} -void _CPU_cache_unfreeze_instruction(void) {} - -/* - * Write-through data cache -- flushes are unnecessary - */ -void _CPU_cache_flush_1_data_line(const void *d_addr) {} -void _CPU_cache_flush_entire_data(void) {} - -void _CPU_cache_enable_instruction(void) {} -void _CPU_cache_disable_instruction(void) {} -void _CPU_cache_invalidate_entire_instruction(void) {} -void _CPU_cache_invalidate_1_instruction_line(const void *addr) {} - -void _CPU_cache_enable_data(void) {} -void _CPU_cache_disable_data(void) {} -void _CPU_cache_invalidate_entire_data(void) {} -void _CPU_cache_invalidate_1_data_line(const void *addr) {} - void __attribute__((weak)) bsp_start(void) { } |