mcf5206 libcpu and mcf5206elite: Fix warnings

5 files changed, 463 insertions, 481 deletions

diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/console/console.c b/c/src/lib/libbsp/m68k/mcf5206elite/console/console.c
index c53b8cb3b1..40df1a5dfa 100644
--- a/c/src/lib/libbsp/m68k/mcf5206elite/console/console.c
+++ b/c/src/lib/libbsp/m68k/mcf5206elite/console/console.c
@@ -1,6 +1,8 @@
 /*
  * Console driver for Motorola MCF5206E UART modules
- *
+ */
+
+/*
  * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia
  * Author: Victor V. Vengerov <vvv@oktet.ru>
  *
@@ -46,7 +48,7 @@ int console_mode = 2;
 static int
 console_poll_read(int minor)
 {
-    return mcfuart_poll_read(&uart[minor]);
+  return mcfuart_poll_read(&uart[minor]);
 }
 
 /* console_interrupt_write --
@@ -63,7 +65,7 @@ console_poll_read(int minor)
 static ssize_t
 console_interrupt_write(int minor, const char *buf, size_t len)
 {
-    return mcfuart_interrupt_write(&uart[minor], buf, len);
+  return mcfuart_interrupt_write(&uart[minor], buf, len);
 }
 
 /* console_poll_write --
@@ -80,7 +82,7 @@ console_interrupt_write(int minor, const char *buf, size_t len)
 static ssize_t
 console_poll_write(int minor, const char *buf, size_t len)
 {
-    return mcfuart_poll_write(&uart[minor], buf, len);
+  return mcfuart_poll_write(&uart[minor], buf, len);
 }
 
 /* console_set_attributes --
@@ -96,7 +98,7 @@ console_poll_write(int minor, const char *buf, size_t len)
 static int
 console_set_attributes(int minor, const struct termios *t)
 {
-    return mcfuart_set_attributes(&uart[minor], t);
+  return mcfuart_set_attributes(&uart[minor], t);
 }
 
 /* console_stop_remote_tx --
@@ -111,10 +113,10 @@ console_set_attributes(int minor, const struct termios *t)
 static int
 console_stop_remote_tx(int minor)
 {
-    if (minor < sizeof(uart)/sizeof(uart[0]))
-        return mcfuart_stop_remote_tx(&uart[minor]);
-    else
-        return RTEMS_INVALID_NUMBER;
+  if (minor < sizeof(uart)/sizeof(uart[0]))
+    return mcfuart_stop_remote_tx(&uart[minor]);
+  else
+    return RTEMS_INVALID_NUMBER;
 }
 
 /* console_start_remote_tx --
@@ -127,10 +129,10 @@ console_stop_remote_tx(int minor)
 static int
 console_start_remote_tx(int minor)
 {
-    if (minor < sizeof(uart)/sizeof(uart[0]))
-        return mcfuart_start_remote_tx(&uart[minor]);
-    else
-        return RTEMS_INVALID_NUMBER;
+  if (minor < sizeof(uart)/sizeof(uart[0]))
+    return mcfuart_start_remote_tx(&uart[minor]);
+  else
+    return RTEMS_INVALID_NUMBER;
 }
 
 /* console_first_open --
@@ -147,32 +149,31 @@ console_start_remote_tx(int minor)
 static int
 console_first_open(int major, int minor, void *arg)
 {
-    rtems_libio_open_close_args_t *args = arg;
-    rtems_status_code sc;
-    uint8_t         intvec;
-
-    switch (minor)
-    {
-        case 0: intvec = BSP_INTVEC_UART1; break;
-        case 1: intvec = BSP_INTVEC_UART2; break;
-        default:
-            return RTEMS_INVALID_NUMBER;
-    }
-
-    if (console_mode != CONSOLE_MODE_INT)
-    {
-        intvec = 0;
-    }
-
-    sc = mcfuart_init(&uart[minor],          /* uart */
-                      args->iop->data1,      /* tty */
-                      intvec,                /* interrupt vector number */
-                      minor+1);
-
-    if (sc == RTEMS_SUCCESSFUL)
-        sc = mcfuart_reset(&uart[minor]);
-
-    return sc;
+  rtems_libio_open_close_args_t *args = arg;
+  rtems_status_code sc;
+  uint8_t         intvec;
+
+  switch (minor) {
+    case 0: intvec = BSP_INTVEC_UART1; break;
+    case 1: intvec = BSP_INTVEC_UART2; break;
+    default:
+      return RTEMS_INVALID_NUMBER;
+  }
+
+  if (console_mode != CONSOLE_MODE_INT) {
+    intvec = 0;
+  }
+
+  sc = mcfuart_init(
+    &uart[minor],          /* uart */
+    args->iop->data1,      /* tty */
+    intvec,                /* interrupt vector number */
+    minor+1);
+
+  if (sc == RTEMS_SUCCESSFUL)
+    sc = mcfuart_reset(&uart[minor]);
+
+  return sc;
 }
 
 /* console_last_close --
@@ -189,7 +190,7 @@ console_first_open(int major, int minor, void *arg)
 static int
 console_last_close(int major, int minor, void *arg)
 {
-    return mcfuart_disable(&uart[minor]);
+  return mcfuart_disable(&uart[minor]);
 }
 
 /* console_initialize --
@@ -204,51 +205,51 @@ console_last_close(int major, int minor, void *arg)
  * RETURNS:
  *     RTEMS error code (RTEMS_SUCCESSFUL if device initialized successfuly)
  */
-rtems_device_driver
-console_initialize(rtems_device_major_number major,
-                   rtems_device_minor_number minor,
-                   void *arg)
+rtems_device_driver console_initialize(
+  rtems_device_major_number major,
+  rtems_device_minor_number minor,
+  void *arg)
 {
-    rtems_status_code status;
-
-    /*
-     * Set up TERMIOS
-     */
-    if (console_mode != CONSOLE_MODE_RAW)
-        rtems_termios_initialize ();
-
-    /*
-     * Register the devices
-     */
-    status = rtems_io_register_name ("/dev/console", major, 0);
-    if (status != RTEMS_SUCCESSFUL)
-        rtems_fatal_error_occurred (status);
-    status = rtems_io_register_name ("/dev/aux", major, 1);
-    if (status != RTEMS_SUCCESSFUL)
-        rtems_fatal_error_occurred (status);
-
-    if (console_mode == CONSOLE_MODE_RAW)
-    {
-        rtems_status_code sc;
-        sc = mcfuart_init(&uart[0],              /* uart */
-                          NULL,                  /* tty */
-                          0,                     /* interrupt vector number */
-                          1);                    /* UART channel number */
-
-        if (sc == RTEMS_SUCCESSFUL)
-            sc = mcfuart_reset(&uart[0]);
-
-        sc = mcfuart_init(&uart[1],              /* uart */
-                          NULL,                  /* tty */
-                          0,                     /* interrupt vector number */
-                          2);                    /* UART channel number */
-
-        if (sc == RTEMS_SUCCESSFUL)
-            sc = mcfuart_reset(&uart[1]);
-        return sc;
-    }
+  rtems_status_code status;
+
+  /*
+   * Set up TERMIOS
+   */
+  if (console_mode != CONSOLE_MODE_RAW)
+      rtems_termios_initialize ();
+
+  /*
+   * Register the devices
+   */
+  status = rtems_io_register_name ("/dev/console", major, 0);
+  if (status != RTEMS_SUCCESSFUL)
+    rtems_fatal_error_occurred (status);
+
+  status = rtems_io_register_name ("/dev/aux", major, 1);
+  if (status != RTEMS_SUCCESSFUL)
+    rtems_fatal_error_occurred (status);
+
+  if (console_mode == CONSOLE_MODE_RAW) {
+    rtems_status_code sc;
+    sc = mcfuart_init(&uart[0],              /* uart */
+                      NULL,                  /* tty */
+                      0,                     /* interrupt vector number */
+                      1);                    /* UART channel number */
 
-    return RTEMS_SUCCESSFUL;
+    if (sc == RTEMS_SUCCESSFUL)
+        sc = mcfuart_reset(&uart[0]);
+
+    sc = mcfuart_init(&uart[1],              /* uart */
+                      NULL,                  /* tty */
+                      0,                     /* interrupt vector number */
+                      2);                    /* UART channel number */
+
+    if (sc == RTEMS_SUCCESSFUL)
+      sc = mcfuart_reset(&uart[1]);
+    return sc;
+  }
+
+  return RTEMS_SUCCESSFUL;
 }
 
 /* console_open --
@@ -268,42 +269,41 @@ console_open(rtems_device_major_number major,
              rtems_device_minor_number minor,
              void *arg)
 {
-    static const rtems_termios_callbacks intr_callbacks = {
-        console_first_open,        /* firstOpen */
-        console_last_close,        /* lastClose */
-        NULL,                      /* pollRead */
-        console_interrupt_write,   /* write */
-        console_set_attributes,    /* setAttributes */
-        console_stop_remote_tx,    /* stopRemoteTx */
-        console_start_remote_tx,   /* startRemoteTx */
-        1                          /* outputUsesInterrupts */
-    };
-    static const rtems_termios_callbacks poll_callbacks = {
-        console_first_open,        /* firstOpen */
-        console_last_close,        /* lastClose */
-        console_poll_read,         /* pollRead */
-        console_poll_write,        /* write */
-        console_set_attributes,    /* setAttributes */
-        console_stop_remote_tx,    /* stopRemoteTx */
-        console_start_remote_tx,   /* startRemoteTx */
-        0                          /* outputUsesInterrupts */
-    };
-
-    switch (console_mode)
-    {
-        case CONSOLE_MODE_RAW:
-            return RTEMS_SUCCESSFUL;
-
-        case CONSOLE_MODE_INT:
-            return rtems_termios_open(major, minor, arg, &intr_callbacks);
-
-        case CONSOLE_MODE_POLL:
-            return rtems_termios_open(major, minor, arg, &poll_callbacks);
-
-        default:
-            rtems_fatal_error_occurred(0xC07A1310);
-    }
-    return RTEMS_INTERNAL_ERROR;
+  static const rtems_termios_callbacks intr_callbacks = {
+    console_first_open,        /* firstOpen */
+    console_last_close,        /* lastClose */
+    NULL,                      /* pollRead */
+    console_interrupt_write,   /* write */
+    console_set_attributes,    /* setAttributes */
+    console_stop_remote_tx,    /* stopRemoteTx */
+    console_start_remote_tx,   /* startRemoteTx */
+    1                          /* outputUsesInterrupts */
+  };
+  static const rtems_termios_callbacks poll_callbacks = {
+    console_first_open,        /* firstOpen */
+    console_last_close,        /* lastClose */
+    console_poll_read,         /* pollRead */
+    console_poll_write,        /* write */
+    console_set_attributes,    /* setAttributes */
+    console_stop_remote_tx,    /* stopRemoteTx */
+    console_start_remote_tx,   /* startRemoteTx */
+    0                          /* outputUsesInterrupts */
+  };
+
+  switch (console_mode) {
+    case CONSOLE_MODE_RAW:
+      return RTEMS_SUCCESSFUL;
+
+    case CONSOLE_MODE_INT:
+      return rtems_termios_open(major, minor, arg, &intr_callbacks);
+
+      case CONSOLE_MODE_POLL:
+        return rtems_termios_open(major, minor, arg, &poll_callbacks);
+
+      default:
+        rtems_fatal_error_occurred(0xC07A1310);
+  }
+  return RTEMS_INTERNAL_ERROR;
 }
 
 /* console_close --
@@ -322,10 +322,10 @@ console_close(rtems_device_major_number major,
               rtems_device_minor_number minor,
               void *arg)
 {
-    if (console_mode != CONSOLE_MODE_RAW)
-        return rtems_termios_close (arg);
-    else
-        return RTEMS_SUCCESSFUL;
+  if (console_mode != CONSOLE_MODE_RAW)
+    return rtems_termios_close (arg);
+  else
+    return RTEMS_SUCCESSFUL;
 }
 
 /* console_read --
@@ -344,32 +344,29 @@ console_read(rtems_device_major_number major,
              rtems_device_minor_number minor,
              void *arg)
 {
-    if (console_mode != CONSOLE_MODE_RAW)
-    {
-        return rtems_termios_read (arg);
-    }
-    else
-    {
-        rtems_libio_rw_args_t *argp = arg;
-        char *buf = argp->buffer;
-        int count = argp->count;
-        int n = 0;
-        int c;
-        while (n < count)
-        {
-            do {
-                c = mcfuart_poll_read(&uart[minor]);
-            } while (c == -1);
-            if (c == '\r')
-                c = '\n';
-            *(buf++) = c;
-            n++;
-            if (c == '\n')
-                break;
-        }
-        argp->bytes_moved = n;
-        return RTEMS_SUCCESSFUL;
+  if (console_mode != CONSOLE_MODE_RAW) {
+    return rtems_termios_read (arg);
+  } else {
+    rtems_libio_rw_args_t *argp = arg;
+    char *buf = argp->buffer;
+    int count = argp->count;
+    int n = 0;
+    int c;
+
+    while (n < count) {
+      do {
+        c = mcfuart_poll_read(&uart[minor]);
+      } while (c == -1);
+      if (c == '\r')
+        c = '\n';
+      *(buf++) = c;
+      n++;
+      if (c == '\n')
+        break;
     }
+    argp->bytes_moved = n;
+    return RTEMS_SUCCESSFUL;
+  }
 }
 
 /* console_write --
@@ -389,27 +386,24 @@ console_write(rtems_device_major_number major,
               void *arg
 )
 {
-    if (console_mode != CONSOLE_MODE_RAW)
-    {
-        return rtems_termios_write (arg);
-    }
-    else
-    {
-        rtems_libio_rw_args_t *argp = arg;
-        char cr = '\r';
-        char *buf = argp->buffer;
-        int count = argp->count;
-        int i;
-        for (i = 0; i < count; i++)
-        {
-            if (*buf == '\n')
-                mcfuart_poll_write(&uart[minor], &cr, 1);
-            mcfuart_poll_write(&uart[minor], buf, 1);
-            buf++;
-        }
-        argp->bytes_moved = count;
-        return RTEMS_SUCCESSFUL;
+  if (console_mode != CONSOLE_MODE_RAW) {
+    return rtems_termios_write (arg);
+  } else {
+    rtems_libio_rw_args_t *argp = arg;
+    char cr = '\r';
+    char *buf = argp->buffer;
+    int count = argp->count;
+    int i;
+
+    for (i = 0; i < count; i++) {
+        if (*buf == '\n')
+            mcfuart_poll_write(&uart[minor], &cr, 1);
+        mcfuart_poll_write(&uart[minor], buf, 1);
+        buf++;
     }
+    argp->bytes_moved = count;
+    return RTEMS_SUCCESSFUL;
+  }
 }
 
 /* console_control --
@@ -428,12 +422,9 @@ console_control(rtems_device_major_number major,
                 rtems_device_minor_number minor,
                 void *arg)
 {
-    if (console_mode != CONSOLE_MODE_RAW)
-    {
-        return rtems_termios_ioctl (arg);
-    }
-    else
-    {
-        return RTEMS_SUCCESSFUL;
-    }
+  if (console_mode != CONSOLE_MODE_RAW) {
+    return rtems_termios_ioctl (arg);
+  } else {
+    return RTEMS_SUCCESSFUL;
+  }
 }
diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/include/bsp.h b/c/src/lib/libbsp/m68k/mcf5206elite/include/bsp.h
index 72983a0161..d11c34dca1 100644
--- a/c/src/lib/libbsp/m68k/mcf5206elite/include/bsp.h
+++ b/c/src/lib/libbsp/m68k/mcf5206elite/include/bsp.h
@@ -173,6 +173,11 @@ rtems_isr_entry set_vector(
   int                 type
 );
 
+/*
+ * Prototypes for BSP methods that cross file boundaries
+ */
+void Init5206e(void);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/start/start.S b/c/src/lib/libbsp/m68k/mcf5206elite/start/start.S
index 96a5a54e20..57848ff92b 100644
--- a/c/src/lib/libbsp/m68k/mcf5206elite/start/start.S
+++ b/c/src/lib/libbsp/m68k/mcf5206elite/start/start.S
@@ -5,7 +5,9 @@
  *  The name of this entry point is compiler dependent.
  *  It jumps to the BSP which is responsible for performing
  *  all initialization.
- *
+ */
+
+/*
  *  Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia
  *  Author: Victor V. Vengerov <vvv@oktet.ru>
  *
diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/startup/init5206e.c b/c/src/lib/libbsp/m68k/mcf5206elite/startup/init5206e.c
index fe13ea4352..a128b81fd7 100644
--- a/c/src/lib/libbsp/m68k/mcf5206elite/startup/init5206e.c
+++ b/c/src/lib/libbsp/m68k/mcf5206elite/startup/init5206e.c
@@ -8,7 +8,9 @@
  *  This initialization code based on hardware settings of dBUG
  *  monitor. This must be changed if you like to run it immediately
  *  after reset.
- *
+ */
+
+/*
  *  Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia
  *  Author: Victor V. Vengerov <vvv@oktet.ru>
  *
@@ -53,180 +55,172 @@ extern void INTERRUPT_VECTOR(void);
                   "nop\n\t" \
                   : : "d" (MCF5206E_CACR_CINV) )
 
-/* Init5206e --
- *     Initialize MCF5206e on-chip modules
- *
- * PARAMETERS:
- *     none
- *
- * RETURNS:
- *     none
+/*
+ * Initialize MCF5206e on-chip modules
  */
-void
-Init5206e(void)
+void Init5206e(void)
 {
+  /* Set Module Base Address register */
+  m68k_set_mbar((MBAR & MCF5206E_MBAR_BA) | MCF5206E_MBAR_V);
 
-    /* Set Module Base Address register */
-    m68k_set_mbar((MBAR & MCF5206E_MBAR_BA) | MCF5206E_MBAR_V);
-
-    /* Set System Protection Control Register (SYPCR):
-     * Bus Monitor Enable, Bus Monitor Timing = 1024 clocks,
-     * Software watchdog disabled
-     */
-    *MCF5206E_SYPCR(MBAR) = MCF5206E_SYPCR_BME |
-                            MCF5206E_SYPCR_BMT_1024;
-
-    /* Set Pin Assignment Register (PAR):
-     *     Output Timer 0 (not DREQ) on *TOUT[0] / *DREQ[1]
-     *     Input Timer 0 (not DREQ) on *TIN[0] / *DREQ[0]
-     *     IRQ, not IPL
-     *     UART2 RTS signal (not \RSTO)
-     *     PST/DDATA (not PPIO)
-     *     *WE (not CS/A)
-     */
-    *MCF5206E_PAR(MBAR) = MCF5206E_PAR_PAR9_TOUT |
-                          MCF5206E_PAR_PAR8_TIN0 |
-                          MCF5206E_PAR_PAR7_UART2 |
-                          MCF5206E_PAR_PAR6_IRQ |
-                          MCF5206E_PAR_PAR5_PST |
-                          MCF5206E_PAR_PAR4_DDATA |
-                          MCF5206E_PAR_WE0_WE1_WE2_WE3;
-
-    /* Set SIM Configuration Register (SIMR):
-     * Disable software watchdog timer and bus timeout monitor when
-     * internal freeze signal is asserted.
-     */
-    *MCF5206E_SIMR(MBAR) = MCF5206E_SIMR_FRZ0 | MCF5206E_SIMR_FRZ1;
-
-    /* Set Interrupt Mask Register: Disable all interrupts */
-    *MCF5206E_IMR(MBAR) = 0xFFFF;
-
-    /* Assign Interrupt Control Registers as it is defined in bsp.h */
-    *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL1) =
-                            (BSP_INTLVL_AVEC1 << MCF5206E_ICR_IL_S) |
-                            (BSP_INTPRIO_AVEC1 << MCF5206E_ICR_IP_S) |
-                            MCF5206E_ICR_AVEC;
-    *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL2) =
-                            (BSP_INTLVL_AVEC2 << MCF5206E_ICR_IL_S) |
-                            (BSP_INTPRIO_AVEC2 << MCF5206E_ICR_IP_S) |
-                            MCF5206E_ICR_AVEC;
-    *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL3) =
-                            (BSP_INTLVL_AVEC3 << MCF5206E_ICR_IL_S) |
-                            (BSP_INTPRIO_AVEC3 << MCF5206E_ICR_IP_S) |
-                            MCF5206E_ICR_AVEC;
-    *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL4) =
-                            (BSP_INTLVL_AVEC4 << MCF5206E_ICR_IL_S) |
-                            (BSP_INTPRIO_AVEC4 << MCF5206E_ICR_IP_S) |
-                            MCF5206E_ICR_AVEC;
-    *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL5) =
-                            (BSP_INTLVL_AVEC5 << MCF5206E_ICR_IL_S) |
-                            (BSP_INTPRIO_AVEC5 << MCF5206E_ICR_IP_S) |
-                            MCF5206E_ICR_AVEC;
-    *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL6) =
-                            (BSP_INTLVL_AVEC6 << MCF5206E_ICR_IL_S) |
-                            (BSP_INTPRIO_AVEC6 << MCF5206E_ICR_IP_S) |
-                            MCF5206E_ICR_AVEC;
-    *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL7) =
-                            (BSP_INTLVL_AVEC7 << MCF5206E_ICR_IL_S) |
-                            (BSP_INTPRIO_AVEC7 << MCF5206E_ICR_IP_S) |
-                            MCF5206E_ICR_AVEC;
-    *MCF5206E_ICR(MBAR,MCF5206E_INTR_TIMER_1) =
-                            (BSP_INTLVL_TIMER1 << MCF5206E_ICR_IL_S) |
-                            (BSP_INTPRIO_TIMER1 << MCF5206E_ICR_IP_S) |
-                            MCF5206E_ICR_AVEC;
-    *MCF5206E_ICR(MBAR,MCF5206E_INTR_TIMER_2) =
-                            (BSP_INTLVL_TIMER2 << MCF5206E_ICR_IL_S) |
-                            (BSP_INTPRIO_TIMER2 << MCF5206E_ICR_IP_S) |
-                            MCF5206E_ICR_AVEC;
-    *MCF5206E_ICR(MBAR,MCF5206E_INTR_MBUS) =
-                            (BSP_INTLVL_MBUS << MCF5206E_ICR_IL_S) |
-                            (BSP_INTPRIO_MBUS << MCF5206E_ICR_IP_S) |
-                            MCF5206E_ICR_AVEC;
-    *MCF5206E_ICR(MBAR,MCF5206E_INTR_UART_1) =
-                            (BSP_INTLVL_UART1 << MCF5206E_ICR_IL_S) |
-                            (BSP_INTPRIO_UART1 << MCF5206E_ICR_IP_S);
-    *MCF5206E_ICR(MBAR,MCF5206E_INTR_UART_2) =
-                            (BSP_INTLVL_UART2 << MCF5206E_ICR_IL_S) |
-                            (BSP_INTPRIO_UART2 << MCF5206E_ICR_IP_S);
-    *MCF5206E_ICR(MBAR,MCF5206E_INTR_DMA_0) =
-                            (BSP_INTLVL_DMA0 << MCF5206E_ICR_IL_S) |
-                            (BSP_INTPRIO_DMA0 << MCF5206E_ICR_IP_S) |
-                            MCF5206E_ICR_AVEC;
-    *MCF5206E_ICR(MBAR,MCF5206E_INTR_DMA_1) =
-                            (BSP_INTLVL_DMA1 << MCF5206E_ICR_IL_S) |
-                            (BSP_INTPRIO_DMA1 << MCF5206E_ICR_IP_S) |
-                            MCF5206E_ICR_AVEC;
-
-    /* Software Watchdog timer (not used now) */
-    *MCF5206E_SWIVR(MBAR) = 0x0F; /* Uninitialized interrupt */
-    *MCF5206E_SWSR(MBAR) = MCF5206E_SWSR_KEY1;
-    *MCF5206E_SWSR(MBAR) = MCF5206E_SWSR_KEY2;
-
-    /* Configuring Chip Selects */
-    /* CS2: SRAM memory */
-    *MCF5206E_CSAR(MBAR,2) = BSP_MEM_ADDR_ESRAM >> 16;
-    *MCF5206E_CSMR(MBAR,2) = BSP_MEM_MASK_ESRAM;
-    *MCF5206E_CSCR(MBAR,2) = MCF5206E_CSCR_WS1 |
-                             MCF5206E_CSCR_PS_32 |
-                             MCF5206E_CSCR_AA |
-                             MCF5206E_CSCR_EMAA |
-                             MCF5206E_CSCR_WR |
-                             MCF5206E_CSCR_RD;
-
-    /* CS3: GPIO on eLITE board */
-    *MCF5206E_CSAR(MBAR,3) = BSP_MEM_ADDR_GPIO >> 16;
-    *MCF5206E_CSMR(MBAR,3) = BSP_MEM_MASK_GPIO;
-    *MCF5206E_CSCR(MBAR,3) = MCF5206E_CSCR_WS15 |
-                             MCF5206E_CSCR_PS_16 |
-                             MCF5206E_CSCR_AA |
-                             MCF5206E_CSCR_EMAA |
-                             MCF5206E_CSCR_WR |
-                             MCF5206E_CSCR_RD;
-
-    {
-        uint32_t         *inttab = (uint32_t*)&INTERRUPT_VECTOR;
-        uint32_t         *intvec = (uint32_t*)BSP_MEM_ADDR_ESRAM;
-        register int i;
-        for (i = 0; i < 256; i++)
-        {
-            *(intvec++) = *(inttab++);
-        }
+  /* Set System Protection Control Register (SYPCR):
+   * Bus Monitor Enable, Bus Monitor Timing = 1024 clocks,
+   * Software watchdog disabled
+   */
+  *MCF5206E_SYPCR(MBAR) = MCF5206E_SYPCR_BME |
+			  MCF5206E_SYPCR_BMT_1024;
+
+  /* Set Pin Assignment Register (PAR):
+   *     Output Timer 0 (not DREQ) on *TOUT[0] / *DREQ[1]
+   *     Input Timer 0 (not DREQ) on *TIN[0] / *DREQ[0]
+   *     IRQ, not IPL
+   *     UART2 RTS signal (not \RSTO)
+   *     PST/DDATA (not PPIO)
+   *     *WE (not CS/A)
+   */
+  *MCF5206E_PAR(MBAR) = MCF5206E_PAR_PAR9_TOUT |
+			MCF5206E_PAR_PAR8_TIN0 |
+			MCF5206E_PAR_PAR7_UART2 |
+			MCF5206E_PAR_PAR6_IRQ |
+			MCF5206E_PAR_PAR5_PST |
+			MCF5206E_PAR_PAR4_DDATA |
+			MCF5206E_PAR_WE0_WE1_WE2_WE3;
+
+  /* Set SIM Configuration Register (SIMR):
+   * Disable software watchdog timer and bus timeout monitor when
+   * internal freeze signal is asserted.
+   */
+  *MCF5206E_SIMR(MBAR) = MCF5206E_SIMR_FRZ0 | MCF5206E_SIMR_FRZ1;
+
+  /* Set Interrupt Mask Register: Disable all interrupts */
+  *MCF5206E_IMR(MBAR) = 0xFFFF;
+
+  /* Assign Interrupt Control Registers as it is defined in bsp.h */
+  *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL1) =
+			  (BSP_INTLVL_AVEC1 << MCF5206E_ICR_IL_S) |
+			  (BSP_INTPRIO_AVEC1 << MCF5206E_ICR_IP_S) |
+			  MCF5206E_ICR_AVEC;
+  *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL2) =
+			  (BSP_INTLVL_AVEC2 << MCF5206E_ICR_IL_S) |
+			  (BSP_INTPRIO_AVEC2 << MCF5206E_ICR_IP_S) |
+			  MCF5206E_ICR_AVEC;
+  *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL3) =
+			  (BSP_INTLVL_AVEC3 << MCF5206E_ICR_IL_S) |
+			  (BSP_INTPRIO_AVEC3 << MCF5206E_ICR_IP_S) |
+			  MCF5206E_ICR_AVEC;
+  *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL4) =
+			  (BSP_INTLVL_AVEC4 << MCF5206E_ICR_IL_S) |
+			  (BSP_INTPRIO_AVEC4 << MCF5206E_ICR_IP_S) |
+			  MCF5206E_ICR_AVEC;
+  *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL5) =
+			  (BSP_INTLVL_AVEC5 << MCF5206E_ICR_IL_S) |
+			  (BSP_INTPRIO_AVEC5 << MCF5206E_ICR_IP_S) |
+			  MCF5206E_ICR_AVEC;
+  *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL6) =
+			  (BSP_INTLVL_AVEC6 << MCF5206E_ICR_IL_S) |
+			  (BSP_INTPRIO_AVEC6 << MCF5206E_ICR_IP_S) |
+			  MCF5206E_ICR_AVEC;
+  *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL7) =
+			  (BSP_INTLVL_AVEC7 << MCF5206E_ICR_IL_S) |
+			  (BSP_INTPRIO_AVEC7 << MCF5206E_ICR_IP_S) |
+			  MCF5206E_ICR_AVEC;
+  *MCF5206E_ICR(MBAR,MCF5206E_INTR_TIMER_1) =
+			  (BSP_INTLVL_TIMER1 << MCF5206E_ICR_IL_S) |
+			  (BSP_INTPRIO_TIMER1 << MCF5206E_ICR_IP_S) |
+			  MCF5206E_ICR_AVEC;
+  *MCF5206E_ICR(MBAR,MCF5206E_INTR_TIMER_2) =
+			  (BSP_INTLVL_TIMER2 << MCF5206E_ICR_IL_S) |
+			  (BSP_INTPRIO_TIMER2 << MCF5206E_ICR_IP_S) |
+			  MCF5206E_ICR_AVEC;
+  *MCF5206E_ICR(MBAR,MCF5206E_INTR_MBUS) =
+			  (BSP_INTLVL_MBUS << MCF5206E_ICR_IL_S) |
+			  (BSP_INTPRIO_MBUS << MCF5206E_ICR_IP_S) |
+			  MCF5206E_ICR_AVEC;
+  *MCF5206E_ICR(MBAR,MCF5206E_INTR_UART_1) =
+			  (BSP_INTLVL_UART1 << MCF5206E_ICR_IL_S) |
+			  (BSP_INTPRIO_UART1 << MCF5206E_ICR_IP_S);
+  *MCF5206E_ICR(MBAR,MCF5206E_INTR_UART_2) =
+			  (BSP_INTLVL_UART2 << MCF5206E_ICR_IL_S) |
+			  (BSP_INTPRIO_UART2 << MCF5206E_ICR_IP_S);
+  *MCF5206E_ICR(MBAR,MCF5206E_INTR_DMA_0) =
+			  (BSP_INTLVL_DMA0 << MCF5206E_ICR_IL_S) |
+			  (BSP_INTPRIO_DMA0 << MCF5206E_ICR_IP_S) |
+			  MCF5206E_ICR_AVEC;
+  *MCF5206E_ICR(MBAR,MCF5206E_INTR_DMA_1) =
+			  (BSP_INTLVL_DMA1 << MCF5206E_ICR_IL_S) |
+			  (BSP_INTPRIO_DMA1 << MCF5206E_ICR_IP_S) |
+			  MCF5206E_ICR_AVEC;
+
+  /* Software Watchdog timer (not used now) */
+  *MCF5206E_SWIVR(MBAR) = 0x0F; /* Uninitialized interrupt */
+  *MCF5206E_SWSR(MBAR) = MCF5206E_SWSR_KEY1;
+  *MCF5206E_SWSR(MBAR) = MCF5206E_SWSR_KEY2;
+
+  /* Configuring Chip Selects */
+  /* CS2: SRAM memory */
+  *MCF5206E_CSAR(MBAR,2) = BSP_MEM_ADDR_ESRAM >> 16;
+  *MCF5206E_CSMR(MBAR,2) = BSP_MEM_MASK_ESRAM;
+  *MCF5206E_CSCR(MBAR,2) = MCF5206E_CSCR_WS1 |
+			   MCF5206E_CSCR_PS_32 |
+			   MCF5206E_CSCR_AA |
+			   MCF5206E_CSCR_EMAA |
+			   MCF5206E_CSCR_WR |
+			   MCF5206E_CSCR_RD;
+
+  /* CS3: GPIO on eLITE board */
+  *MCF5206E_CSAR(MBAR,3) = BSP_MEM_ADDR_GPIO >> 16;
+  *MCF5206E_CSMR(MBAR,3) = BSP_MEM_MASK_GPIO;
+  *MCF5206E_CSCR(MBAR,3) = MCF5206E_CSCR_WS15 |
+			   MCF5206E_CSCR_PS_16 |
+			   MCF5206E_CSCR_AA |
+			   MCF5206E_CSCR_EMAA |
+			   MCF5206E_CSCR_WR |
+			   MCF5206E_CSCR_RD;
+
+  {
+    uint32_t         *inttab = (uint32_t*)&INTERRUPT_VECTOR;
+    uint32_t         *intvec = (uint32_t*)BSP_MEM_ADDR_ESRAM;
+    register int i;
+
+    for (i = 0; i < 256; i++) {
+      *(intvec++) = *(inttab++);
     }
-    m68k_set_vbr(BSP_MEM_ADDR_ESRAM);
-
-    /* CS0: Flash EEPROM */
-    *MCF5206E_CSAR(MBAR,0) = BSP_MEM_ADDR_FLASH >> 16;
-    *MCF5206E_CSCR(MBAR,0) = MCF5206E_CSCR_WS3 |
-                             MCF5206E_CSCR_AA |
-                             MCF5206E_CSCR_PS_16 |
-                             MCF5206E_CSCR_EMAA |
-                             MCF5206E_CSCR_WR |
-                             MCF5206E_CSCR_RD;
-    *MCF5206E_CSMR(MBAR,0) = BSP_MEM_MASK_FLASH;
-
-    /*
-     * Invalidate the cache and disable it
-     */
-    mcf5206e_disable_cache();
-
-    /*
-     * Setup ACRs so that if cache turned on, periphal accesses
-     * are not messed up.  (Non-cacheable, serialized)
-     */
-    m68k_set_acr0 ( 0
-        | MCF5206E_ACR_BASE(BSP_MEM_ADDR_ESRAM)
-        | MCF5206E_ACR_MASK(BSP_MEM_MASK_ESRAM)
-        | MCF5206E_ACR_EN
-        | MCF5206E_ACR_SM_ANY
-    );
-    m68k_set_acr1 ( 0
-        | MCF5206E_ACR_BASE(BSP_MEM_ADDR_FLASH)
-        | MCF5206E_ACR_MASK(BSP_MEM_MASK_FLASH)
-        | MCF5206E_ACR_EN
-        | MCF5206E_ACR_SM_ANY
-    );
-
-    mcf5206e_enable_cache();
+  }
+  m68k_set_vbr(BSP_MEM_ADDR_ESRAM);
+
+  /* CS0: Flash EEPROM */
+  *MCF5206E_CSAR(MBAR,0) = BSP_MEM_ADDR_FLASH >> 16;
+  *MCF5206E_CSCR(MBAR,0) = MCF5206E_CSCR_WS3 |
+			   MCF5206E_CSCR_AA |
+			   MCF5206E_CSCR_PS_16 |
+			   MCF5206E_CSCR_EMAA |
+			   MCF5206E_CSCR_WR |
+			   MCF5206E_CSCR_RD;
+  *MCF5206E_CSMR(MBAR,0) = BSP_MEM_MASK_FLASH;
+
+  /*
+   * Invalidate the cache and disable it
+   */
+  mcf5206e_disable_cache();
+
+  /*
+   * Setup ACRs so that if cache turned on, periphal accesses
+   * are not messed up.  (Non-cacheable, serialized)
+   */
+  m68k_set_acr0 ( 0
+      | MCF5206E_ACR_BASE(BSP_MEM_ADDR_ESRAM)
+      | MCF5206E_ACR_MASK(BSP_MEM_MASK_ESRAM)
+      | MCF5206E_ACR_EN
+      | MCF5206E_ACR_SM_ANY
+  );
+  m68k_set_acr1 ( 0
+      | MCF5206E_ACR_BASE(BSP_MEM_ADDR_FLASH)
+      | MCF5206E_ACR_MASK(BSP_MEM_MASK_FLASH)
+      | MCF5206E_ACR_EN
+      | MCF5206E_ACR_SM_ANY
+  );
+
+  mcf5206e_enable_cache();
 
   /*
    * Copy data, clear BSS, switch stacks and call boot_card()
diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/tod/ds1307.c b/c/src/lib/libbsp/m68k/mcf5206elite/tod/ds1307.c
index b49f5b6ad9..ab7fc7daac 100644
--- a/c/src/lib/libbsp/m68k/mcf5206elite/tod/ds1307.c
+++ b/c/src/lib/libbsp/m68k/mcf5206elite/tod/ds1307.c
@@ -16,13 +16,14 @@
  *
  *    + two digit years 00-87 are mapped to 2000-2087
  *    + two digit years 88-99 are mapped to 1988-1999
- *
+ */
+
+/*
  * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia
  * Author: Victor V. Vengerov <vvv@oktet.ru>
  *
  * The license and distribution terms for this file may be
  * found in the file LICENSE in this distribution or at
- *
  * http://www.rtems.org/license/LICENSE.
  */
 
@@ -43,36 +44,34 @@
  * PARAMETERS:
  *     minor -- minor RTC device number
  */
-void
-ds1307_initialize(int minor)
+static void ds1307_initialize(int minor)
 {
-    i2c_message_status status;
-    int try;
-    uint8_t         sec;
-    i2c_bus_number bus;
-    i2c_address addr;
-
-    bus = RTC_Table[minor].ulCtrlPort1;
-    addr = RTC_Table[minor].ulDataPort;
-
-    /* Read SECONDS register */
-    try = 0;
-    do {
-        status = i2c_wbrd(bus, addr, 0, &sec, sizeof(sec));
-        try++;
-    } while ((status != I2C_SUCCESSFUL) && (try < 15));
-
-    /* If clock is halted, reset and start the clock */
-    if ((sec & DS1307_SECOND_HALT) != 0)
-    {
-        uint8_t         start[8];
-        memset(start, 0, sizeof(start));
-        start[0] = DS1307_SECOND;
-        try = 0;
-        do {
-            status = i2c_write(bus, addr, start, 2);
-        } while ((status != I2C_SUCCESSFUL) && (try < 15));
-    }
+  i2c_message_status status;
+  int try;
+  uint8_t         sec;
+  i2c_bus_number bus;
+  i2c_address addr;
+
+  bus = RTC_Table[minor].ulCtrlPort1;
+  addr = RTC_Table[minor].ulDataPort;
+
+  /* Read SECONDS register */
+  try = 0;
+  do {
+    status = i2c_wbrd(bus, addr, 0, &sec, sizeof(sec));
+    try++;
+  } while ((status != I2C_SUCCESSFUL) && (try < 15));
+
+  /* If clock is halted, reset and start the clock */
+  if ((sec & DS1307_SECOND_HALT) != 0) {
+      uint8_t         start[8];
+      memset(start, 0, sizeof(start));
+      start[0] = DS1307_SECOND;
+      try = 0;
+      do {
+	  status = i2c_write(bus, addr, start, 2);
+      } while ((status != I2C_SUCCESSFUL) && (try < 15));
+  }
 }
 
 /* ds1307_get_time --
@@ -87,74 +86,66 @@ ds1307_initialize(int minor)
  *     0, if time obtained successfully
  *     -1, if error occured
  */
-int
-ds1307_get_time(int minor, rtems_time_of_day *time)
+static int ds1307_get_time(int minor, rtems_time_of_day *time)
 {
-    i2c_bus_number bus;
-    i2c_address addr;
-    uint8_t         info[8];
-    uint32_t         v1, v2;
-    i2c_message_status status;
-    int try;
-
-    if (time == NULL)
-        return -1;
-
-    bus = RTC_Table[minor].ulCtrlPort1;
-    addr = RTC_Table[minor].ulDataPort;
-
-    memset(time, 0, sizeof(rtems_time_of_day));
-    try = 0;
-    do {
-        status = i2c_wbrd(bus, addr, 0, info, sizeof(info));
-        try++;
-    } while ((status != I2C_SUCCESSFUL) && (try < 10));
-
-    if (status != I2C_SUCCESSFUL)
-    {
-        return -1;
+  i2c_bus_number bus;
+  i2c_address addr;
+  uint8_t         info[8];
+  uint32_t         v1, v2;
+  i2c_message_status status;
+  int try;
+
+  if (time == NULL)
+    return -1;
+
+  bus = RTC_Table[minor].ulCtrlPort1;
+  addr = RTC_Table[minor].ulDataPort;
+
+  memset(time, 0, sizeof(rtems_time_of_day));
+  try = 0;
+  do {
+    status = i2c_wbrd(bus, addr, 0, info, sizeof(info));
+    try++;
+  } while ((status != I2C_SUCCESSFUL) && (try < 10));
+
+  if (status != I2C_SUCCESSFUL) {
+    return -1;
+  }
+
+  v1 = info[DS1307_YEAR];
+  v2 = From_BCD(v1);
+  if (v2 < 88)
+    time->year = 2000 + v2;
+  else
+    time->year = 1900 + v2;
+
+  v1 = info[DS1307_MONTH] & ~0xE0;
+  time->month = From_BCD(v1);
+
+  v1 = info[DS1307_DAY] & ~0xC0;
+  time->day = From_BCD(v1);
+
+  v1 = info[DS1307_HOUR];
+  if (v1 & DS1307_HOUR_12) {
+    v2 = v1 & ~0xE0;
+    if (v1 & DS1307_HOUR_PM) {
+      time->hour = From_BCD(v2) + 12;
+    } else {
+      time->hour = From_BCD(v2);
     }
+  } else {
+    v2 = v1 & ~0xC0;
+    time->hour = From_BCD(v2);
+  }
 
-    v1 = info[DS1307_YEAR];
-    v2 = From_BCD(v1);
-    if (v2 < 88)
-        time->year = 2000 + v2;
-    else
-        time->year = 1900 + v2;
-
-    v1 = info[DS1307_MONTH] & ~0xE0;
-    time->month = From_BCD(v1);
-
-    v1 = info[DS1307_DAY] & ~0xC0;
-    time->day = From_BCD(v1);
-
-    v1 = info[DS1307_HOUR];
-    if (v1 & DS1307_HOUR_12)
-    {
-        v2 = v1 & ~0xE0;
-        if (v1 & DS1307_HOUR_PM)
-        {
-            time->hour = From_BCD(v2) + 12;
-        }
-        else
-        {
-            time->hour = From_BCD(v2);
-        }
-    }
-    else
-    {
-        v2 = v1 & ~0xC0;
-        time->hour = From_BCD(v2);
-    }
-
-    v1 = info[DS1307_MINUTE] & ~0x80;
-    time->minute = From_BCD(v1);
+  v1 = info[DS1307_MINUTE] & ~0x80;
+  time->minute = From_BCD(v1);
 
-    v1 = info[DS1307_SECOND];
-    v2 = v1 & ~0x80;
-    time->second = From_BCD(v2);
+  v1 = info[DS1307_SECOND];
+  v2 = v1 & ~0x80;
+  time->second = From_BCD(v2);
 
-    return 0;
+  return 0;
 }
 
 /* ds1307_set_time --
@@ -168,49 +159,48 @@ ds1307_get_time(int minor, rtems_time_of_day *time)
  *     0, if time obtained successfully
  *     -1, if error occured
  */
-int
-ds1307_set_time(int minor, const rtems_time_of_day *time)
+static int ds1307_set_time(int minor, const rtems_time_of_day *time)
 {
-    i2c_bus_number bus;
-    i2c_address addr;
-    uint8_t         info[8];
-    i2c_message_status status;
-    int try;
-
-    if (time == NULL)
-        return -1;
-
-    bus = RTC_Table[minor].ulCtrlPort1;
-    addr = RTC_Table[minor].ulDataPort;
-
-    if (time->year >= 2088)
-        rtems_fatal_error_occurred(RTEMS_INVALID_NUMBER);
-
-    info[0] = DS1307_SECOND;
-    info[1 + DS1307_YEAR] = To_BCD(time->year % 100);
-    info[1 + DS1307_MONTH] = To_BCD(time->month);
-    info[1 + DS1307_DAY] = To_BCD(time->day);
-    info[1 + DS1307_HOUR] = To_BCD(time->hour);
-    info[1 + DS1307_MINUTE] = To_BCD(time->minute);
-    info[1 + DS1307_SECOND] = To_BCD(time->second);
-    info[1 + DS1307_DAY_OF_WEEK] = 1; /* Do not set day of week */
-
-    try = 0;
-    do {
-        status = i2c_write(bus, addr, info, 8);
-        try++;
-    } while ((status != I2C_SUCCESSFUL) && (try < 10));
-
-    if (status != I2C_SUCCESSFUL)
-        return -1;
-    else
-        return 0;
+  i2c_bus_number bus;
+  i2c_address addr;
+  uint8_t         info[8];
+  i2c_message_status status;
+  int try;
+
+  if (time == NULL)
+    return -1;
+
+  bus = RTC_Table[minor].ulCtrlPort1;
+  addr = RTC_Table[minor].ulDataPort;
+
+  if (time->year >= 2088)
+      rtems_fatal_error_occurred(RTEMS_INVALID_NUMBER);
+
+  info[0] = DS1307_SECOND;
+  info[1 + DS1307_YEAR] = To_BCD(time->year % 100);
+  info[1 + DS1307_MONTH] = To_BCD(time->month);
+  info[1 + DS1307_DAY] = To_BCD(time->day);
+  info[1 + DS1307_HOUR] = To_BCD(time->hour);
+  info[1 + DS1307_MINUTE] = To_BCD(time->minute);
+  info[1 + DS1307_SECOND] = To_BCD(time->second);
+  info[1 + DS1307_DAY_OF_WEEK] = 1; /* Do not set day of week */
+
+  try = 0;
+  do {
+    status = i2c_write(bus, addr, info, 8);
+    try++;
+  } while ((status != I2C_SUCCESSFUL) && (try < 10));
+
+  if (status != I2C_SUCCESSFUL)
+    return -1;
+  else
+    return 0;
 }
 
 /* Driver function table */
 
 rtc_fns ds1307_fns = {
-    ds1307_initialize,
-    ds1307_get_time,
-    ds1307_set_time
+  ds1307_initialize,
+  ds1307_get_time,
+  ds1307_set_time
 };