diff options
author | Eric Norum <WENorum@lbl.gov> | 2009-07-30 15:48:52 +0000 |
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committer | Eric Norum <WENorum@lbl.gov> | 2009-07-30 15:48:52 +0000 |
commit | ac1d1bc44d36c01b66aecbf6d6a782321e0f3552 (patch) | |
tree | ba6b56bb8eee2c96d44060cd25f875fe128e5085 /c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c | |
parent | PR 1420/bsps (diff) | |
download | rtems-ac1d1bc44d36c01b66aecbf6d6a782321e0f3552.tar.bz2 |
Try enabling the data cache.
Diffstat (limited to '')
-rw-r--r-- | c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c b/c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c index 4dbd9c0470..110ab9f94f 100644 --- a/c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c +++ b/c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c @@ -112,7 +112,7 @@ void _CPU_cache_enable_instruction(void) rtems_interrupt_disable(level); mcf5282_cacr_mode &= ~MCF5XXX_CACR_DIDI; - m68k_set_cacr(mcf5282_cacr_mode); + m68k_set_cacr_nop(mcf5282_cacr_mode | MCF5XXX_CACR_CINV | MCF5XXX_CACR_INVI); rtems_interrupt_enable(level); } @@ -146,8 +146,8 @@ void _CPU_cache_enable_data(void) rtems_interrupt_level level; rtems_interrupt_disable(level); - mcf5282_cacr_mode &= ~MCF5XXX_CACR_CENB; - m68k_set_cacr(mcf5282_cacr_mode); + mcf5282_cacr_mode &= ~MCF5XXX_CACR_DISD; + m68k_set_cacr_nop(mcf5282_cacr_mode | MCF5XXX_CACR_CINV | MCF5XXX_CACR_INVD); rtems_interrupt_enable(level); #endif } @@ -158,8 +158,7 @@ void _CPU_cache_disable_data(void) rtems_interrupt_level level; rtems_interrupt_disable(level); - rtems_interrupt_disable(level); - mcf5282_cacr_mode |= MCF5XXX_CACR_CENB; + mcf5282_cacr_mode |= MCF5XXX_CACR_DISD; m68k_set_cacr(mcf5282_cacr_mode); rtems_interrupt_enable(level); #endif |