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| author | Eric Norum <WENorum@lbl.gov> | 2009-07-30 15:48:52 +0000 |
|---|---|---|
| committer | Eric Norum <WENorum@lbl.gov> | 2009-07-30 15:48:52 +0000 |
| commit | ac1d1bc44d36c01b66aecbf6d6a782321e0f3552 (patch) | |
| tree | ba6b56bb8eee2c96d44060cd25f875fe128e5085 /c/src/lib/libbsp/m68k/uC5282/include/bsp.h | |
| parent | PR 1420/bsps (diff) | |
| download | rtems-ac1d1bc44d36c01b66aecbf6d6a782321e0f3552.tar.bz2 | |
Try enabling the data cache.
Diffstat (limited to 'c/src/lib/libbsp/m68k/uC5282/include/bsp.h')
| -rw-r--r-- | c/src/lib/libbsp/m68k/uC5282/include/bsp.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/c/src/lib/libbsp/m68k/uC5282/include/bsp.h b/c/src/lib/libbsp/m68k/uC5282/include/bsp.h index f1eea7656e..b2019d5835 100644 --- a/c/src/lib/libbsp/m68k/uC5282/include/bsp.h +++ b/c/src/lib/libbsp/m68k/uC5282/include/bsp.h @@ -31,7 +31,7 @@ extern "C" { * Uncomment to use instruction/data cache * Leave commented to use instruction-only cache */ -/* #define RTEMS_MCF5282_BSP_ENABLE_DATA_CACHE */ +#define RTEMS_MCF5282_BSP_ENABLE_DATA_CACHE /***************************************************************************/ /** Hardware data structure headers **/ |