diff options
author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2000-06-12 19:57:02 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2000-06-12 19:57:02 +0000 |
commit | 8ef38186faea3d9b5e6f0f1242f668cb7e7a3d52 (patch) | |
tree | 9253f150814c99167239f7c2cc850cdd9d92c003 /c/src/lib/libbsp/m68k/mvme167/include | |
parent | Ensure that when -msoft-float is specified for multilib builds, that (diff) | |
download | rtems-8ef38186faea3d9b5e6f0f1242f668cb7e7a3d52.tar.bz2 |
Patch from John Cotton <john.cotton@nrc.ca>, Charles-Antoine Gauthier
<charles.gauthier@iit.nrc.ca>, and Darlene A. Stewart
<Darlene.Stewart@nrc.ca> to add support for a number of very
significant things:
+ BSPs for many variations on the Motorola MBX8xx board series
+ Cache Manager including initial support for m68040
and PowerPC
+ Rework of mpc8xx libcpu code so all mpc8xx CPUs now use
same code base.
+ Rework of eth_comm BSP to utiltize above.
John reports this works on the 821 and 860
Diffstat (limited to 'c/src/lib/libbsp/m68k/mvme167/include')
-rw-r--r-- | c/src/lib/libbsp/m68k/mvme167/include/bsp.h | 26 |
1 files changed, 23 insertions, 3 deletions
diff --git a/c/src/lib/libbsp/m68k/mvme167/include/bsp.h b/c/src/lib/libbsp/m68k/mvme167/include/bsp.h index 1a95d9d576..913ca39bec 100644 --- a/c/src/lib/libbsp/m68k/mvme167/include/bsp.h +++ b/c/src/lib/libbsp/m68k/mvme167/include/bsp.h @@ -422,9 +422,9 @@ void BSP_output_string( char * buf ); * Representation of 82596CA LAN controller: Memory Map */ typedef volatile struct i82596_regs_ { - unsigned short port_lower; /* 0xFFF46000 */ - unsigned short port_upper; /* 0xFFF46002 */ - unsigned long chan_attn; /* 0xFFF46004 */ + unsigned short port_lower; /* 0xFFF46000 */ + unsigned short port_upper; /* 0xFFF46002 */ + unsigned long chan_attn; /* 0xFFF46004 */ } i82596_regs; /* @@ -432,6 +432,26 @@ typedef volatile struct i82596_regs_ { */ #define i82596 ((i82596_regs * const) 0xFFF46000) +/* + * Representation of initialization data in NVRAM + */ +typedef volatile struct nvram_config_ { + unsigned char dcache_enable; /* 0xFFFC0000 */ + unsigned char icache_enable; /* 0xFFFC0001 */ + unsigned short cache_mode; /* 0xFFFC0002 */ + unsigned long ipaddr; /* 0xFFFC0004 */ + unsigned long netmask; /* 0xFFFC0008 */ + unsigned char enaddr[6]; /* 0xFFFC000C */ + unsigned short processor_id; /* 0xFFFC0012 */ + unsigned long rma_start; /* 0xFFFC0014 */ + unsigned long vma_start; /* 0xFFFC0018 */ + unsigned long ramsize; /* 0xFFFC001C */ +} nvram_config; + +/* + * Pointer to the base of User Area NVRAM + */ +#define nvram ((nvram_config * const) 0xFFFC0000) /* BSP-wide functions */ |