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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 1996-05-24 20:34:49 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 1996-05-24 20:34:49 +0000 |
| commit | 28fa54d9b9e30d782115d65456e4cd3d8b8fb6f2 (patch) | |
| tree | 9b39581aa6c666641d5566f60c5592e15e3ab741 /c/src/lib/libbsp/m68k/mvme147/timer/timerisr.s | |
| parent | changed joel's email address (diff) | |
| download | rtems-28fa54d9b9e30d782115d65456e4cd3d8b8fb6f2.tar.bz2 | |
added Motorola MVME147 BSP submitted by Dominique le Campion
(Dominique.LECAMPION@enst-bretagne.fr), for Telecom Bretagne and
T.N.I. (Brest, France)
Diffstat (limited to '')
| -rw-r--r-- | c/src/lib/libbsp/m68k/mvme147/timer/timerisr.s | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/m68k/mvme147/timer/timerisr.s b/c/src/lib/libbsp/m68k/mvme147/timer/timerisr.s new file mode 100644 index 0000000000..a4102ffc91 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mvme147/timer/timerisr.s @@ -0,0 +1,28 @@ +# timer_isr() +# +# This routine provides the ISR for the PCC timer on the MVME147 +# board. The timer is set up to generate an interrupt at maximum +# intervals. +# +# MVME147 port for TNI - Telecom Bretagne +# by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr) +# May 1996 +# +# $Id$ +# + +#include "asm.h" + +BEGIN_CODE + +.set T1_CONTROL_REGISTER, 0xfffe1018 | timer 1 control register + + PUBLIC (timerisr) +SYM (timerisr): + orb #0x80, T1_CONTROL_REGISTER | clear T1 int status bit + addql #1, SYM (Ttimer_val) | increment timer value +end_timerisr: + rte + +END_CODE +END |