diff options
author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2008-07-04 16:08:26 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2008-07-04 16:08:26 +0000 |
commit | 692e5baba01896d7ac7184f83cf6348cc25a31c6 (patch) | |
tree | 2945c10d22b1340f69d72f6f0ab7ed7e24e65c69 /c/src/lib/libbsp/m68k/mcf5329/startup/bspstart.c | |
parent | Add rtems-4.10. (diff) | |
download | rtems-692e5baba01896d7ac7184f83cf6348cc25a31c6.tar.bz2 |
2008-07-04 Matthew Riek <matthew.riek@ibiscomputer.com.au>
* Makefile.am, README, include/coverhd.h, network/network.c,
startup/bspstart.c, startup/cfinit.c, startup/linkcmdsflash: Add
cache support for 5329. Fix bug in network driver. Enable the cache
in copyback and write-through so we can assume that in BSP.
Diffstat (limited to '')
-rw-r--r-- | c/src/lib/libbsp/m68k/mcf5329/startup/bspstart.c | 62 |
1 files changed, 8 insertions, 54 deletions
diff --git a/c/src/lib/libbsp/m68k/mcf5329/startup/bspstart.c b/c/src/lib/libbsp/m68k/mcf5329/startup/bspstart.c index 46c839ab2b..bd3011132f 100644 --- a/c/src/lib/libbsp/m68k/mcf5329/startup/bspstart.c +++ b/c/src/lib/libbsp/m68k/mcf5329/startup/bspstart.c @@ -22,60 +22,7 @@ */ #include <bsp.h> -#include <rtems/libio.h> -#include <rtems/libcsupport.h> - -/* - * Cannot be frozen - */ -void _CPU_cache_freeze_data(void) -{ -} -void _CPU_cache_unfreeze_data(void) -{ -} -void _CPU_cache_freeze_instruction(void) -{ -} -void _CPU_cache_unfreeze_instruction(void) -{ -} - -/* - * Write-through data cache -- flushes are unnecessary - */ -void _CPU_cache_flush_1_data_line(const void *d_addr) -{ -} -void _CPU_cache_flush_entire_data(void) -{ -} - -void _CPU_cache_enable_instruction(void) -{ -} -void _CPU_cache_disable_instruction(void) -{ -} -void _CPU_cache_invalidate_entire_instruction(void) -{ -} -void _CPU_cache_invalidate_1_instruction_line(const void *addr) -{ -} - -void _CPU_cache_enable_data(void) -{ -} -void _CPU_cache_disable_data(void) -{ -} -void _CPU_cache_invalidate_entire_data(void) -{ -} -void _CPU_cache_invalidate_1_data_line(const void *addr) -{ -} +#include <rtems/rtems/cache.h> /* * bsp_start @@ -84,6 +31,13 @@ void _CPU_cache_invalidate_1_data_line(const void *addr) */ void bsp_start(void) { + /* cfinit invalidates cache and sets acr registers */ + + /* + * Enable the cache, we only need to enable the instruction cache as the + * 532x has a unified data and instruction cache. + */ + rtems_cache_enable_instruction(); } uint32_t bsp_get_CPU_clock_speed(void) |