diff options
author | Chris Johns <chrisj@rtems.org> | 2008-06-11 07:59:03 +0000 |
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committer | Chris Johns <chrisj@rtems.org> | 2008-06-11 07:59:03 +0000 |
commit | 3aac2db317370181538abb2b3504a97d226dfe3f (patch) | |
tree | 2820a4b2736b1b1890324aeadffb2d70cf822143 /c/src/lib/libbsp/m68k/mcf52235/README | |
parent | 2008-06-10 Joel Sherrill <joel.sherrill@oarcorp.com> (diff) | |
download | rtems-3aac2db317370181538abb2b3504a97d226dfe3f.tar.bz2 |
2008-06-10 Matthew Riek <matthew.riek@ibiscomputer.com.au>
* .cvsignore, ChangeLog, Makefile.am, README, bsp_specs,
clock/clock.c, configure.ac, console/console.c, gdb-init,
include/bsp.h, include/bspopts.h.in, include/coverhd.h,
include/tm27.h, preinstall.am, start/start.S, startup/bspclean.c,
startup/bspstart.c, startup/cfinit.c, startup/init52235.c,
startup/linkcmds, timer/timer.c: New.
Diffstat (limited to '')
-rw-r--r-- | c/src/lib/libbsp/m68k/mcf52235/README | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/m68k/mcf52235/README b/c/src/lib/libbsp/m68k/mcf52235/README new file mode 100644 index 0000000000..b52aa5de91 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf52235/README @@ -0,0 +1,56 @@ +# +# $Id: +# + +Description: Motorola MCF52235EVB +============ +CPU: MCF52235, 60MHz +SRAM: 32K +FLASH: 256K + +This is a Motorola evaluation board that uses the MCF52235 Coldfire CPU. +This board is running at 60MHz scaled from a 25MHz oscillator. + +NOTES: +====== + +Currently this BSP must be configured with most (all?) RTEMS features turned +off as RAM usage is too high. + +Configure as follows: +configure --target=m68k-rtems4.9 --enable-rtemsbsp=mcf52235 \ + --disable-networking --disable-posix --disable-itron --disable-cxx \ + --disable-tests + +TODO: +===== + +*) Work with TINY RTEMS to get the ram usage down. +*) Add drivers for I2C, ADC, FEC +*) Support for LWIP +*) Update the coverhd.h (calling overheads) page 21 of the BSP guide +*) Adjust initial stack so that it's space is not forever unusable after init +*) Fix up constants used by cfinit such as clockspeed, rambase, flashbase etc. + +============================================================================ + Interrupt map + ++-----+-----------------------------------------------------------------------+ +| | PRIORITY | ++-----+--------+--------+--------+--------+--------+--------+--------+--------+ +|LEVEL| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | ++-----+--------+--------+--------+--------+--------+--------+--------+--------+ +| 7 | | | | | | | | | ++-----+--------+--------+--------+--------+--------+--------+--------+--------+ +| 6 | | | | | | | | | ++-----+--------+--------+--------+--------+--------+--------+--------+--------+ +| 5 | | | | | | | | | ++-----+--------+--------+--------+--------+--------+--------+--------+--------+ +| 4 | FEC RX | FEC TX | | | | | | PIT | ++-----+--------+--------+--------+--------+--------+--------+--------+--------+ +| 3 | UART 0 | UART 1 | UART 2 | | | | | | ++-----+--------+--------+--------+--------+--------+--------+--------+--------+ +| 2 | | | | | | | | | ++-----+--------+--------+--------+--------+--------+--------+--------+--------+ +| 1 | | | | | | | | | ++-----+--------+--------+--------+--------+--------+--------+--------+--------+ |