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| author | Ralf Corsepius <ralf.corsepius@rtems.org> | 2004-04-21 16:01:48 +0000 |
|---|---|---|
| committer | Ralf Corsepius <ralf.corsepius@rtems.org> | 2004-04-21 16:01:48 +0000 |
| commit | f05b2ac0bc4626e854afc6e6a5d1b88071adbd7c (patch) | |
| tree | 4150010cec9b6b51100f183b435955cd847679b4 /c/src/lib/libbsp/m68k/gen68302/include | |
| parent | Remove stray white spaces. (diff) | |
| download | rtems-f05b2ac0bc4626e854afc6e6a5d1b88071adbd7c.tar.bz2 | |
Remove duplicate white lines.
Diffstat (limited to 'c/src/lib/libbsp/m68k/gen68302/include')
| -rw-r--r-- | c/src/lib/libbsp/m68k/gen68302/include/m302_int.h | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/c/src/lib/libbsp/m68k/gen68302/include/m302_int.h b/c/src/lib/libbsp/m68k/gen68302/include/m302_int.h index 0bbe9515bc..3c7f91c90a 100644 --- a/c/src/lib/libbsp/m68k/gen68302/include/m302_int.h +++ b/c/src/lib/libbsp/m68k/gen68302/include/m302_int.h @@ -43,7 +43,6 @@ #define EDMA_BLIM_MASK 0x0007 #define EDMA_BLIM_8ACCESS 0x0003 - /* Ethernet Maximum Receive Buffer Length EMRBLR */ #define EMRBLR_MASK 0x07FFE @@ -104,7 +103,6 @@ #define AR_CNTRL_MULTI_MASK (AR_CNTRL_BIT_MULTI0 | AR_CNTRL_BIT_MULTI1) - /* Ethernet buffer Status TX */ #define BUF_STAT_CARRIER_LOST 0x0001 #define BUF_STAT_UNDERRUN 0x0002 @@ -120,7 +118,6 @@ #define BUF_STAT_TO 0x4000 #define BUF_STAT_READY 0x8000 - /* Ethernet buffer Status RX */ #define BUF_STAT_COLLISION 0x0001 #define BUF_STAT_OVERRUN 0x0002 @@ -280,8 +277,6 @@ struct m68302_imp { uchar reserved_3[0x74A]; - - /****************** 68 EN 302 specific registers **********************/ /** only available here if M68302_INTERNAL_RAM_BASE_ADD+0x1000=M68EN302_INTERNAL_RAM_BASE_ADD*/ @@ -303,7 +298,6 @@ struct m68302_imp { uchar dram_reserved[0x7E8]; - /* Ethernet Controller Registers */ ushort ecntrl; /* Ethernet Control Register */ @@ -387,7 +381,6 @@ struct m68302_imp { #define M68302imp_sccm(i) (M68302imp_ scc_regs[i].sccm) #define M68302imp_sccs(i) (M68302imp_ scc_regs[i].sccs) - /*----------------------------------------------------------------------------*/ #define M68en302imp_mbc (M68302imp_ mbc) @@ -399,7 +392,6 @@ struct m68302_imp { #define M68en302imp_drfrsh (M68302imp_ drfrsh) #define M68en302imp_dba(i) (M68302imp_ dba[i]) - #define M68en302imp_ecntrl (M68302imp_ ecntrl) #define M68en302imp_edma (M68302imp_ edma) #define M68en302imp_emrblr (M68302imp_ emrblr) @@ -517,7 +509,6 @@ struct m68302_imp { #define M68302_CS_WRITE_ONLY 0x22 /* write only memory access */ #define M68302_CS_READ_AND_WRITE 0x00 /* read and write memory access */ - #define M68302_cs_install(cs_nb,base_add,range,nb_wait_state,read_write) \ do { \ M68302imp_cs_option(cs_nb) = (((~(range - 1)) >> 11) & 0x1FFC) | \ |