summaryrefslogtreecommitdiffstats
path: root/c/src/lib/libbsp/m68k/efi332/start/start.c
diff options
context:
space:
mode:
authorJoel Sherrill <joel.sherrill@OARcorp.com>2000-10-12 12:56:07 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2000-10-12 12:56:07 +0000
commit50bb7627337aa780c4e8e6f3cbded85d2c80381b (patch)
tree0f6b313ab0e87a1471f42b4ee243130e5bf1b334 /c/src/lib/libbsp/m68k/efi332/start/start.c
parent2000-10-12 John S Gwynne <jgwynne@mrcday.com> (diff)
downloadrtems-50bb7627337aa780c4e8e6f3cbded85d2c80381b.tar.bz2
2000-10-12 John S Gwynne <jgwynne@mrcday.com>
* start/start.c: Modified to support generation of ram_init. * start/ram_init.ld, BSP/start/ram_init.sed: New files. These changes enable RTEMS to automatically generate the ram_init file used by gdb with the BDM patches. The 332 has on-board chip select lines (for RAM and FLASH) that must be configured before use of these peripherals. These patches parse data from start.c where the chip select lines are configured in the runtime executable and automatically generates the gdb initialization file using the same settings. A great time saver. A similar file, ram_init_FW (flash writable), is also generated that the flash programming tool uses. * start/Makefile.am: Modified to support above. * CPU/sim.h: Modified to support above. * startup/except_vect_332_ROM.S: Moved to start so it would not be included in libbsp.a. Moving it to start ensures it is available as a single object file. * start/except_vect_332_ROM.S: Moved from startup. * startup/linkcmds, startup/linkcmds_ROM: Fixes to the memory map shown in the comments.
Diffstat (limited to '')
-rw-r--r--c/src/lib/libbsp/m68k/efi332/start/start.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/c/src/lib/libbsp/m68k/efi332/start/start.c b/c/src/lib/libbsp/m68k/efi332/start/start.c
index 5394fb279c..03e98b8195 100644
--- a/c/src/lib/libbsp/m68k/efi332/start/start.c
+++ b/c/src/lib/libbsp/m68k/efi332/start/start.c
@@ -112,7 +112,7 @@ void dumby_start() {
/* see section 7 of the SIM Reference Manual */
#ifdef FLASHWRITE
*CSORBT = (unsigned short int)
- ( BothBytes | ReadWrite | SyncAS | WaitStates_0 | UserSupSpace );
+ ( BothBytes | ReadWrite | SyncAS | WaitStates_2 | UserSupSpace );
#else /* FLASHWRITE */
*CSORBT = (unsigned short int)
( BothBytes | ReadOnly | SyncAS | WaitStates_0 | UserSupSpace );
@@ -185,7 +185,7 @@ void dumby_start() {
/* Port E and F Pin Assignment Register */
/* see section 9 of the SIM Reference Manual */
- *PEPAR = (unsigned char) 0;
+ *PEPAR = (unsigned char) 0xc3; /* siz1|siz0|dsack1|dsack0 */
*PFPAR = (unsigned char) 0;
/* end of SIM initalization code */