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author | Joel Sherrill <joel.sherrill@OARcorp.com> | 1995-09-20 15:05:19 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 1995-09-20 15:05:19 +0000 |
commit | 486c329f2b4f95dbfefdcbefbe6b25adf7895a94 (patch) | |
tree | e98ee376985db23cf7f6f7da3ba5fe5e63327dbb /c/src/lib/libbsp/m68k/efi332/include/efi332.h | |
parent | Heap changes required some changes in this screen. (diff) | |
download | rtems-486c329f2b4f95dbfefdcbefbe6b25adf7895a94.tar.bz2 |
Actually adding efi bsp's from John Gwynne after forgetting to
commit them.
Diffstat (limited to '')
-rw-r--r-- | c/src/lib/libbsp/m68k/efi332/include/efi332.h | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/m68k/efi332/include/efi332.h b/c/src/lib/libbsp/m68k/efi332/include/efi332.h new file mode 100644 index 0000000000..80d23f291a --- /dev/null +++ b/c/src/lib/libbsp/m68k/efi332/include/efi332.h @@ -0,0 +1,46 @@ +/* efi332.h + * + * $Id$ + */ + +#ifndef _EFI332_H_ +#define _EFI332_H_ + + +/* SIM_MM (SIM Module Mapping) determines the location of the control + register block. When MM=0, register addresses range fom 0x7ff000 to + 0x7FFFFF. When MM=1, register addresses range from 0xfff000 to + 0xffffff. */ +#define SIM_MM 1 + + +/* Interrupt related definitions */ +#define SIM_IARB 15 +#define QSM_IARB 10 + +#define EFI_PIV 64 +#define ISRL_PIT 4 /* zero disables PIT */ + +#define EFI_QIVR 66 /* 66=>SCI and 67=>QSPI interrupt */ +#define ISRL_QSPI 0 + +#define EFI_SPINT 24 /* spurious interrupt */ +#define EFI_INT1 25 /* CTS interrupt */ +#define ISRL_SCI 6 + + + +/* System Clock definitions */ +#define XTAL 32768.0 /* crystal frequency in Hz */ +#define EFI_W 0 /* system clock parameters */ +#define EFI_X 1 +#define EFI_Y 0x38 +#define SYS_CLOCK (XTAL*4.0*(EFI_Y+1)*(1 << (2*EFI_W+EFI_X))) +#define SCI_BAUD 19200 /* RS232 Baud Rate */ + + +/* macros/functions */ +static void reboot(void) __attribute__ ((noreturn)); +__inline__ static void reboot() {asm("trap #15");} + +#endif /* _EFI332_H_ */ |