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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2002-05-09 21:42:24 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2002-05-09 21:42:24 +0000 |
| commit | 2aa61582ef53ea8c129aee4cf7aaf9b96b566cba (patch) | |
| tree | 1b364cb5c0c3520468f7dfab5cfadee24535cff7 /c/src/lib/libbsp/i960/rxgen960/startup/linkcmds.real | |
| parent | 2001-05-09 Joel Sherrill <joel@OARcorp.com> (diff) | |
| download | rtems-2aa61582ef53ea8c129aee4cf7aaf9b96b566cba.tar.bz2 | |
2001-05-09 Joel Sherrill <joel@OARcorp.com>
* startup/linkcmds: In support of gcc 3.1, added one of more
of the sections .jcr, .rodata*, .data.*, .gnu.linkonce.s2.*,
.gnu.linkonce.sb2.*, and .gnu.linkonce.s.*. Spacing corrections
and direction of segments to memory regions may also have been
addressed. This was a sweep across all BSPs.
* startup/linkcmds.real: Ditto.
* clock/ckinit.c: Add volatile to Clock_driver_ticks.
Diffstat (limited to '')
| -rw-r--r-- | c/src/lib/libbsp/i960/rxgen960/startup/linkcmds.real | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/c/src/lib/libbsp/i960/rxgen960/startup/linkcmds.real b/c/src/lib/libbsp/i960/rxgen960/startup/linkcmds.real index 54be197fba..b47b17acf3 100644 --- a/c/src/lib/libbsp/i960/rxgen960/startup/linkcmds.real +++ b/c/src/lib/libbsp/i960/rxgen960/startup/linkcmds.real @@ -122,7 +122,11 @@ SECTIONS *(.dtors) LONG(0) __DTOR_END__ = .; - etext = ALIGN( 0x10 ) ; + _rodata_start = . ; + *(.rodata*) + *(.gnu.linkonce.r*) + _erodata = ALIGN( 0x10 ) ; + etext = ALIGN( 0x10 ) ; /* END NEW TEST TEST TEST */ /* 16 byte aligned PRCB. */ |