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authorJoel Sherrill <joel.sherrill@OARcorp.com>1998-07-23 22:02:34 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>1998-07-23 22:02:34 +0000
commit67a2288991ce3662a588ee83c0bea9c9efae5f1e (patch)
treea8d68b22bfd313619f2a0d0b2e3b4755b8278b9d /c/src/lib/libbsp/i386/pc386/startup
parentPatch from Ralf Corsepius <corsepiu@faw.uni-ulm.de>: (diff)
downloadrtems-67a2288991ce3662a588ee83c0bea9c9efae5f1e.tar.bz2
Patch from Eric VALETTE <valette@crf.canon.fr>:
Here is a enhanced version of my previous patch. This patch enables to potentially share the new interrupt management code for all Intel targets (pc386, go32 and force386) bsp. Note : this patch is complete only for pc386. It still needs to be completed for go32 and force386. I carrefully checked that anything needed is in for force386 (only some function name changes for IDT manipulation and GDT segment manipulation). But anyway I will not be able to test any of theses targets...
Diffstat (limited to '')
-rw-r--r--c/src/lib/libbsp/i386/pc386/startup/Makefile.in10
-rw-r--r--c/src/lib/libbsp/i386/pc386/startup/bspstart.c8
-rw-r--r--c/src/lib/libbsp/i386/pc386/startup/ldsegs.s30
3 files changed, 20 insertions, 28 deletions
diff --git a/c/src/lib/libbsp/i386/pc386/startup/Makefile.in b/c/src/lib/libbsp/i386/pc386/startup/Makefile.in
index 1c8f298249..a4fe0e4cb2 100644
--- a/c/src/lib/libbsp/i386/pc386/startup/Makefile.in
+++ b/c/src/lib/libbsp/i386/pc386/startup/Makefile.in
@@ -11,14 +11,14 @@ PROJECT_ROOT = @PROJECT_ROOT@
PGM=${ARCH}/startup.rel
# C source names, if any, go here -- minus the .c
-C_PIECES=bspclean bsplibc bsppost bspstart exit irq main sbrk
+C_PIECES=bspclean bsplibc bsppost bspstart exit irq irq_init main sbrk
C_FILES=$(C_PIECES:%=%.c)
C_O_FILES=$(C_PIECES:%=${ARCH}/%.o)
H_FILES=
# Assembly source names, if any, go here -- minus the .s
-S_PIECES=ldsegs
+S_PIECES=ldsegs irq_asm
S_FILES=$(S_PIECES:%=%.s)
S_O_FILES=$(S_FILES:%.s=${ARCH}/%.o)
@@ -50,6 +50,12 @@ LDFLAGS +=
CLEAN_ADDITIONS +=
CLOBBER_ADDITIONS +=
+IMPORT_SRC=$(srcdir)/../../shared/irq/irq.c \
+ $(srcdir)/../../shared/irq/irq_init.c $(srcdir)/../../shared/irq/irq_asm.s
+
+preinstall:
+ ${CP} ${IMPORT_SRC} .
+
${PGM}: ${SRCS} ${OBJS}
$(make-rel)
all: ${ARCH} $(SRCS) $(PGM)
diff --git a/c/src/lib/libbsp/i386/pc386/startup/bspstart.c b/c/src/lib/libbsp/i386/pc386/startup/bspstart.c
index 607e816d6d..744808b3be 100644
--- a/c/src/lib/libbsp/i386/pc386/startup/bspstart.c
+++ b/c/src/lib/libbsp/i386/pc386/startup/bspstart.c
@@ -65,7 +65,8 @@ char *rtems_progname; /* Program name - from main(). */
extern void _exit(int); /* define in exit.c */
void bsp_libc_init( void *, unsigned32, int );
void bsp_postdriver_hook(void);
-
+extern void rtems_irq_mngt_init();
+
/*-------------------------------------------------------------------------+
| Function: bsp_pretasking_hook
| Description: BSP pretasking hook. Called just before drivers are
@@ -129,6 +130,11 @@ void bsp_start( void )
console_reserve_resources(&BSP_Configuration);
/*
+ * Init trems_interrupt_management
+ */
+ rtems_irq_mngt_init();
+
+ /*
* The following information is very useful when debugging.
*/
diff --git a/c/src/lib/libbsp/i386/pc386/startup/ldsegs.s b/c/src/lib/libbsp/i386/pc386/startup/ldsegs.s
index f2171575ce..8805128e69 100644
--- a/c/src/lib/libbsp/i386/pc386/startup/ldsegs.s
+++ b/c/src/lib/libbsp/i386/pc386/startup/ldsegs.s
@@ -45,12 +45,13 @@
/*----------------------------------------------------------------------------+
| CODE section
+----------------------------------------------------------------------------*/
-
+EXTERN (rtems_i8259_masks)
+
BEGIN_CODE
EXTERN (_establish_stack)
EXTERN (Timer_exit)
- EXTERN (Clock_exit)
+ EXTERN (clockOff)
.p2align 4
/*----------------------------------------------------------------------------+
@@ -95,25 +96,6 @@ next_step:
movw ax, fs
movw ax, gs
- /* Set default interrupt handler */
- movl $0, ecx
- movl $Interrupt_descriptor_table, eax
- movl $_default_int_handler, ebx
- movl ebx, edx
- sarl $16, edx
-loop:
- movw bx, (eax)
- movw $0x8, 2(eax)
- movw $0x8e00, 4(eax)
- movw dx, 8(eax)
- addl $8, eax
- addl $1, ecx
- cmpl $255, ecx
- jle loop
-
-
-
-
/*---------------------------------------------------------------------+
| Now we have to reprogram the interrupts :-(. We put them right after
| the intel-reserved hardware interrupts, at int 0x20-0x2F. There they
@@ -157,6 +139,8 @@ loop:
outb al, $0x21 /* is cascaded */
call SYM(delay)
+ movw $0xFFFB, SYM(i8259s_cache) /* set up same values in cache */
+
jmp SYM (_establish_stack) # return to the bsp entry code
/*-------------------------------------------------------------------------+
@@ -185,10 +169,6 @@ SYM (_return_to_monitor):
+--------------------------------------------------------------------------*/
.p2align 4
- PUBLIC (_default_int_handler)
-SYM (_default_int_handler):
- iret
-
/*---------------------------------------------------------------------------+
| GDT itself
+--------------------------------------------------------------------------*/