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authorJoel Sherrill <joel.sherrill@OARcorp.com>2000-02-29 16:35:45 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2000-02-29 16:35:45 +0000
commit8eacefcc8b6411ea7c32199b09578590b6926e05 (patch)
tree75d1595ab925561a47726894eeda5f3f38864fd4 /c/src/lib/libbsp/c4x/c4xsim/README
parent6f645ff33ad20374c1b719f250bc1cef91a39833 (diff)
downloadrtems-8eacefcc8b6411ea7c32199b09578590b6926e05.tar.bz2
BSP now compiles and links with CAVSL board information. This includes
linkcmds updated, simio references removed, and switch to libchip for serial ports from simio. Added a MEMORY_MAP file to capture information about the various addresses on this board. In addition, many of the beta patches are now included.
Diffstat (limited to 'c/src/lib/libbsp/c4x/c4xsim/README')
-rw-r--r--c/src/lib/libbsp/c4x/c4xsim/README4
1 files changed, 2 insertions, 2 deletions
diff --git a/c/src/lib/libbsp/c4x/c4xsim/README b/c/src/lib/libbsp/c4x/c4xsim/README
index 8bb3beda0d..4bb72fe8d9 100644
--- a/c/src/lib/libbsp/c4x/c4xsim/README
+++ b/c/src/lib/libbsp/c4x/c4xsim/README
@@ -5,7 +5,7 @@
BSP NAME: c4xsim
BOARD: Simulator in GDB
BUS: N/A
-CPU FAMILY: ppc
+CPU FAMILY: C3X/C4X
CPU: C32 and others
COPROCESSORS: N/A
MODE: 32 bit mode
@@ -14,7 +14,7 @@ DEBUG MONITOR: gdb simulator
PERIPHERALS
===========
-TIMERS: PPC internal Timebase register
+TIMERS: Internal Timer
RESOLUTION: ???
SERIAL PORTS: simulated via
REAL-TIME CLOCK: ???