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authorSebastian Huber <sebastian.huber@embedded-brains.de>2020-12-22 13:00:27 +0100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2020-12-23 09:24:49 +0100
commit9f3a08ef2de99714d679aecf6b1ecb4e11869424 (patch)
tree0d876016ae1dd067b1815dd79715cc7edc752f1e /c/src/lib/libbsp/arm/xilinx-zynqmp/Makefile.am
parentbsps/arm: Invalidate TLB in start.S (diff)
downloadrtems-9f3a08ef2de99714d679aecf6b1ecb4e11869424.tar.bz2
bsps: Use header file for GIC architecture support
This avoids a function call overhead in the interrupt dispatching. Update #4202.
Diffstat (limited to '')
-rw-r--r--c/src/lib/libbsp/arm/xilinx-zynqmp/Makefile.am1
1 files changed, 0 insertions, 1 deletions
diff --git a/c/src/lib/libbsp/arm/xilinx-zynqmp/Makefile.am b/c/src/lib/libbsp/arm/xilinx-zynqmp/Makefile.am
index 11d6ab8039..21db56a0ea 100644
--- a/c/src/lib/libbsp/arm/xilinx-zynqmp/Makefile.am
+++ b/c/src/lib/libbsp/arm/xilinx-zynqmp/Makefile.am
@@ -56,7 +56,6 @@ endif
# IRQ
librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-default-handler.c
librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/dev/irq/arm-gicv2.c
-librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/irq/irq-arm-gicvx-aarch32.c
# Console
librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/dev/serial/console-termios.c