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authorChris Johns <chrisj@rtems.org>2013-12-19 14:44:29 +1100
committerChris Johns <chrisj@rtems.org>2013-12-19 14:44:29 +1100
commit6c1e53014ec551d2702e3d2dae11e548e12412c2 (patch)
treecaae1ccc19cc9caf608dbb19d3f4fd0f05c3c81b /c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstartmmu.c
parentFix the broken conflict from the revert. (diff)
downloadrtems-6c1e53014ec551d2702e3d2dae11e548e12412c2.tar.bz2
arm/zynq: Add support for application supplied MMU tables.
Users can provide a zynq_setup_mmu_and_cache function that sets up the MMU. The Zynq's PL logic means users can vary the MMU.
Diffstat (limited to '')
-rw-r--r--c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstartmmu.c53
1 files changed, 53 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstartmmu.c b/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstartmmu.c
new file mode 100644
index 0000000000..638d2e82b4
--- /dev/null
+++ b/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstartmmu.c
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2013 embedded brains GmbH. All rights reserved.
+ *
+ * embedded brains GmbH
+ * Dornierstr. 4
+ * 82178 Puchheim
+ * Germany
+ * <info@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#include <bsp.h>
+#include <bsp/start.h>
+#include <bsp/arm-cp15-start.h>
+#include <bsp/arm-a9mpcore-start.h>
+
+BSP_START_DATA_SECTION static const arm_cp15_start_section_config
+zynq_mmu_config_table[] = {
+ ARMV7_CP15_START_DEFAULT_SECTIONS,
+ {
+ .begin = 0xe0000000U,
+ .end = 0xe0200000U,
+ .flags = ARMV7_MMU_DEVICE
+ }, {
+ .begin = 0xf8000000U,
+ .end = 0xf9000000U,
+ .flags = ARMV7_MMU_DEVICE
+ }
+};
+
+/*
+ * Make weak and let the user override.
+ */
+BSP_START_TEXT_SECTION void zynq_setup_mmu_and_cache(void) __attribute__ ((weak));
+
+BSP_START_TEXT_SECTION void zynq_setup_mmu_and_cache(void)
+{
+ uint32_t ctrl = arm_cp15_start_setup_mmu_and_cache(
+ ARM_CP15_CTRL_A,
+ ARM_CP15_CTRL_AFE | ARM_CP15_CTRL_Z
+ );
+
+ arm_cp15_start_setup_translation_table_and_enable_mmu_and_cache(
+ ctrl,
+ (uint32_t *) bsp_translation_table_base,
+ ARM_MMU_DEFAULT_CLIENT_DOMAIN,
+ &zynq_mmu_config_table[0],
+ RTEMS_ARRAY_SIZE(zynq_mmu_config_table)
+ );
+}