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authorSebastian Huber <sebastian.huber@embedded-brains.de>2014-11-25 08:40:20 +0100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2014-11-27 10:33:30 +0100
commitcbc433c7a25dbe19414f70edc64f9de1f630a117 (patch)
tree8d53c70658b82b052f0c5c81e7a025548a147aea /c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstart.c
parentrtems: Add rtems_cache_coherent_allocate() (diff)
downloadrtems-cbc433c7a25dbe19414f70edc64f9de1f630a117.tar.bz2
bsps/arm: Add .nocache section
This section can be use to provide a cache coherent memory area via rtems_cache_coherent_add_area().
Diffstat (limited to '')
-rw-r--r--c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstart.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstart.c b/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstart.c
index ad66640861..62511e77b0 100644
--- a/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstart.c
+++ b/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstart.c
@@ -16,6 +16,7 @@
#include <bsp/bootcard.h>
#include <bsp/arm-a9mpcore-clock.h>
#include <bsp/irq-generic.h>
+#include <bsp/linker-symbols.h>
__attribute__ ((weak)) uint32_t zynq_clock_cpu_1x(void)
{
@@ -26,4 +27,8 @@ void bsp_start(void)
{
a9mpcore_clock_initialize_early();
bsp_interrupt_initialize();
+ rtems_cache_coherent_add_area(
+ bsp_nocache_heap_begin,
+ (uintptr_t) bsp_nocache_heap_size
+ );
}