diff options
author | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2015-11-12 23:11:31 +0100 |
---|---|---|
committer | Gedare Bloom <gedare@rtems.org> | 2015-11-18 10:19:01 -0500 |
commit | 416cd88ac0ae8d171b1cd004810539ac9317520d (patch) | |
tree | 15254d97eeee623d4a1585527d880394dbce0381 /c/src/lib/libbsp/arm/tms570/irq/irq.c | |
parent | bsp/tms570: updated reserved space for vector overlay in internal RAM (diff) | |
download | rtems-416cd88ac0ae8d171b1cd004810539ac9317520d.tar.bz2 |
bsp/tms570: use POM only when application image does not start at address 0.
Parameters overlay module is initialized and cleared first.
It is used later to replace exception target vectors
only if that is required.
The application loader code with CPU and SDRAM setup
code has to provide well defined pattern of instructions
at addresses 0x00000000 and 0x0000001f, because only data
read accesses can be processed reliably by POM. The expected
instruction pattern can be seen in the next example
https://github.com/hornmich/tms570ls3137-hdk-sdram/blob/master/SDRAM_SCI_configuration/source/sys_intvecs.asm
Comments with detailed description of code, background
and reasons for selected approach have been included
in TMS570 bsp startup code.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Signed-off-by: Premysl Houdek <kom541000@gmail.com>
Diffstat (limited to 'c/src/lib/libbsp/arm/tms570/irq/irq.c')
-rw-r--r-- | c/src/lib/libbsp/arm/tms570/irq/irq.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/arm/tms570/irq/irq.c b/c/src/lib/libbsp/arm/tms570/irq/irq.c index 2e6e3db637..7a2a55fff5 100644 --- a/c/src/lib/libbsp/arm/tms570/irq/irq.c +++ b/c/src/lib/libbsp/arm/tms570/irq/irq.c @@ -201,6 +201,29 @@ rtems_status_code bsp_interrupt_facility_initialize(void) * can be provided by VIM hardware */ sctlr &= ~(1 << 24); + #if 0 + /* + * Option to enable exception table bypass for interrupts + * + * Because RTEMS requires all interrupts to be serviced through + * common _ARMV4_Exception_interrupt handler to allow task switching + * on exit from interrupt working correctly, vim_vec cannot point + * directly to individual vector handlers and need to point + * to single entry path. But if TMS570_VIM.IRQINDEX is then used + * to target execution to corresponding service then for some + * peripherals (i.e. EMAC) interrupt is already acknowledged + * by VIM and IRQINDEX is read as zero which leads to spurious + * interrupt and peripheral not serviced/blocked. + * + * To analyze this behavior we used trampolines which setup + * bsp_interrupt_vector_inject and pass execution to + * _ARMV4_Exception_interrupt. It works but is more ugly than + * use of POM remap for these cases where application does not + * start at address 0x00000000. If RTEMS image is placed at + * memory space beginning then no of these constructs is necessary. + */ + sctlr |= 1 << 24; + #endif asm volatile ("mcr p15, 0, %0, c1, c0, 0\n": : "r" (sctlr)); return RTEMS_SUCCESSFUL; |