BSP for TMS570LS31x Hercules Development Kit from TI (TMS570LS3137)

Included variants:
  tms570ls3137_hdk_intram - place code and data into internal SRAM
  tms570ls3137_hdk_sdram - place code into external SDRAM and data to SRAM
  tms570ls3137_hdk - variant prepared for stand-alone RTEMS aplication
                      stored and running directly from flash. Not working yet.

Chip initialization code not included in BSP.
External startup generated by TI's HalCoGen was used	for
testing and debugging.

More information about TMS570 BSP can be found at
  http://www.rtems.org/wiki/index.php/Tms570

Patch version 2
  - most of the formatting suggestion applied.
  - BSP converted to use clock shell
  - console driver "set attributes" tested. Baudrate change working
Patch version 3
  - more formatting changes.
  - removed leftover defines and test functions
Todo:
  refactor header files (name register fields)

8 files changed, 647 insertions, 0 deletions

diff --git a/c/src/lib/libbsp/arm/tms570/include/bsp.h b/c/src/lib/libbsp/arm/tms570/include/bsp.h
new file mode 100644
index 0000000000..81bc4cd9cf
--- /dev/null
+++ b/c/src/lib/libbsp/arm/tms570/include/bsp.h
@@ -0,0 +1,59 @@
+/**
+ * @file bsp.h
+ *
+ * @ingroup tms570
+ *
+ * @brief Global BSP definitions.
+ */
+
+/*
+ * Copyright (c) 2014 Premysl Houdek <kom541000@gmail.com>
+ *
+ * Google Summer of Code 2014 at
+ * Czech Technical University in Prague
+ * Zikova 1903/4
+ * 166 36 Praha 6
+ * Czech Republic
+ *
+ * Based on LPC24xx and LPC1768 BSP
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_TMS570_BSP_H
+#define LIBBSP_ARM_TMS570_BSP_H
+
+#include <bspopts.h>
+
+#define BSP_FEATURE_IRQ_EXTENSION
+
+#ifndef ASM
+
+#include <rtems.h>
+#include <rtems/console.h>
+#include <rtems/clockdrv.h>
+#include <bsp/default-initial-extension.h>
+
+#define BSP_OSCILATOR_CLOCK 8000000
+#define BSP_PLL_OUT_CLOCK 160000000
+
+/** Define operation count for Tests */
+#define OPERATION_COUNT 4
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+struct rtems_bsdnet_ifconfig;
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* ASM */
+
+#endif /* LIBBSP_ARM_TMS570_BSP_H */
diff --git a/c/src/lib/libbsp/arm/tms570/include/irq.h b/c/src/lib/libbsp/arm/tms570/include/irq.h
new file mode 100644
index 0000000000..f35e7fe5ca
--- /dev/null
+++ b/c/src/lib/libbsp/arm/tms570/include/irq.h
@@ -0,0 +1,156 @@
+/**
+ * @file irq.h
+ *
+ * @ingroup tms570
+ *
+ * @brief TMS570 interrupt definitions.
+ */
+
+/*
+ * Copyright (c) 2014 Premysl Houdek <kom541000@gmail.com>
+ *
+ * Google Summer of Code 2014 at
+ * Czech Technical University in Prague
+ * Zikova 1903/4
+ * 166 36 Praha 6
+ * Czech Republic
+ *
+ * Based on LPC24xx and LPC1768 BSP
+ * by embedded brains GmbH and others
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_TMS570_IRQ_H
+#define LIBBSP_ARM_TMS570_IRQ_H
+
+#ifndef ASM
+#include <rtems.h>
+#include <rtems/irq.h>
+#include <rtems/irq-extension.h>
+#endif
+
+#define BSP_INTERRUPT_VECTOR_MIN 0U
+#define TMS570_IRQ_ESM_HIGH 0
+#define TMS570_IRQ_RESERVED 1
+#define TMS570_IRQ_TIMER_0 2
+#define TMS570_IRQ_TIMER_1 3
+#define TMS570_IRQ_TIMER_2 4
+#define TMS570_IRQ_TIMER_3 5
+#define TMS570_IRQ_RTI_OVERFLOW_0 6
+#define TMS570_IRQ_RTI_OVERFLOW_1 7
+#define TMS570_IRQ_RTI_TIMEBASE 8
+#define TMS570_IRQ_GIO_HIGH 9
+#define TMS570_IRQ_HET_HIGH 10
+#define TMS570_IRQ_HET_TU_HIGH 11
+#define TMS570_IRQ_MIBSPI1_HIGH 12
+#define TMS570_IRQ_SCI_LEVEL_0 13
+#define TMS570_IRQ_ADC1_EVENT 14
+#define TMS570_IRQ_ADC1_GROUP_1 15
+#define TMS570_IRQ_CAN1_HIGH 16
+#define TMS570_IRQ_RESERVED 17
+#define TMS570_IRQ_FLEXRAY_HIGH 18
+#define TMS570_IRQ_CRC_1 19
+#define TMS570_IRQ_ESM_LOW 20
+#define TMS570_IRQ_SSI 21
+#define TMS570_IRQ_PMU 22
+#define TMS570_IRQ_GIO_LOW 23
+#define TMS570_IRQ_HET_LOW 24
+#define TMS570_IRQ_HET_TU_LOW 25
+#define TMS570_IRQ_MIBSPI1_LOW 26
+#define TMS570_IRQ_SCI_LEVEL_1 27
+#define TMS570_IRQ_ADC1_GROUP_2 28
+#define TMS570_IRQ_CAN1_LOW 29
+#define TMS570_IRQ_RESERVED
+#define TMS570_IRQ_ADC1_MAG 31
+#define TMS570_IRQ_FLEXRAY_LOW 32
+#define TMS570_IRQ_DMA_FTCA 33
+#define TMS570_IRQ_DMA_LFSA 34
+#define TMS570_IRQ_CAN2_HIGH 35
+#define TMS570_IRQ_DMM_HIGH 36
+#define TMS570_IRQ_MIBSPI3_HIGH 37
+#define TMS570_IRQ_MIBSPI3_LOW 38
+#define TMS570_IRQ_DMA_HBCA 39
+#define TMS570_IRQ_DMA_BTCA 40
+#define TMS570_IRQ_DMA_BERA 41
+#define TMS570_IRQ_CAN2_LOW 42
+#define TMS570_IRQ_DMM_LOW 43
+#define TMS570_IRQ_CAN1_IF3 44
+#define TMS570_IRQ_CAN3_HIGH 45
+#define TMS570_IRQ_CAN2_IF3 46
+#define TMS570_IRQ_FPU 47
+#define TMS570_IRQ_FLEXRAY_TU 48
+#define TMS570_IRQ_SPI4_HIGH 49
+#define TMS570_IRQ_ADC2_EVENT 50
+#define TMS570_IRQ_ADC2_GROUP_1 51
+#define TMS570_IRQ_FLEXRAY_T0C 52
+#define TMS570_IRQ_MIBSPIP5_HIGH 53
+#define TMS570_IRQ_SPI4_LOW 54
+#define TMS570_IRQ_CAN3_LOW 55
+#define TMS570_IRQ_MIBSPIP5_LOW 56
+#define TMS570_IRQ_ADC2_GROUP_2 57
+#define TMS570_IRQ_FLEXRAY_TU_ERROR 58
+#define TMS570_IRQ_ADC2_MAG 59
+#define TMS570_IRQ_CAN3_IF3 60
+#define TMS570_IRQ_FSM_DONE 61
+#define TMS570_IRQ_FLEXRAY_T1C 62
+#define TMS570_IRQ_HET2_LEVEL_0 63
+#define TMS570_IRQ_SCI2_LEVEL_0 64
+#define TMS570_IRQ_HET_TU2_LEVEL_0 65
+#define TMS570_IRQ_IC2_INTERRUPT 66
+#define TMS570_IRQ_HET2_LEVEL_1 73
+#define TMS570_IRQ_SCI2_LEVEL_1 74
+#define TMS570_IRQ_HET_TU2_LEVEL_1 75
+#define TMS570_IRQ_HWA_INT_REQ_H 80
+#define TMS570_IRQ_HWA_INT_REQ_H 81
+#define TMS570_IRQ_DCC_DONE_INTERRUPT 82
+#define TMS570_IRQ_DCC2_DONE_INTERRUPT 83
+#define TMS570_IRQ_HWAG1_INT_REQ_L 88
+#define TMS570_IRQ_HWAG2_INT_REQ_L 89
+#define BSP_INTERRUPT_VECTOR_MAX 94
+
+#define TMS570_IRQ_PRIORITY_VALUE_MIN 0U
+#define TMS570_IRQ_PRIORITY_VALUE_MAX 0U
+
+#define TMS570_IRQ_PRIORITY_COUNT ( TMS570_IRQ_PRIORITY_VALUE_MAX + 1U )
+#define TMS570_IRQ_PRIORITY_HIGHEST TMS570_IRQ_PRIORITY_VALUE_MIN
+#define TMS570_IRQ_PRIORITY_LOWEST TMS570_IRQ_PRIORITY_VALUE_MAX
+
+#ifndef ASM
+
+/**
+ * @brief Set priority of the interrupt vector.
+ *
+ * This function is here because of compability. It should set
+ * priority of the interrupt vector.
+ * @warning It does not set any priority at HW layer. It is nearly imposible to
+ * @warning set priority of the interrupt on TMS570 in a nice way.
+ * @param[in] vector vector of isr
+ * @param[in] priority new priority assigned to the vector
+ * @return Void
+ */
+void tms570_irq_set_priority(
+  rtems_vector_number vector,
+  unsigned            priority
+);
+
+/**
+ * @brief Gets priority of the interrupt vector.
+ *
+ * This function is here because of compability. It returns priority
+ * of the isr vector last set by tms570_irq_set_priority function.
+ *
+ * @warning It does not return any real priority of the HW layer.
+ * @param[in] vector vector of isr
+ * @retval 0 vector is invalid.
+ * @retval priority priority of the interrupt
+ */
+unsigned tms570_irq_get_priority( rtems_vector_number vector );
+
+#endif /* ASM */
+
+/** @} */
+
+#endif /* LIBBSP_ARM_TMS570_IRQ_H */
diff --git a/c/src/lib/libbsp/arm/tms570/include/tms570-pom.h b/c/src/lib/libbsp/arm/tms570/include/tms570-pom.h
new file mode 100644
index 0000000000..a44771157d
--- /dev/null
+++ b/c/src/lib/libbsp/arm/tms570/include/tms570-pom.h
@@ -0,0 +1,101 @@
+/**
+ * @file tms570-pom.h
+ * @ingroup tms570
+ * @brief Parameter Overlay Module (POM) header file
+ */
+
+/*
+ * Copyright (c) 2014 Pavel Pisa <pisa@cmp.felk.cvut.cz>
+ *
+ * Czech Technical University in Prague
+ * Zikova 1903/4
+ * 166 36 Praha 6
+ * Czech Republic
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_TMS570_POM_H
+#define LIBBSP_ARM_TMS570_POM_H
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#define TMS570_POM_REGIONS 32
+#define TMS570_POM_GLBCTRL_ENABLE 0x000000a0a
+
+/* Specification of memory size used for field REGSIZE of tms570_pom_region_t */
+#define TMS570_POM_REGSIZE_DISABLED 0x0
+#define TMS570_POM_REGSIZE_64B      0x1
+#define TMS570_POM_REGSIZE_128B     0x2
+#define TMS570_POM_REGSIZE_256B     0x3
+#define TMS570_POM_REGSIZE_512B     0x4
+#define TMS570_POM_REGSIZE_1KB      0x5
+#define TMS570_POM_REGSIZE_2KB      0x6
+#define TMS570_POM_REGSIZE_4KB      0x7
+#define TMS570_POM_REGSIZE_8KB      0x8
+#define TMS570_POM_REGSIZE_16KB     0x9
+#define TMS570_POM_REGSIZE_32KB     0xa
+#define TMS570_POM_REGSIZE_64KB     0xb
+#define TMS570_POM_REGSIZE_128KB    0xc
+#define TMS570_POM_REGSIZE_256KB    0xd
+
+#define TMS570_POM_REGADDRMASK    ((1<<23)-1)
+
+typedef struct tms570_pom_region_t {
+  uint32_t PROGSTART;
+  uint32_t OVLSTART;
+  uint32_t REGSIZE;
+  uint32_t res0;
+} tms570_pom_region_t;
+
+typedef struct tms570_pom_t {
+  uint32_t GLBCTRL;                    /* 000h Global Control Register */
+  uint32_t REV;                        /* 004h Revision ID */
+  uint32_t CLKCTRL;                    /* 008h Clock Gate Control Register */
+  uint32_t FLG;                        /* 00Ch Status Register */
+  uint32_t reserved1[0x1f0/4];
+  tms570_pom_region_t REG[TMS570_POM_REGIONS]; /* 200h Program Regions */
+  uint32_t reserved2[0xb00/4];
+  uint32_t ITCTRL;                     /* F00h Integration Control Register */
+  uint32_t reserved3[0x09c/4];
+  uint32_t CLAIMSET;                   /* FA0h Claim Set Register */
+  uint32_t CLAIMCLR;                   /* FA4h Claim Clear Register */
+  uint32_t reserved4[0x008/4];
+  uint32_t LOCKACCESS;                 /* FB0h Lock Access Register */
+  uint32_t LOCKSTATUS;                 /* FB4h Lock Status Register */
+  uint32_t AUTHSTATUS;                 /* FB8h Authentication Status Register */
+  uint32_t reserved5[0x00c/4];
+  uint32_t DEVID;                      /* FC8h Device ID Register */
+  uint32_t DEVTYPE;                    /* FCCh Device Type Register */
+  uint32_t PERIPHERALID4;              /* FD0h Peripheral ID 4 Register */
+  uint32_t PERIPHERALID5;              /* FD4h Peripheral ID 5 Register */
+  uint32_t PERIPHERALID6;              /* FD8h Peripheral ID 6 Register */
+  uint32_t PERIPHERALID7;              /* FDCh Peripheral ID 7 Register */
+  uint32_t PERIPHERALID0;              /* FE0h Peripheral ID 0 Register */
+  uint32_t PERIPHERALID1;              /* FE4h Peripheral ID 1 Register */
+  uint32_t PERIPHERALID2;              /* FE8h Peripheral ID 2 Register */
+  uint32_t PERIPHERALID3;              /* FECh Peripheral ID 3 Register */
+  uint32_t COMPONENTID0;               /* FF0h Component ID 0 Register */
+  uint32_t COMPONENTID1;               /* FF4h Component ID 1 Register */
+  uint32_t COMPONENTID2;               /* FF8h Component ID 2 Register */
+  uint32_t COMPONENTID3;               /* FFCh Component ID 3 Register */
+} tms570_pom_t;
+
+#define TMS570_POM (*(volatile tms570_pom_t*)0xffa04000)
+
+int mem_dump(void *buf, unsigned long start, unsigned long len, int blen);
+void tms570_pom_remap(void);
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LIBBSP_ARM_TMS570_POM_H */
diff --git a/c/src/lib/libbsp/arm/tms570/include/tms570-rti.h b/c/src/lib/libbsp/arm/tms570/include/tms570-rti.h
new file mode 100644
index 0000000000..25c02e5906
--- /dev/null
+++ b/c/src/lib/libbsp/arm/tms570/include/tms570-rti.h
@@ -0,0 +1,95 @@
+/**
+ * @file tms570-rti.h
+ *
+ * @ingroup tms570
+ *
+ * @brief Real Time Interrupt module (RTI) header file.
+ */
+
+/*
+ * Copyright (c) 2014 Premysl Houdek <kom541000@gmail.com>
+ *
+ * Google Summer of Code 2014 at
+ * Czech Technical University in Prague
+ * Zikova 1903/4
+ * 166 36 Praha 6
+ * Czech Republic
+ *
+ * Based on LPC24xx and LPC1768 BSP
+ * by embedded brains GmbH and others
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_TMS570_RTI_H
+#define LIBBSP_ARM_TMS570_RTI_H
+
+#ifndef ASM
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+typedef struct {
+  uint32_t RTIGCTRL;       /* RTIGlobalControlRegister */
+  uint32_t RTITBCTRL;      /* RTITimebaseControlRegister */
+  uint32_t RTICAPCTRL;     /* RTICaptureControlRegister */
+  uint32_t RTICOMPCTRL;    /* RTICompareControlRegister */
+  uint32_t RTIFRC0;        /* RTIFreeRunningCounter0Register */
+  uint32_t RTIUC0;         /* RTIUpCounter0Register */
+  uint32_t RTICPUC0;       /* RTICompareUpCounter0Register */
+  uint32_t reserved1 [0x4/4];
+  uint32_t RTICAFRC0;      /* RTICaptureFreeRunningCounter0Register */
+  uint32_t RTICAUC0;       /* RTICaptureUpCounter0Register */
+  uint32_t reserved2 [0x8/4];
+  uint32_t RTIFRC1;        /* RTIFreeRunningCounter1Register */
+  uint32_t RTIUC1;         /* RTIUpCounter1Register */
+  uint32_t RTICPUC1;       /* RTICompareUpCounter1Register */
+  uint32_t reserved3 [0x4/4];
+  uint32_t RTICAFRC1;      /* RTICaptureFreeRunningCounter1Register */
+  uint32_t RTICAUC1;       /* RTICaptureUpCounter1Register */
+  uint32_t reserved4 [0x8/4];
+  uint32_t RTICOMP0;       /* RTICompare0Register */
+  uint32_t RTIUDCP0;       /* RTIUpdateCompare0Register */
+  uint32_t RTICOMP1;       /* RTICompare1Register */
+  uint32_t RTIUDCP1;       /* RTIUpdateCompare1Register */
+  uint32_t RTICOMP2;       /* RTICompare2Register */
+  uint32_t RTIUDCP2;       /* RTIUpdateCompare2Register */
+  uint32_t RTICOMP3;       /* RTICompare3Register */
+  uint32_t RTIUDCP3;       /* RTIUpdateCompare3Register */
+  uint32_t RTITBLCOMP;     /* RTITimebaseLowCompareRegister */
+  uint32_t RTITBHCOMP;     /* RTITimebaseHighCompareRegister */
+  uint32_t reserved5 [0x8/4];
+  uint32_t RTISETINTENA;   /* RTISetInterruptEnableRegister */
+  uint32_t RTICLEARINTENA; /* RTIClearInterruptEnableRegister */
+  uint32_t RTIINTFLAG;     /* RTIInterruptFlagRegister */
+  uint32_t reserved6 [0x4/4];
+  uint32_t RTIDWDCTRL;     /* DigitalWatchdogControlRegister */
+  uint32_t RTIDWDPRLD;     /* DigitalWatchdogPreloadRegister */
+  uint32_t RTIWDSTATUS;    /* WatchdogStatusRegister */
+  uint32_t RTIWDKEY;       /* RTIWatchdogKeyRegister */
+  uint32_t RTIDWDCNTR;     /* RTIDigitalWatchdogDownCounterRegister */
+  uint32_t RTIWWDRXNCTRL;  /* DigitalWindowedWatchdogReactionControlRegister */
+  uint32_t RTIWWDSIZECTRL; /* DigitalWindowedWatchdogWindowSizeControlRegister */
+  uint32_t RTIINTCLRENABLE;/* RTICompareInterruptClearEnableRegister */
+  uint32_t RTICOMP0CLR;    /* RTICompare0ClearRegister */
+  uint32_t RTICOMP1CLR;    /* RTICompare1ClearRegister */
+  uint32_t RTICOMP2CLR;    /* RTICompare2ClearRegister */
+  uint32_t RTICOMP3CLR;    /* RTICompare3ClearRegister */
+}tms570_rti_t;
+
+#define TMS570_RTI (*(volatile tms570_rti_t*)0xFFFFFC00)
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* ASM */
+
+#endif /* LIBBSP_ARM_TMS570_IRQ_H */
diff --git a/c/src/lib/libbsp/arm/tms570/include/tms570-sci-driver.h b/c/src/lib/libbsp/arm/tms570/include/tms570-sci-driver.h
new file mode 100644
index 0000000000..5f38908499
--- /dev/null
+++ b/c/src/lib/libbsp/arm/tms570/include/tms570-sci-driver.h
@@ -0,0 +1,57 @@
+/**
+ * @file tms570-sci-driver.h
+ *
+ * @ingroup tms570
+ *
+ * @brief Declaration of serial's driver inner structure.
+ */
+
+/*
+ * Copyright (c) 2014 Premysl Houdek <kom541000@gmail.com>
+ *
+ * Google Summer of Code 2014 at
+ * Czech Technical University in Prague
+ * Zikova 1903/4
+ * 166 36 Praha 6
+ * Czech Republic
+ *
+ * Based on LPC24xx and LPC1768 BSP
+ * by embedded brains GmbH and others
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef TMS570_SCI_DRIVER
+#define TMS570_SCI_DRIVER
+
+#include <rtems/termiostypes.h>
+#include <rtems/irq.h>
+#include <bsp/tms570-sci.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/* Low-level driver specific data structure */
+typedef struct {
+  const char *device_name;
+  volatile tms570_sci_t *regs;
+  int tx_chars_in_hw;
+  rtems_vector_number irq;
+} tms570_sci_context;
+
+extern const rtems_termios_device_handler tms570_sci_handler_polled;
+
+extern const rtems_termios_device_handler tms570_sci_handler_interrupt;
+
+extern const tms570_sci_context driver_context_table[];
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* TMS570_SCI_DRIVER */
diff --git a/c/src/lib/libbsp/arm/tms570/include/tms570-sci.h b/c/src/lib/libbsp/arm/tms570/include/tms570-sci.h
new file mode 100644
index 0000000000..6ed68e24bf
--- /dev/null
+++ b/c/src/lib/libbsp/arm/tms570/include/tms570-sci.h
@@ -0,0 +1,76 @@
+/**
+ * @file tms570-sci.h
+ *
+ * @ingroup tms570
+ *
+ * @brief Serial Communication Interface (SCI) header file.
+ */
+
+/*
+ * Copyright (c) 2014 Premysl Houdek <kom541000@gmail.com>
+ *
+ * Google Summer of Code 2014 at
+ * Czech Technical University in Prague
+ * Zikova 1903/4
+ * 166 36 Praha 6
+ * Czech Republic
+ *
+ * Based on LPC24xx and LPC1768 BSP
+ * by embedded brains GmbH and others
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_TMS570_SCI_H
+#define LIBBSP_ARM_TMS570_SCI_H
+
+#include <libchip/serial.h>
+
+#include <rtems.h>
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+typedef struct {
+  uint32_t SCIGCR0;         /*SCIGlobalControlRegister0*/
+  uint32_t SCIGCR1;         /*SCIGlobalControlRegister1*/
+  uint32_t reserved1 [0x4/4];
+  uint32_t SCISETINT;       /*SCISetInterruptRegister*/
+  uint32_t SCICLEARINT;     /*SCIClearInterruptRegister*/
+  uint32_t SCISETINTLVL;    /*SCISetInterruptLevelRegister*/
+  uint32_t SCICLEARINTLVL;  /*SCIClearInterruptLevelRegister*/
+  uint32_t SCIFLR;          /*SCIFlagsRegister*/
+  uint32_t SCIINTVECT0;     /*SCIInterruptVectorOffset0*/
+  uint32_t SCIINTVECT1;     /*SCIInterruptVectorOffset1*/
+  uint32_t SCIFORMAT;       /*SCIFormatControlRegister*/
+  uint32_t BRS;             /*BaudRateSelectionRegister*/
+  uint32_t SCIED;           /*ReceiverEmulationDataBuffer*/
+  uint32_t SCIRD;           /*ReceiverDataBuffer*/
+  uint32_t SCITD;           /*TransmitDataBuffer*/
+  uint32_t SCIPIO0;         /*SCIPinI/OControlRegister0*/
+  uint32_t SCIPIO1;         /*SCIPinI/OControlRegister1*/
+  uint32_t SCIPIO2;         /*SCIPinI/OControlRegister2*/
+  uint32_t SCIPIO3;         /*SCIPinI/OControlRegister3*/
+  uint32_t SCIPIO4;         /*SCIPinI/OControlRegister4*/
+  uint32_t SCIPIO5;         /*SCIPinI/OControlRegister5*/
+  uint32_t SCIPIO6;         /*SCIPinI/OControlRegister6*/
+  uint32_t SCIPIO7;         /*SCIPinI/OControlRegister7*/
+  uint32_t SCIPIO8;         /*SCIPinI/OControlRegister8*/
+  uint32_t reserved2 [0x30/4];
+  uint32_t IODFTCTRL;       /*Input/OutputErrorEnableRegister*/
+}tms570_sci_t;
+
+#define TMS570_SCI (*(volatile tms570_sci_t*)0xFFF7E400U)
+#define TMS570_SCI2 (*(volatile tms570_sci_t*)0xFFF7E500U)
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif
diff --git a/c/src/lib/libbsp/arm/tms570/include/tms570-vim.h b/c/src/lib/libbsp/arm/tms570/include/tms570-vim.h
new file mode 100644
index 0000000000..136af531f8
--- /dev/null
+++ b/c/src/lib/libbsp/arm/tms570/include/tms570-vim.h
@@ -0,0 +1,75 @@
+/**
+ * @file tms570-vim.h
+ *
+ * @ingroup tms570
+ *
+ * @brief Vectored Interrupt Module (VIM) header file.
+ */
+
+/*
+ * Copyright (c) 2014 Premysl Houdek <kom541000@gmail.com>
+ *
+ * Google Summer of Code 2014 at
+ * Czech Technical University in Prague
+ * Zikova 1903/4
+ * 166 36 Praha 6
+ * Czech Republic
+ *
+ * Based on LPC24xx and LPC1768 BSP
+ * by embedded brains GmbH and others
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_TMS570_VIM_H
+#define LIBBSP_ARM_TMS570_VIM_H
+
+#ifndef ASM
+#include <rtems.h>
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+typedef struct{
+    uint32_t PARFLG;            /* InterruptVectorTableParityFlagRegister */
+    uint32_t PARCTL;            /* InterruptVectorTableParityControlRegister */
+    uint32_t ADDERR;            /* AddressParityErrorRegister */
+    uint32_t FBPARERR;          /* Fall-BackAddressParityErrorRegister */
+    uint32_t reserved1 [0x4/4];
+    uint32_t IRQINDEX;          /* IRQIndexOffsetVectorRegister */
+    uint32_t FIQINDEX;          /* FIQIndexOffsetVectorRegister */
+    uint32_t reserved2 [0x8/4];
+    uint32_t FIRQPR[3];         /* FIQ/IRQProgramControlRegister0 */
+    uint32_t reserved3 [0x4/4];
+    uint32_t INTREQ[3];         /* PendingInterruptReadLocationRegister0 */
+    uint32_t reserved4 [0x4/4];
+    uint32_t REQENASET[3];      /* InterruptEnableSetRegister0 */
+    uint32_t reserved5 [0x4/4];
+    uint32_t REQENACLR[3];      /* InterruptEnableClearRegister0 */
+    uint32_t reserved6 [0x4/4];
+    uint32_t WAKEENASET[3];     /* Wake-upEnableSetRegister0 */
+    uint32_t reserved7 [0x4/4];
+    uint32_t WAKEENACLR[3];     /* Wake-upEnableClearRegister0 */
+    uint32_t reserved8 [0x4/4];
+    uint32_t IRQVECREG;         /* IRQInterruptVectorRegister */
+    uint32_t FIQVECREG;         /* FIQInterruptVectorRegister */
+    uint32_t CAPEVT;            /* CaptureEventRegister */
+    uint32_t reserved9 [0x4/4];
+    uint32_t CHANCTRL [0x5c/4]; /* VIM Interrupt Control Register (PARSER ERROR) */
+}tms570_vim_t;
+
+#define TMS570_VIM (*(volatile tms570_vim_t*)0xFFFFFDEC)
+
+#endif
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LIBBSP_ARM_TMS570_IRQ_H */
diff --git a/c/src/lib/libbsp/arm/tms570/include/tms570.h b/c/src/lib/libbsp/arm/tms570/include/tms570.h
new file mode 100644
index 0000000000..2023a29040
--- /dev/null
+++ b/c/src/lib/libbsp/arm/tms570/include/tms570.h
@@ -0,0 +1,28 @@
+/**
+ * @file tms570.h
+ *
+ * @ingroup tms570
+ *
+ * @brief Specific register definitions according to tms570 family boards.
+ */
+
+/*
+ * Copyright (c) 2014 Premysl Houdek <kom541000@gmail.com>
+ *
+ * Google Summer of Code 2014 at
+ * Czech Technical University in Prague
+ * Zikova 1903/4
+ * 166 36 Praha 6
+ * Czech Republic
+ *
+ * Based on LPC24xx and LPC1768 BSP
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_TMS570_H
+#define LIBBSP_ARM_TMS570_H
+
+#endif /* LIBBSP_ARM_TMS570_H */