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author | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2016-07-23 12:07:10 +0200 |
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committer | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2016-10-02 10:40:35 +0200 |
commit | acb488ff5932931bfe6a2efa758788e273fa6948 (patch) | |
tree | 22bd130fd2d95144cae83b0ebcb87ab575f1c2d4 /c/src/lib/libbsp/arm/tms570/include/tms570-pins.h | |
parent | arm/raspberrypi: ensure that correct RPI_PERIPHERAL_BASE is provided by raspb... (diff) | |
download | rtems-acb488ff5932931bfe6a2efa758788e273fa6948.tar.bz2 |
arm/raspberrypi: remove duplicate setup of IRQ handler in the main ARM exception table.
Exception table setup is processed by common CPU architecture support.
For ARM architecture, it can be found in the file
rtems/c/src/lib/libbsp/arm/shared/start/start.S
and ends by bsp_vector_table_copy_done label.
The actual tabel content can be found at
bsp_start_vector_table_begin
For ARMv7-A and even other variant with hypervisor mode support,
it is even not necessary to copy table to address 0 at all
because CP15 register can be used to specify alternative
table start address
arm_cp15_set_vector_base_address(&)bsp_start_vector_table_begin;
ARMv7-M have register to set exception table base as well.
Updates #2783
Diffstat (limited to 'c/src/lib/libbsp/arm/tms570/include/tms570-pins.h')
0 files changed, 0 insertions, 0 deletions