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| author | Tomasz Gregorek <tomasz.gregorek@gmail.com> | 2014-09-21 20:07:41 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-10-02 07:54:52 +0200 |
| commit | 7db695311b6e0c1ddd893a5a1e9a283c0235eebc (patch) | |
| tree | 72748bf2e9bd3a4d560e9bb51ea48dc2a8b5c7f7 /c/src/lib/libbsp/arm/stm32f4/include/stm32f4.h | |
| parent | Fix assertion "BUF != NULL" for i386 (diff) | |
| download | rtems-7db695311b6e0c1ddd893a5a1e9a283c0235eebc.tar.bz2 | |
bsp/stm32f4XXXX: System clock configuration
Added simple math to caclulate register values for the PLL
and for the prescalers. It will try to keep 48MHz for the USB OTG FS.
Also it will set latency on the Flash memory for the high speeds.
Limitations:
It is assumed that 1MHz resolution is enough.
Best fits for the clocks are achieved with multiplies of 42MHz.
Even though APB1, APB2 and AHB are calculated user is still required
to provide correct values for the bsp configuration for the:
STM32F4_PCLK1
STM32F4_PCLK2
STM32F4_HCLK (= system clock)
as those are used for the peripheral clocking calculations.
Diffstat (limited to '')
| -rw-r--r-- | c/src/lib/libbsp/arm/stm32f4/include/stm32f4.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/arm/stm32f4/include/stm32f4.h b/c/src/lib/libbsp/arm/stm32f4/include/stm32f4.h index 59d13ef0f6..d26f914887 100644 --- a/c/src/lib/libbsp/arm/stm32f4/include/stm32f4.h +++ b/c/src/lib/libbsp/arm/stm32f4/include/stm32f4.h @@ -55,6 +55,16 @@ /** @} */ +/** + * @name STM32F4XXXX FLASH + * @{ + */ + +#include <bsp/stm32f4xxxx_flash.h> +#define STM32F4_FLASH ((volatile stm32f4_flash *) (STM32F4_BASE + 0x40023C00)) + +/** @} */ + #include <bsp/stm32_i2c.h> /** |