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| author | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2016-09-03 01:30:20 +0200 |
|---|---|---|
| committer | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2016-10-02 10:40:34 +0200 |
| commit | 6f4e903cf0f99b289ce80d5108600ab11abeeee9 (patch) | |
| tree | 13be5f6c429e1ff630b6fdbd5b09cb3add6f7bbf /c/src/lib/libbsp/arm/shared | |
| parent | arm/xilinx_zynq: ensure that cache is cleaned and MMU disabled when initializ... (diff) | |
| download | rtems-6f4e903cf0f99b289ce80d5108600ab11abeeee9.tar.bz2 | |
bsps/arm: use defines for cache type register format field.
The change documents meaning of codes and opens
well defined way to use cache type format for cache
examination/debugging outside of arm-cp15.h file.
Updates #2782
Updates #2783
Diffstat (limited to 'c/src/lib/libbsp/arm/shared')
0 files changed, 0 insertions, 0 deletions