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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-09-10 11:15:44 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-09-10 11:29:54 +0200 |
| commit | 12ab8d67e437dda2132a0b2f6a76605a6b34c17c (patch) | |
| tree | 802a7c88f206beaf68b8073e336ca31b5504aa9b /c/src/lib/libbsp/arm/shared | |
| parent | bsps/arm: Fix invalidate instruction cache (diff) | |
| download | rtems-12ab8d67e437dda2132a0b2f6a76605a6b34c17c.tar.bz2 | |
bsps/arm: Fix get cache size
Diffstat (limited to 'c/src/lib/libbsp/arm/shared')
| -rw-r--r-- | c/src/lib/libbsp/arm/shared/arm-l2c-310/cache_.h | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/c/src/lib/libbsp/arm/shared/arm-l2c-310/cache_.h b/c/src/lib/libbsp/arm/shared/arm-l2c-310/cache_.h index f88608a5db..e61749e6b6 100644 --- a/c/src/lib/libbsp/arm/shared/arm-l2c-310/cache_.h +++ b/c/src/lib/libbsp/arm/shared/arm-l2c-310/cache_.h @@ -1517,10 +1517,11 @@ _CPU_cache_get_data_cache_size( const uint32_t level ) switch( level ) { - case 0: + case 1: size = arm_cache_l1_get_data_cache_size(); break; - case 1: + case 0: + case 2: size = cache_l2c_310_get_cache_size(); break; default: @@ -1537,10 +1538,11 @@ _CPU_cache_get_instruction_cache_size( const uint32_t level ) switch( level ) { - case 0: + case 1: size = arm_cache_l1_get_instruction_cache_size(); break; - case 1: + case 0: + case 2: size = cache_l2c_310_get_cache_size(); break; default: |