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authorSebastian Huber <sebastian.huber@embedded-brains.de>2013-05-08 09:30:31 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2013-05-10 12:10:14 +0200
commitcfd8d7a3d73a10ae7cdbbfe5eb39839c46a5c77e (patch)
tree5b694eb680b61129908a274b218d5f67fa0d34d6 /c/src/lib/libbsp/arm/shared/start/start.S
parentarm: Simplify architecture selection (diff)
downloadrtems-cfd8d7a3d73a10ae7cdbbfe5eb39839c46a5c77e.tar.bz2
arm: Support VFP-D32 and Neon
Diffstat (limited to 'c/src/lib/libbsp/arm/shared/start/start.S')
-rw-r--r--c/src/lib/libbsp/arm/shared/start/start.S20
1 files changed, 20 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/arm/shared/start/start.S b/c/src/lib/libbsp/arm/shared/start/start.S
index cb91d41494..e79a5fc503 100644
--- a/c/src/lib/libbsp/arm/shared/start/start.S
+++ b/c/src/lib/libbsp/arm/shared/start/start.S
@@ -154,6 +154,26 @@ _start:
/* Stay in SVC mode */
+#ifdef ARM_MULTILIB_VFP_D32
+ /* Read CPACR */
+ mrc p15, 0, r0, c1, c0, 2
+
+ /* Enable CP10 and CP11 */
+ orr r0, r0, #(1 << 20)
+ orr r0, r0, #(1 << 22)
+
+ /* Clear ASEDIS and D32DIS */
+ bic r0, r0, #(3 << 30)
+
+ /* Write CPACR */
+ mcr p15, 0, r0, c1, c0, 2
+ isb
+
+ /* Enable FPU */
+ mov r0, #(1 << 30)
+ vmsr FPEXC, r0
+#endif
+
/*
* Branch to start hook 0.
*