diff options
author | Martin Galvan <martin.galvan@tallertechnologies.com> | 2015-02-26 17:31:27 -0300 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2015-02-27 12:05:36 +0100 |
commit | 991fdb330be81c5cfb47f67fd032569809db6c41 (patch) | |
tree | 5368daedc8eba6ec32129d49e747bdd38c23eab0 /c/src/lib/libbsp/arm/shared/start/start.S | |
parent | ARM: Fix _ARMV4_Exception_fiq_default (diff) | |
download | rtems-991fdb330be81c5cfb47f67fd032569809db6c41.tar.bz2 |
ARM: Add BSP_START_NEEDS_REGISTER_INITIALIZATION
This patch adds the macro BSP_START_NEEDS_REGISTER_INITIALIZATION and
three hooks for BSP-specific register init code to arm/shared/start.S.
Said hooks are bsp_start_init_registers_core (intended for initializing
the ARM core registers), bsp_start_init_registers_banked_fiq (for the
FIQ mode banked registers) and bsp_start_init_registers_vfp (for the FPU
registers). BSP_START_NEEDS_REGISTER_INITIALIZATION would be defined in
a BSP's configure.ac (so that it appears in its bspopts.h).
This patch also adds the register init code required by the TMS570.
We've tested it with the tms570ls3137_hdk.cfg config and it works fine.
Diffstat (limited to 'c/src/lib/libbsp/arm/shared/start/start.S')
-rw-r--r-- | c/src/lib/libbsp/arm/shared/start/start.S | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/arm/shared/start/start.S b/c/src/lib/libbsp/arm/shared/start/start.S index f5f0fa4091..4050deb930 100644 --- a/c/src/lib/libbsp/arm/shared/start/start.S +++ b/c/src/lib/libbsp/arm/shared/start/start.S @@ -48,6 +48,12 @@ .extern _ARMV4_Exception_fiq_default .extern _ARMV7M_Exception_default +#ifdef BSP_START_NEEDS_REGISTER_INITIALIZATION + .extern bsp_start_init_registers_core + .extern bsp_start_init_registers_banked_fiq + .extern bsp_start_init_registers_vfp +#endif + /* Global symbols */ .globl _start .globl bsp_start_vector_table_begin @@ -127,6 +133,10 @@ _start: * loader. */ +#ifdef BSP_START_NEEDS_REGISTER_INITIALIZATION + bl bsp_start_init_registers_core +#endif + #ifdef RTEMS_SMP /* Read MPIDR */ mrc p15, 0, r0, c0, c0, 5 @@ -161,6 +171,10 @@ _start: add sp, r1 #endif +#ifdef BSP_START_NEEDS_REGISTER_INITIALIZATION + bl bsp_start_init_registers_banked_fiq +#endif + /* Enter ABT mode and set up the ABT stack pointer */ mov r0, #(ARM_PSR_M_ABT | ARM_PSR_I | ARM_PSR_F) msr cpsr, r0 @@ -207,6 +221,11 @@ _start: /* Enable FPU */ mov r0, #(1 << 30) vmsr FPEXC, r0 + +#ifdef BSP_START_NEEDS_REGISTER_INITIALIZATION + bl bsp_start_init_registers_vfp +#endif + #endif /* ARM_MULTILIB_VFP */ /* @@ -304,6 +323,10 @@ bsp_start_vector_table_end: _start: +#ifdef BSP_START_NEEDS_REGISTER_INITIALIZATION + bl bsp_start_init_registers_core +#endif + #ifdef ARM_MULTILIB_VFP /* * Enable CP10 and CP11 coprocessors for privileged and user mode in @@ -315,8 +338,13 @@ _start: str r1, [r0] dsb isb + +#ifdef BSP_START_NEEDS_REGISTER_INITIALIZATION + bl bsp_start_init_registers_vfp #endif +#endif /* ARM_MULTILIB_VFP */ + ldr sp, =bsp_stack_main_end ldr lr, =bsp_start_hook_0_done + 1 b bsp_start_hook_0 |