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authorThomas Doerfler <Thomas.Doerfler@embedded-brains.de>2009-09-18 08:06:32 +0000
committerThomas Doerfler <Thomas.Doerfler@embedded-brains.de>2009-09-18 08:06:32 +0000
commit091705c07fc934b7ad1afb99e2b3dbc8010fa684 (patch)
tree89af05bc1470dd7a004af9a67d865bc3bb9fcf16 /c/src/lib/libbsp/arm/shared/start/start.S
parentChanges throughout. (diff)
downloadrtems-091705c07fc934b7ad1afb99e2b3dbc8010fa684.tar.bz2
Removed symbols and renamed sections.
Added bsp_start_memcpy(). Documentation. Changes for external ROM start.
Diffstat (limited to 'c/src/lib/libbsp/arm/shared/start/start.S')
-rw-r--r--c/src/lib/libbsp/arm/shared/start/start.S145
1 files changed, 92 insertions, 53 deletions
diff --git a/c/src/lib/libbsp/arm/shared/start/start.S b/c/src/lib/libbsp/arm/shared/start/start.S
index cae991c9a6..3b7c9fd5c2 100644
--- a/c/src/lib/libbsp/arm/shared/start/start.S
+++ b/c/src/lib/libbsp/arm/shared/start/start.S
@@ -15,19 +15,23 @@
* The license and distribution terms for this file may be found in the file
* LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
*/
-
+
+#include <rtems/asm.h>
+
+#include <bspopts.h>
#include <bsp/linker-symbols.h>
-#include <bsp/start.h>
/* External symbols */
.extern bsp_reset
.extern boot_card
+.extern bsp_start_hook_0
+.extern bsp_start_hook_1
/* Global symbols */
.globl start
-.globl SWI_Handler
+.globl bsp_start_memcpy
/* Program Status Register definitions */
@@ -42,8 +46,9 @@
.equ PSR_F, 0x40
.equ PSR_T, 0x20
+.section ".bsp_start", "ax"
+
.arm
-.section ".bsp_start", "x"
/*
* This is the exception vector table and the pointers to the default
@@ -66,7 +71,11 @@ vector_block:
handler_addr_reset:
+#ifdef BSP_START_RESET_VECTOR
+ .word BSP_START_RESET_VECTOR
+#else
.word start
+#endif
handler_addr_undef:
@@ -100,63 +109,64 @@ handler_addr_fiq:
start:
- /*
- * We do not save the context since we do not return to the boot
- * loader.
- */
+ /*
+ * We do not save the context since we do not return to the boot
+ * loader.
+ */
- /*
- * Set SVC mode, disable interrupts and enable ARM instructions.
- */
+ /*
+ * Set SVC mode, disable interrupts and enable ARM instructions.
+ */
mov r0, #(PSR_MODE_SVC | PSR_I | PSR_F)
msr cpsr, r0
- /* Initialize stack pointer registers for the various modes */
+ /* Initialize stack pointer registers for the various modes */
- /* Enter IRQ mode and set up the IRQ stack pointer */
+ /* Enter IRQ mode and set up the IRQ stack pointer */
mov r0, #(PSR_MODE_IRQ | PSR_I | PSR_F)
msr cpsr, r0
ldr sp, =bsp_stack_irq_end
- /* Enter FIQ mode and set up the FIQ stack pointer */
+ /* Enter FIQ mode and set up the FIQ stack pointer */
mov r0, #(PSR_MODE_FIQ | PSR_I | PSR_F)
msr cpsr, r0
ldr sp, =bsp_stack_fiq_end
- /* Enter ABT mode and set up the ABT stack pointer */
+ /* Enter ABT mode and set up the ABT stack pointer */
mov r0, #(PSR_MODE_ABT | PSR_I | PSR_F)
msr cpsr, r0
ldr sp, =bsp_stack_abt_end
- /* Enter UNDEF mode and set up the UNDEF stack pointer */
+ /* Enter UNDEF mode and set up the UNDEF stack pointer */
mov r0, #(PSR_MODE_UNDEF | PSR_I | PSR_F)
msr cpsr, r0
ldr sp, =bsp_stack_undef_end
- /* Enter SVC mode and set up the SVC stack pointer */
+ /* Enter SVC mode and set up the SVC stack pointer */
mov r0, #(PSR_MODE_SVC | PSR_I | PSR_F)
msr cpsr, r0
ldr sp, =bsp_stack_svc_end
- /* Stay in SVC mode */
+ /* Stay in SVC mode */
- /* Brach to start hook 0 */
-#ifdef __thumb__
- ldr r3, =bsp_start_hook_0
- mov lr, pc
- bx r3
-.thumb
- bx pc
- nop
-.arm
-#else
- bl bsp_start_hook_0
-#endif
+ /*
+ * Branch to start hook 0.
+ *
+ * This code up to the start hook 0 may run with an address offset so
+ * it must be position independent. After the start hook 0 it is
+ * assumed that the code can run at its intended position. The link
+ * register will be loaded with the absolute address.
+ */
+
+ ldr lr, =bsp_start_hook_0_done
+ b bsp_start_hook_0
- /*
+bsp_start_hook_0_done:
+
+ /*
* Initialize the exception vectors. This includes the exceptions
* vectors and the pointers to the default exception handlers.
- */
+ */
ldr r0, =bsp_section_vector_begin
adr r1, vector_block
@@ -165,26 +175,15 @@ start:
ldmia r1!, {r2-r9}
stmia r0!, {r2-r9}
- /* Brach to start hook 1 */
-#ifdef __thumb__
- ldr r3, =bsp_start_hook_1
- mov lr, pc
- bx r3
-.thumb
- bx pc
- nop
-.arm
-#else
+ /* Branch to start hook 1 */
bl bsp_start_hook_1
-#endif
-
- /* Brach to boot card */
+ /* Branch to boot card */
mov r0, #0
#ifdef __thumb__
ldr r3, =boot_card
- mov lr, pc
- bx r3
+ mov lr, pc
+ bx r3
.thumb
bx pc
nop
@@ -193,11 +192,11 @@ start:
bl boot_card
#endif
- /* Branch to reset function */
+ /* Branch to reset function */
#ifdef __thumb__
ldr r3, =bsp_reset
- mov lr, pc
- bx r3
+ mov lr, pc
+ bx r3
.thumb
bx pc
nop
@@ -206,10 +205,50 @@ start:
bl bsp_reset
#endif
- /* Spin forever */
-
-SWI_Handler:
+ /* Spin forever */
twiddle:
b twiddle
+
+DEFINE_FUNCTION_ARM(bsp_start_memcpy)
+
+ /* Return if dest == src */
+ cmp r0, r1
+ bxeq lr
+
+ /* Return if length is zero */
+ mov r3, #0
+ cmp r3, r2
+ bxeq lr
+
+ /* Save non-volatile registers */
+ push {r4-r8, lr}
+
+ /* Copy worker routine to stack */
+ adr ip, bsp_start_memcpy_begin
+ ldm ip, {r3-r8}
+ push {r3-r8}
+
+ /* Execute worker routine */
+ mov r3, #0
+ mov ip, sp
+ mov lr, pc
+ bx ip
+
+ /* Restore stack and non-volatile registers */
+ add sp, sp, #24
+ pop {r4-r8, lr}
+
+ /* Return */
+ bx lr
+
+bsp_start_memcpy_begin:
+
+ /* Worker routine */
+ ldr ip, [r1, r3]
+ str ip, [r0, r3]
+ add r3, r3, #4
+ cmp r3, r2
+ bcc bsp_start_memcpy_begin
+ bx lr