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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2013-10-27 18:58:42 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2013-10-27 18:58:42 +0100 |
| commit | 09d0c96b915cbc09625860985c7846f67885bacc (patch) | |
| tree | dfc87ad5a03581ca923789ce2870c996888b1037 /c/src/lib/libbsp/arm/shared/mminit.c | |
| parent | bsps/arm: Init trans tbl with invalid entries (diff) | |
| download | rtems-09d0c96b915cbc09625860985c7846f67885bacc.tar.bz2 | |
bsps/arm: Move some MMU bit settings
The function
arm_cp15_start_setup_translation_table_and_enable_mmu_and_cache() must
only set the MMU and cache enable flags. Configuration flags must be
set elsewhere.
Diffstat (limited to 'c/src/lib/libbsp/arm/shared/mminit.c')
| -rw-r--r-- | c/src/lib/libbsp/arm/shared/mminit.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/arm/shared/mminit.c b/c/src/lib/libbsp/arm/shared/mminit.c index 23e71e62a7..5a4240c78b 100644 --- a/c/src/lib/libbsp/arm/shared/mminit.c +++ b/c/src/lib/libbsp/arm/shared/mminit.c @@ -14,6 +14,8 @@ BSP_START_TEXT_SECTION void bsp_memory_management_initialize(void) { uint32_t ctrl = arm_cp15_get_control(); + ctrl |= ARM_CP15_CTRL_AFE | ARM_CP15_CTRL_S | ARM_CP15_CTRL_XP; + arm_cp15_start_setup_translation_table_and_enable_mmu_and_cache( ctrl, (uint32_t *) bsp_translation_table_base, |